diff mbox

[Committed] S/390: Replace LDER with LDR.

Message ID 1461921740-30716-1-git-send-email-krebbel@linux.vnet.ibm.com
State New
Headers show

Commit Message

Andreas Krebbel April 29, 2016, 9:22 a.m. UTC 
For performance reasons it is important to write the full 64 bits of
an FPR target reg even when dealing with 32 bit values.  So we chose
lder over ler for 32 bit float register moves.  lder zero-extends the
32 bit value from the source reg to 64 bit in the target.  However,
since it actually doesn't matter whether we write the upper 32 bits
with zeros or with any other garbage we can also use ldr instead.  It
is bit shorter and therefore will do good for I-Cache usage.

gcc/ChangeLog:

2016-04-29  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/2964.md ("z13_unit_fxu", "z13_0"): Remove lder.
	* config/s390/s390.md ("movsi_larl", "*movsi_esa", "mov<mode>"):
	Change lder to ldr.
	* config/s390/vector.md ("mov<mode>"): Likewise.
---
 gcc/ChangeLog             |  7 +++++++
 gcc/config/s390/2964.md   |  4 ++--
 gcc/config/s390/s390.md   | 12 ++++++------
 gcc/config/s390/vector.md |  4 ++--
 4 files changed, 17 insertions(+), 10 deletions(-)
diff mbox

Patch

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6e783c8..be81b84 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@ 
+2016-04-29  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+	* config/s390/2964.md ("z13_unit_fxu", "z13_0"): Remove lder.
+	* config/s390/s390.md ("movsi_larl", "*movsi_esa", "mov<mode>"):
+	Change lder to ldr.
+	* config/s390/vector.md ("mov<mode>"): Likewise.
+
 2016-04-29  Ulrich Weigand  <uweigand@de.ibm.com>
 
 	* config/s390/constraints.md ("U", "W"): Invoke
diff --git a/gcc/config/s390/2964.md b/gcc/config/s390/2964.md
index d2211e1..e0e732b 100644
--- a/gcc/config/s390/2964.md
+++ b/gcc/config/s390/2964.md
@@ -57,7 +57,7 @@  vllezh,oc,xc,clc,lrl,ear,nc,lgrl,sfpc,llgf,llgfrl,llgh,llgt,lcbb,vll,sar") (cons
 (define_attr "z13_unit_fxu" ""
   (cond [(eq_attr "mnemonic" "s,lcgr,x,nop,oiy,ppa,ng,msy,sgrk,vstl,aghik,\
 msgf,ipm,mvi,stocg,rll,srlg,cghsi,clgit,srlk,alrk,sg,sh,sl,st,sy,vst,ark,\
-xgr,agsi,tm,nrk,shy,llhr,agf,alcr,slgfr,sr,clgrt,laa,lder,sgf,lan,llilf,\
+xgr,agsi,tm,nrk,shy,llhr,agf,alcr,slgfr,sr,clgrt,laa,sgf,lan,llilf,\
 llilh,ag,llill,lay,al,n,laxg,ar,ahi,sgr,ntstg,ay,stcy,nopr,mfy,ngrk,lbr,\
 br,dsgr,stdy,ork,ldgr,lcr,cg,ch,lgfrl,cl,stoc,cr,agfr,stgrl,cy,alfi,xg,\
 cgfi,xi,clfhsi,cgfr,xr,slb,mghi,clfi,slg,clhhsi,agfi,clfit,sly,mr,ldr,nihf,\
@@ -121,7 +121,7 @@  vchfs,madb,ddbr") (const_int 1)]
   (and (eq_attr "cpu" "z13")
        (eq_attr "mnemonic" "s,lcgr,x,nop,oiy,vlbb,ppa,ng,sgrk,vstl,aghik,\
 mvc,ipm,llgc,mvi,stocg,rll,jg,srlg,cghsi,clgit,srlk,alrk,sg,sh,sl,st,sy,\
-vst,ark,xgr,agsi,tm,nrk,shy,llhr,agf,alcr,slgfr,sr,clgrt,llc,laa,lder,sgf,\
+vst,ark,xgr,agsi,tm,nrk,shy,llhr,agf,alcr,slgfr,sr,clgrt,llc,laa,sgf,\
 lan,llhrl,llilf,llilh,ag,llill,lay,al,n,laxg,ar,ahi,sgr,ntstg,ay,stcy,vl,\
 nopr,ngrk,lbr,br,stdy,ork,ldgr,lcr,cg,ch,llghrl,lgfrl,cl,stoc,cr,agfr,stgrl,\
 cy,alfi,xg,cgfi,xi,vlrepf,vlrepg,vlreph,clfhsi,cgfr,xr,slb,mghi,clfi,slg,\
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 8757470..12a7f2a 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -1924,7 +1924,7 @@ 
    ly\t%0,%1
    st\t%1,%0
    sty\t%1,%0
-   lder\t%0,%1
+   ldr\t%0,%1
    ler\t%0,%1
    lde\t%0,%1
    le\t%0,%1
@@ -1944,7 +1944,7 @@ 
    vlef\t%v0,%1,0
    vstef\t%v1,%0,0"
   [(set_attr "op_type" "RI,RI,RI,RIL,RXY,RIL,RR,RX,RXY,RX,RXY,
-                        RRE,RR,RXE,RX,RXY,RX,RXY,RRE,RRE,RS,RIL,SIL,RS,VRI,VRR,VRS,VRS,VRX,VRX")
+                        RR,RR,RXE,RX,RXY,RX,RXY,RRE,RRE,RS,RIL,SIL,RS,VRI,VRR,VRS,VRS,VRX,VRX")
    (set_attr "type" "*,
                      *,
                      *,
@@ -2005,7 +2005,7 @@ 
    lr\t%0,%1
    l\t%0,%1
    st\t%1,%0
-   lder\t%0,%1
+   ldr\t%0,%1
    ler\t%0,%1
    lde\t%0,%1
    le\t%0,%1
@@ -2014,7 +2014,7 @@ 
    sar\t%0,%1
    stam\t%1,%1,%S0
    lam\t%0,%0,%S1"
-  [(set_attr "op_type" "RI,RR,RX,RX,RRE,RR,RXE,RX,RX,RRE,RRE,RS,RS")
+  [(set_attr "op_type" "RI,RR,RX,RX,RR,RR,RXE,RX,RX,RRE,RRE,RS,RS")
    (set_attr "type" "*,lr,load,store,floadsf,floadsf,floadsf,floadsf,fstoresf,*,*,*,*")
    (set_attr "z10prop" "z10_fwd_A1,z10_fr_E1,z10_fwd_A3,z10_rec,*,*,*,*,*,z10_super_E1,
                         z10_super,*,*")
@@ -2550,7 +2550,7 @@ 
   ""
   "@
    lzer\t%0
-   lder\t%0,%1
+   ldr\t%0,%1
    ler\t%0,%1
    lde\t%0,%1
    le\t%0,%1
@@ -2571,7 +2571,7 @@ 
    vlgvf\t%0,%v1,0
    vleg\t%0,%1,0
    vsteg\t%1,%0,0"
-  [(set_attr "op_type" "RRE,RRE,RR,RXE,RX,RXY,RX,RXY,RI,RR,RIL,RX,RXY,RIL,RX,RXY,VRR,VRI,VRS,VRS,VRX,VRX")
+  [(set_attr "op_type" "RRE,RR,RR,RXE,RX,RXY,RX,RXY,RI,RR,RIL,RX,RXY,RIL,RX,RXY,VRR,VRI,VRS,VRS,VRX,VRX")
    (set_attr "type"    "fsimpsf,fsimpsf,fload<mode>,fload<mode>,fload<mode>,fload<mode>,
                         fstore<mode>,fstore<mode>,*,lr,load,load,load,store,store,store,*,*,*,*,load,store")
    (set_attr "z10prop" "*,*,*,*,*,*,*,*,z10_fwd_A1,z10_fr_E1,z10_fr_E1,z10_fwd_A3,z10_fwd_A3,z10_rec,z10_rec,z10_rec,*,*,*,*,*,*")
diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md
index 979cb29..bc4f8da 100644
--- a/gcc/config/s390/vector.md
+++ b/gcc/config/s390/vector.md
@@ -237,7 +237,7 @@ 
 	(match_operand:V_32 1 "general_operand"      " f,R,T,f,f,v,d,v,R,v,j00,j00,jm1,jyy,jxx,j00,jm1,j00,jm1,b,d,R,T,d,d,d"))]
   "TARGET_VX"
   "@
-   lder\t%v0,%v1
+   ldr\t%v0,%v1
    lde\t%0,%1
    ley\t%0,%1
    ste\t%1,%0
@@ -263,7 +263,7 @@ 
    st\t%1,%0
    sty\t%1,%0
    strl\t%1,%0"
-  [(set_attr "op_type" "RRE,RXE,RXY,RX,RXY,VRR,VRS,VRS,VRX,VRX,RRE,VRI,VRI,VRI,VRI,SIL,SIL,RI,RI,
+  [(set_attr "op_type" "RR,RXE,RXY,RX,RXY,VRR,VRS,VRS,VRX,VRX,RRE,VRI,VRI,VRI,VRI,SIL,SIL,RI,RI,
                         RIL,RR,RX,RXY,RX,RXY,RIL")])
 
 (define_insn "mov<mode>"