From patchwork Thu Jan 7 12:49:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Lawrence X-Patchwork-Id: 564274 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id DA4971402B4 for ; Thu, 7 Jan 2016 23:50:01 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=ZSNSAxNM; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id; q=dns; s=default; b=DZFRrBMoh3XB sqCq349eCk+Q/PqyeOt+xjI6OczYVFUcYqTmbfSAe239fkM8NjUYYhR/NbjHPRua 7HmF4RlbTiwrLQBMSeefM0mWV+6A9jAzJQd2UfMa+CI/I+4rCSDGsqHsAis8VtXQ ROQ/NWkQFGXcEh2us1zBZzR4A3snTiE= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id; s=default; bh=gYUdxlfdsh8FrkjXyl Z2lAiKviM=; b=ZSNSAxNMITaZ2O6gQ23Nf62x7S5BlSnh082iNb3WhZkWFq+bbd zf2vDQTNY6zjZ4U+hjHxobf1rVRphKU9d23HhOzyrQs6dQk5NxP663MCGlHd4kCj wLIRim8n+DzpBJNZs+68wVpgdqDqmnSktH+c9rF7QNVp8TikjqJTy2Cvo= Received: (qmail 92767 invoked by alias); 7 Jan 2016 12:49:55 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 92752 invoked by uid 89); 7 Jan 2016 12:49:54 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=2.2 required=5.0 tests=AWL, BAYES_50, MEDICAL_SUBJECT, RP_MATCHES_RCVD, SPF_PASS autolearn=no version=3.3.2 spammy=H*Ad:U*wschmidt, 1.9.1, DONE, exhibited X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 07 Jan 2016 12:49:53 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 11A4549; Thu, 7 Jan 2016 04:49:19 -0800 (PST) Received: from arm.com (e105915-lin.emea.arm.com [10.2.206.30]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 7D0C93F246; Thu, 7 Jan 2016 04:49:51 -0800 (PST) From: Alan Lawrence To: gcc-patches@gcc.gnu.org Cc: wschmidt@linux.vnet.ibm.com, dje.gcc@gmail.com Subject: [PATCH][RS6000] Migrate reduction optabs in paired.md Date: Thu, 7 Jan 2016 12:49:34 +0000 Message-Id: <1452170974-24550-1-git-send-email-alan.lawrence@arm.com> X-IsSubscribed: yes There are only a couple of uses of the old reduction optabs remaining (the optabs producing a vector with only one element set). This migrates the uses in gcc.target/rs6000/paired.md. In the absence of a vec_extract pattern, I generate two subreg moves, the same as usually produced by the midend when using the old pattern. I don't have hardware to properly test this, but using a stage 1 compiler, I have compiled all the tests in gcc.dg/vect, at -O2 -ftree-vectorize -mpaired -S -mno-altivec -ffast-math -ffinite-math-only, on both powerpc-none-linux-gnupaired and ppcel-none-linux-gnupaired. The patterns were triggered on fast-math-vect-reduc-5.c, fast-math-vect-reduc-8.c, no-fast-math-vect16.c, vect-reduc-6.c. no-fast-math-vect16.c exhibited some regalloc differences (regs 0 and 12 are swapped): addi 9,1,136 + lfs 12,136(29) psq_stx 0,0,9,0,0 - lfs 0,136(29) - lfs 12,140(1) - fcmpu 7,12,0 + lfs 0,140(1) + fcmpu 7,0,12 no other assembly was changed. Is this OK for trunk? (stage 3?) Cheers, Alan gcc/ChangeLog: * gcc.target/rs6000/paired.md (reduc_smax_v2sf): Rename to... (reduc_smax_scal_v2sf): ...here, make result SFmode, extract element. (reduc_smin_v2sf): Rename to... (reduc_smin_scal_v2sf): ...here, make result SFmode, extract element. (reduc_splus_v2sf): Rename to... (reduc_plus_scal_v2sf): ...here, make result SFmode, extract element. --- gcc/config/rs6000/paired.md | 39 ++++++++++++++++++++++++++++----------- 1 file changed, 28 insertions(+), 11 deletions(-) diff --git a/gcc/config/rs6000/paired.md b/gcc/config/rs6000/paired.md index 5d094fb..c3f4d66 100644 --- a/gcc/config/rs6000/paired.md +++ b/gcc/config/rs6000/paired.md @@ -421,45 +421,62 @@ DONE; }) -(define_expand "reduc_smax_v2sf" - [(match_operand:V2SF 0 "gpc_reg_operand" "=f") +(define_expand "reduc_smax_scal_v2sf" + [(match_operand:SF 0 "gpc_reg_operand" "=f") (match_operand:V2SF 1 "gpc_reg_operand" "f")] "TARGET_PAIRED_FLOAT" { rtx tmp_swap = gen_reg_rtx (V2SFmode); rtx tmp = gen_reg_rtx (V2SFmode); + rtx vec_res = gen_reg_rtx (V2SFmode); + rtx di_res = gen_reg_rtx (DImode); emit_insn (gen_paired_merge10 (tmp_swap, operands[1], operands[1])); emit_insn (gen_subv2sf3 (tmp, operands[1], tmp_swap)); - emit_insn (gen_selv2sf4 (operands[0], tmp, operands[1], tmp_swap, CONST0_RTX (SFmode))); + emit_insn (gen_selv2sf4 (vec_res, tmp, operands[1], tmp_swap, + CONST0_RTX (SFmode))); + emit_move_insn (di_res, simplify_gen_subreg (DImode, vec_res, V2SFmode, 0)); + emit_move_insn (operands[0], simplify_gen_subreg (SFmode, di_res, DImode, + BYTES_BIG_ENDIAN ? 4 : 0)); DONE; }) -(define_expand "reduc_smin_v2sf" - [(match_operand:V2SF 0 "gpc_reg_operand" "=f") +(define_expand "reduc_smin_scal_v2sf" + [(match_operand:SF 0 "gpc_reg_operand" "=f") (match_operand:V2SF 1 "gpc_reg_operand" "f")] "TARGET_PAIRED_FLOAT" { rtx tmp_swap = gen_reg_rtx (V2SFmode); rtx tmp = gen_reg_rtx (V2SFmode); + rtx vec_res = gen_reg_rtx (V2SFmode); + rtx di_res = gen_reg_rtx (DImode); emit_insn (gen_paired_merge10 (tmp_swap, operands[1], operands[1])); emit_insn (gen_subv2sf3 (tmp, operands[1], tmp_swap)); - emit_insn (gen_selv2sf4 (operands[0], tmp, tmp_swap, operands[1], CONST0_RTX (SFmode))); + emit_insn (gen_selv2sf4 (vec_res, tmp, tmp_swap, operands[1], + CONST0_RTX (SFmode))); + emit_move_insn (di_res, simplify_gen_subreg (DImode, vec_res, V2SFmode, 0)); + emit_move_insn (operands[0], simplify_gen_subreg (SFmode, di_res, DImode, + BYTES_BIG_ENDIAN ? 4 : 0)); DONE; }) -(define_expand "reduc_splus_v2sf" - [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") +(define_expand "reduc_plus_scal_v2sf" + [(set (match_operand:SF 0 "gpc_reg_operand" "=f") (match_operand:V2SF 1 "gpc_reg_operand" "f"))] "TARGET_PAIRED_FLOAT" - " { - emit_insn (gen_paired_sum1 (operands[0], operands[1], operands[1], operands[1])); + rtx vec_res = gen_reg_rtx (V2SFmode); + rtx di_res = gen_reg_rtx (DImode); + + emit_insn (gen_paired_sum1 (vec_res, operands[1], operands[1], operands[1])); + emit_move_insn (di_res, simplify_gen_subreg (DImode, vec_res, V2SFmode, 0)); + emit_move_insn (operands[0], simplify_gen_subreg (SFmode, di_res, DImode, + BYTES_BIG_ENDIAN ? 4 : 0)); DONE; -}") +}) (define_expand "movmisalignv2sf" [(set (match_operand:V2SF 0 "nonimmediate_operand" "")