From patchwork Mon Sep 21 13:04:45 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleg Endo X-Patchwork-Id: 520288 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 8CC6F140291 for ; Mon, 21 Sep 2015 23:05:15 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=QpuWH/Ip; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:to:date:content-type:mime-version; q= dns; s=default; b=y0+e84V04O0rR77AZRdZm+fWfvJI+QIjvyReGMolHn4HQ5 NqmONaGgq9GHvQM6plqm6bA4za2XBCrP1bW2Z5TyTFfnZN5u2hlKpwtqlUvvE6V5 xzzb5Z3LM965kcL/a3amtffzwUcULt3xJbRJirFZqKtdsTBgoAapDmf6Qtfhk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:to:date:content-type:mime-version; s= default; bh=DYRKm16hYzioZkm6y2CRvv71hXQ=; b=QpuWH/Ip+xTybd0utepB LSn0UTc1Ci1m/iTZXYZT8V6XFcag1/3XGnuHHa7fCYQZO/LawHTkQXDNHWTOVVzf AFqnVlXHWLKQkw4AhG7bKVwI+XKYaalwC9WayPQSAqdX1CYr5tPGUVmbTQWwj0as gTwadRYsLliHQTgFFHrU+0U= Received: (qmail 106570 invoked by alias); 21 Sep 2015 13:05:08 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 106561 invoked by uid 89); 21 Sep 2015 13:05:07 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=0.5 required=5.0 tests=AWL, BAYES_00, KAM_ASCII_DIVIDERS, KAM_LAZY_DOMAIN_SECURITY, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: mailout07.t-online.de Received: from mailout07.t-online.de (HELO mailout07.t-online.de) (194.25.134.83) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Mon, 21 Sep 2015 13:04:57 +0000 Received: from fwd32.aul.t-online.de (fwd32.aul.t-online.de [172.20.26.144]) by mailout07.t-online.de (Postfix) with SMTP id 266BF27298E for ; Mon, 21 Sep 2015 15:04:54 +0200 (CEST) Received: from [192.168.0.16] (JbXnB+ZSYhvyhQuPIy-jPjDfPHonoytUy3vEAOiOsAUoTfANJgVthJlWZH0gDVIgB9@[115.165.93.200]) by fwd32.t-online.de with (TLSv1.2:ECDHE-RSA-AES256-GCM-SHA384 encrypted) esmtp id 1Ze0m0-3ryCBM0; Mon, 21 Sep 2015 15:04:48 +0200 Message-ID: <1442840685.2509.9.camel@t-online.de> Subject: [SH][committed] FIx PR 67657 From: Oleg Endo To: gcc-patches Date: Mon, 21 Sep 2015 22:04:45 +0900 Mime-Version: 1.0 X-IsSubscribed: yes Hi, This fixes PR 67657 on trunk. It seems that something after the peephole2 pass is not happy to see things like: mov.l @r2+,r2 which some of the SH peephole2 patterns create out of e.g. mov.l @r2+,r0 mov r0,r2 The post-inc is a bit pointless, so this patch catches such cases and replaces the address in the mem with a non-post-inc address. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim \{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" Committed as r227969. A backport to GCC 5 will follow. Cheers, Oleg gcc/ChangeLog: PR target/67657 * config/sh/sh.c (sh_remove_overlapping_post_inc, sh_peephole_emit_move_insn): Add new functions. * config/sh/sh-protos.h (sh_remove_overlapping_post_inc, sh_peephole_emit_move_insn): Declere them. * config/sh/sh.md: Use them in various peephole2 patterns. Index: gcc/config/sh/sh-protos.h =================================================================== --- gcc/config/sh/sh-protos.h (revision 227958) +++ gcc/config/sh/sh-protos.h (working copy) @@ -306,6 +306,8 @@ extern bool sh_reg_dead_or_unused_after_insn (const rtx_insn* i, int regno); extern void sh_remove_reg_dead_or_unused_notes (rtx_insn* i, int regno); extern rtx_insn* sh_check_add_incdec_notes (rtx_insn* i); +extern rtx sh_remove_overlapping_post_inc (rtx dst, rtx src); +extern rtx_insn* sh_peephole_emit_move_insn (rtx dst, rtx src); extern bool sh_in_recog_treg_set_expr (void); extern bool sh_recog_treg_set_expr (rtx op, machine_mode mode); Index: gcc/config/sh/sh.c =================================================================== --- gcc/config/sh/sh.c (revision 227958) +++ gcc/config/sh/sh.c (working copy) @@ -13810,6 +13810,34 @@ return i; } +/* Given a move insn destiation and a source, make sure that the move source + operand is not a post-inc mem load with the same address reg as the + destination. Returns the modified source operand with the post-inc removed + if necessary. */ +rtx +sh_remove_overlapping_post_inc (rtx dst, rtx src) +{ + if (!MEM_P (src)) + return src; + + rtx addr = XEXP (src, 0); + + if (GET_CODE (addr) == POST_INC + && reg_overlap_mentioned_p (XEXP (addr, 0), dst)) + return replace_equiv_address (src, XEXP (addr, 0)); + + gcc_assert (GET_CODE (addr) != POST_MODIFY); + return src; +} + +/* Emit a move insn that is safe to be used in peephole patterns. */ +rtx_insn* +sh_peephole_emit_move_insn (rtx dst, rtx src) +{ + return sh_check_add_incdec_notes ( + emit_move_insn (dst, sh_remove_overlapping_post_inc (dst, src))); +} + /* Given an op rtx and an insn, try to find out whether the result of the specified op consists only of logical operations on T bit stores. */ bool Index: gcc/config/sh/sh.md =================================================================== --- gcc/config/sh/sh.md (revision 227958) +++ gcc/config/sh/sh.md (working copy) @@ -14681,7 +14681,7 @@ [(const_int 0)] { emit_insn (gen_addsi3 (operands[1], operands[1], operands[2])); - sh_check_add_incdec_notes (emit_move_insn (operands[3], operands[1])); + sh_peephole_emit_move_insn (operands[3], operands[1]); }) ;; mov.l @(r0,r9),r1 @@ -14694,7 +14694,7 @@ "TARGET_SH1 && peep2_reg_dead_p (2, operands[0])" [(const_int 0)] { - sh_check_add_incdec_notes (emit_move_insn (operands[2], operands[1])); + sh_peephole_emit_move_insn (operands[2], operands[1]); }) (define_peephole2 @@ -14705,7 +14705,7 @@ "TARGET_SH1 && peep2_reg_dead_p (2, operands[0])" [(const_int 0)] { - sh_check_add_incdec_notes (emit_move_insn (operands[2], operands[1])); + sh_peephole_emit_move_insn (operands[2], operands[1]); }) (define_peephole2 @@ -14717,7 +14717,7 @@ [(const_int 0)] { sh_check_add_incdec_notes (emit_insn (gen_extendsi2 (operands[2], - operands[1]))); + sh_remove_overlapping_post_inc (operands[2], operands[1])))); }) ;; mov.w @(18,r1),r0 (r0 = HImode) @@ -14747,8 +14747,9 @@ // We don't know what the new set insn will be in detail. Just make sure // that it still can be recognized and the constraints are satisfied. - rtx_insn* i = emit_insn (gen_rtx_SET (operands[2], operands[3])); - + rtx_insn* i = emit_insn (gen_rtx_SET (operands[2], + sh_remove_overlapping_post_inc (operands[2], operands[3]))); + recog_data_d prev_recog_data = recog_data; bool i_invalid = insn_invalid_p (i, false); recog_data = prev_recog_data; @@ -14786,7 +14787,8 @@ { // We don't know what the new set insn will be in detail. Just make sure // that it still can be recognized and the constraints are satisfied. - rtx_insn* i = emit_insn (gen_rtx_SET (operands[2], operands[3])); + rtx_insn* i = emit_insn (gen_rtx_SET (operands[2], + sh_remove_overlapping_post_inc (operands[2], operands[3]))); recog_data_d prev_recog_data = recog_data; bool i_invalid = insn_invalid_p (i, false);