From patchwork Mon Aug 31 20:28:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bill Schmidt X-Patchwork-Id: 512587 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 7DEBB1401CD for ; Tue, 1 Sep 2015 06:29:12 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=Twq4AC6C; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:from:to:content-type:date:message-id:mime-version :content-transfer-encoding; q=dns; s=default; b=usChvz1SUorHwmD8 gQNMsr5HQ5sC50JZ1feVea8eNoQpmqfQd/5c8dACYeHDoAU6neEcg0mN/KFMwxtp dtxBgEnJ/kNJYGONNe4aVXrcdAKtnKrg/w67EcjM8HbyXbL90woYeLzJHsXHthom xZUYPRXmXIV6Zd5x/+boJG4S1/k= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:from:to:content-type:date:message-id:mime-version :content-transfer-encoding; s=default; bh=k5dquuVPD/7+jk50GuncNw d21nE=; b=Twq4AC6CqCJ2LzBwRT11DexgCvlCWLXt9bvTpf7lJ/0sV8Uj96Kztw 8btDocBvVN00ZraQr4niYnSrrQuUxBXhn+S07wG8+muiPWh5iz/UmjvuEodk0ebL oyC3nu1YMYVNGDn1/vqzB6znGdk63PPkvFqi4HVvVn9KofMCw9V6k= Received: (qmail 97090 invoked by alias); 31 Aug 2015 20:29:06 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 97074 invoked by uid 89); 31 Aug 2015 20:29:05 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.4 required=5.0 tests=AWL, BAYES_00, KAM_ASCII_DIVIDERS, KAM_LAZY_DOMAIN_SECURITY, T_RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: e39.co.us.ibm.com Received: from e39.co.us.ibm.com (HELO e39.co.us.ibm.com) (32.97.110.160) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (CAMELLIA256-SHA encrypted) ESMTPS; Mon, 31 Aug 2015 20:29:03 +0000 Received: from /spool/local by e39.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Mon, 31 Aug 2015 14:29:00 -0600 X-MailFrom: wschmidt@linux.vnet.ibm.com X-RcptTo: gcc-patches@gcc.gnu.org Received: from b03cxnp07029.gho.boulder.ibm.com (b03cxnp07029.gho.boulder.ibm.com [9.17.130.16]) by d03dlp02.boulder.ibm.com (Postfix) with ESMTP id 5B7A13E40041 for ; Mon, 31 Aug 2015 14:29:00 -0600 (MDT) Received: from d03av02.boulder.ibm.com (d03av02.boulder.ibm.com [9.17.195.168]) by b03cxnp07029.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t7VKSqnf46071822 for ; Mon, 31 Aug 2015 13:29:00 -0700 Received: from d03av02.boulder.ibm.com (localhost [127.0.0.1]) by d03av02.boulder.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t7VKSR5H009763 for ; Mon, 31 Aug 2015 14:28:27 -0600 Received: from [9.10.86.150] (oc8801110288.ibm.com.rchland.ibm.com [9.10.86.150] (may be forged)) by d03av02.boulder.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id t7VKSRB1008745 for ; Mon, 31 Aug 2015 14:28:27 -0600 Subject: [PATCH] Fix ICE when generating a vector shift by scalar From: Bill Schmidt To: gcc-patches@gcc.gnu.org Date: Mon, 31 Aug 2015 15:28:02 -0500 Message-ID: <1441052882.4779.3.camel@oc8801110288.ibm.com> Mime-Version: 1.0 X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15083120-0033-0000-0000-000005B2FCC8 X-IsSubscribed: yes Hi, The following simple test fails when attempting to convert a vector shift-by-scalar into a vector shift-by-vector. typedef unsigned char v16ui __attribute__((vector_size(16))); v16ui vslb(v16ui v, unsigned char i) { return v << i; } When this code is gimplified, the shift amount gets expanded to an unsigned int: vslb (v16ui v, unsigned char i) { v16ui D.2300; unsigned int D.2301; D.2301 = (unsigned int) i; D.2300 = v << D.2301; return D.2300; } In expand_binop, the shift-by-scalar is converted into a shift-by-vector using expand_vector_broadcast, which produces the following rtx to be used to initialize a V16QI vector: (parallel:V16QI [ (subreg/s/v:SI (reg:DI 155) 0) (subreg/s/v:SI (reg:DI 155) 0) (subreg/s/v:SI (reg:DI 155) 0) (subreg/s/v:SI (reg:DI 155) 0) (subreg/s/v:SI (reg:DI 155) 0) (subreg/s/v:SI (reg:DI 155) 0) (subreg/s/v:SI (reg:DI 155) 0) (subreg/s/v:SI (reg:DI 155) 0) (subreg/s/v:SI (reg:DI 155) 0) (subreg/s/v:SI (reg:DI 155) 0) (subreg/s/v:SI (reg:DI 155) 0) (subreg/s/v:SI (reg:DI 155) 0) (subreg/s/v:SI (reg:DI 155) 0) (subreg/s/v:SI (reg:DI 155) 0) (subreg/s/v:SI (reg:DI 155) 0) (subreg/s/v:SI (reg:DI 155) 0) ]) The back end eventually chokes trying to generate a copy of the SImode expression into a QImode memory slot. This patch fixes this problem by ensuring that the shift amount is truncated to the inner mode of the vector when necessary. I've added a test case verifying correct PowerPC code generation in this case. Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions. Is this ok for trunk? Thanks, Bill [gcc] 2015-08-31 Bill Schmidt * optabs.c (expand_binop): Don't create a broadcast vector with a source element wider than the inner mode. [gcc/testsuite] 2015-08-31 Bill Schmidt * gcc.target/powerpc/vec-shift.c: New test. Index: gcc/optabs.c =================================================================== --- gcc/optabs.c (revision 227353) +++ gcc/optabs.c (working copy) @@ -1608,6 +1608,13 @@ expand_binop (machine_mode mode, optab binoptab, r if (otheroptab && optab_handler (otheroptab, mode) != CODE_FOR_nothing) { + /* The scalar may have been extended to be too wide. Truncate + it back to the proper size to fit in the broadcast vector. */ + machine_mode inner_mode = GET_MODE_INNER (mode); + if (GET_MODE_BITSIZE (inner_mode) + < GET_MODE_BITSIZE (GET_MODE (op1))) + op1 = simplify_gen_unary (TRUNCATE, inner_mode, op1, + GET_MODE (op1)); rtx vop1 = expand_vector_broadcast (mode, op1); if (vop1) { Index: gcc/testsuite/gcc.target/powerpc/vec-shift.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/vec-shift.c (revision 0) +++ gcc/testsuite/gcc.target/powerpc/vec-shift.c (working copy) @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ +/* { dg-options "-mcpu=power7 -O2" } */ + +/* This used to ICE. During gimplification, "i" is widened to an unsigned + int. We used to fail at expand time as we tried to cram an SImode item + into a QImode memory slot. This has been fixed to properly truncate the + shift amount when splatting it into a vector. */ + +typedef unsigned char v16ui __attribute__((vector_size(16))); + +v16ui vslb(v16ui v, unsigned char i) +{ + return v << i; +} + +/* { dg-final { scan-assembler "vspltb" } } */ +/* { dg-final { scan-assembler "vslb" } } */