From patchwork Tue Jan 13 15:18:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 428444 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 2AAF114007D for ; Wed, 14 Jan 2015 02:22:00 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:in-reply-to:references; q=dns; s= default; b=bmS2sq4xBO6pAikoFpfCPhsqoEDrLbN/zVEg/jccgKMUYuFaqp/V/ Kl8gl39JGGLaitiH1xBaLkYDJ9XVLbVyj/2r1EuzIralDixE73zFTzrBvLLj1DP+ HdACpfCh36Jd5NvLKuR91xAG6pH0oMhsdOD2IzABPVn6k5rQKszcJc= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:in-reply-to:references; s=default; bh=dy+oDojyHUitb1meVobAYBxMAbM=; b=LQD4qnXVKmzgBGlyJ3CtvbC889t9 u4eAXBqKP4VU26JBE+xXVKarBUY99CPqsJe9xp6nXY+HZb2S0R9I/AyC7ghkOhn5 F8uAIuDl+vESnXtzlA38Zs+Dk68VE9N1dT0huSEa9gwsjmK4FFxFjwKbUcy9ANpf Wxk5tVXwn/WNFDk= Received: (qmail 23014 invoked by alias); 13 Jan 2015 15:19:12 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 22679 invoked by uid 89); 13 Jan 2015 15:19:05 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-wg0-f46.google.com Received: from mail-wg0-f46.google.com (HELO mail-wg0-f46.google.com) (74.125.82.46) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Tue, 13 Jan 2015 15:19:02 +0000 Received: by mail-wg0-f46.google.com with SMTP id x13so3551782wgg.5 for ; Tue, 13 Jan 2015 07:18:59 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=zQmLhiWNqty5eUWB16zGBEN0DFJDOThGoXdjCMYxXUo=; b=crGcHITE3AAlu6x8FT1wLOUc4MqqUsY0saZZgvNn9dH3KQIMtuBD/Lvlpo9AzbZ0I5 jmS/JnlLsN+IEwfiJHLziSC+Xoncqe3ggm6cgxmmj3jlMzeEIwn51JReDWyeh24SniRm jVL/jJqu1tcbNHQ0Mwc82wLBxF4xh+0ruyWl9uYZJ2kDefoVYTos2bQxmhAuUOxTJ7uk nK1aU5cp7Ii6QA68oG/dUA09g1USe9oZJ/Qpr7H0G81a6Loa7JWabIzIvlUW6iRWJoza 4daHhD4U0ANmKoE4z2h7aR9pOu2WWu2PHcI5LxoGwOsI1zYCCiI+QKpMI4PtmL4L462j Icgg== X-Gm-Message-State: ALoCoQksd1jkCN8h+uF6ZQ6kj5stknjVpe7EFd5DGVRXp4sfe5El6qc0/5LV8o6BVwQmdiqYNoWP X-Received: by 10.180.8.71 with SMTP id p7mr40740816wia.17.1421162339285; Tue, 13 Jan 2015 07:18:59 -0800 (PST) Received: from babel.clyon.hd.free.fr (vig38-2-82-225-222-175.fbx.proxad.net. [82.225.222.175]) by mx.google.com with ESMTPSA id jr4sm26100313wjc.20.2015.01.13.07.18.58 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 13 Jan 2015 07:18:58 -0800 (PST) From: Christophe Lyon To: gcc-patches@gcc.gnu.org Subject: [[ARM/AArch64][testsuite] 10/36] Add vmlal and vmlsl tests. Date: Tue, 13 Jan 2015 16:18:08 +0100 Message-Id: <1421162314-25779-11-git-send-email-christophe.lyon@linaro.org> In-Reply-To: <1421162314-25779-1-git-send-email-christophe.lyon@linaro.org> References: <1421162314-25779-1-git-send-email-christophe.lyon@linaro.org> X-IsSubscribed: yes * gcc.target/aarch64/advsimd-intrinsics/vmlXl.inc: New file. * gcc.target/aarch64/advsimd-intrinsics/vmlal.c: New file. * gcc.target/aarch64/advsimd-intrinsics/vmlsl.c: New file. diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlXl.inc b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlXl.inc new file mode 100644 index 0000000..1e6bab3 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlXl.inc @@ -0,0 +1,89 @@ +#define FNNAME1(NAME) exec_ ## NAME +#define FNNAME(NAME) FNNAME1(NAME) + +void FNNAME (INSN_NAME) (void) +{ + /* vector_res = OP(vector, vector3, vector4), + then store the result. */ +#define TEST_VMLXL1(INSN, T1, T2, W, W2, N) \ + VECT_VAR(vector_res, T1, W, N) = \ + INSN##_##T2##W2(VECT_VAR(vector, T1, W, N), \ + VECT_VAR(vector3, T1, W2, N), \ + VECT_VAR(vector4, T1, W2, N)); \ + vst1q_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N)) + +#define TEST_VMLXL(INSN, T1, T2, W, W2, N) \ + TEST_VMLXL1(INSN, T1, T2, W, W2, N) + + DECL_VARIABLE(vector, int, 16, 8); + DECL_VARIABLE(vector3, int, 8, 8); + DECL_VARIABLE(vector4, int, 8, 8); + DECL_VARIABLE(vector_res, int, 16, 8); + + DECL_VARIABLE(vector, int, 32, 4); + DECL_VARIABLE(vector3, int, 16, 4); + DECL_VARIABLE(vector4, int, 16, 4); + DECL_VARIABLE(vector_res, int, 32, 4); + + DECL_VARIABLE(vector, int, 64, 2); + DECL_VARIABLE(vector3, int, 32, 2); + DECL_VARIABLE(vector4, int, 32, 2); + DECL_VARIABLE(vector_res, int, 64, 2); + + DECL_VARIABLE(vector, uint, 16, 8); + DECL_VARIABLE(vector3, uint, 8, 8); + DECL_VARIABLE(vector4, uint, 8, 8); + DECL_VARIABLE(vector_res, uint, 16, 8); + + DECL_VARIABLE(vector, uint, 32, 4); + DECL_VARIABLE(vector3, uint, 16, 4); + DECL_VARIABLE(vector4, uint, 16, 4); + DECL_VARIABLE(vector_res, uint, 32, 4); + + DECL_VARIABLE(vector, uint, 64, 2); + DECL_VARIABLE(vector3, uint, 32, 2); + DECL_VARIABLE(vector4, uint, 32, 2); + DECL_VARIABLE(vector_res, uint, 64, 2); + + clean_results (); + + VLOAD(vector, buffer, q, int, s, 16, 8); + VLOAD(vector, buffer, q, int, s, 32, 4); + VLOAD(vector, buffer, q, int, s, 64, 2); + VLOAD(vector, buffer, q, uint, u, 16, 8); + VLOAD(vector, buffer, q, uint, u, 32, 4); + VLOAD(vector, buffer, q, uint, u, 64, 2); + + VDUP(vector3, , int, s, 8, 8, 0x55); + VDUP(vector4, , int, s, 8, 8, 0xBB); + VDUP(vector3, , int, s, 16, 4, 0x55); + VDUP(vector4, , int, s, 16, 4, 0xBB); + VDUP(vector3, , int, s, 32, 2, 0x55); + VDUP(vector4, , int, s, 32, 2, 0xBB); + VDUP(vector3, , uint, u, 8, 8, 0x55); + VDUP(vector4, , uint, u, 8, 8, 0xBB); + VDUP(vector3, , uint, u, 16, 4, 0x55); + VDUP(vector4, , uint, u, 16, 4, 0xBB); + VDUP(vector3, , uint, u, 32, 2, 0x55); + VDUP(vector4, , uint, u, 32, 2, 0xBB); + + TEST_VMLXL(INSN_NAME, int, s, 16, 8, 8); + TEST_VMLXL(INSN_NAME, int, s, 32, 16, 4); + TEST_VMLXL(INSN_NAME, int, s, 64, 32, 2); + TEST_VMLXL(INSN_NAME, uint, u, 16, 8, 8); + TEST_VMLXL(INSN_NAME, uint, u, 32, 16, 4); + TEST_VMLXL(INSN_NAME, uint, u, 64, 32, 2); + + CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, ""); + CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, ""); + CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, ""); + CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, ""); + CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, ""); + CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, ""); +} + +int main (void) +{ + FNNAME (INSN_NAME) (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlal.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlal.c new file mode 100644 index 0000000..c147f31 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlal.c @@ -0,0 +1,18 @@ +#include +#include "arm-neon-ref.h" +#include "compute-ref-data.h" + +#define INSN_NAME vmlal +#define TEST_MSG "VMLAL" + +/* Expected results. */ +VECT_VAR_DECL(expected,int,16,8) [] = { 0xe907, 0xe908, 0xe909, 0xe90a, + 0xe90b, 0xe90c, 0xe90d, 0xe90e }; +VECT_VAR_DECL(expected,int,32,4) [] = { 0x3e07, 0x3e08, 0x3e09, 0x3e0a }; +VECT_VAR_DECL(expected,int,64,2) [] = { 0x3e07, 0x3e08 }; +VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3e07, 0x3e08, 0x3e09, 0x3e0a, + 0x3e0b, 0x3e0c, 0x3e0d, 0x3e0e }; +VECT_VAR_DECL(expected,uint,32,4) [] = { 0x3e07, 0x3e08, 0x3e09, 0x3e0a }; +VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3e07, 0x3e08 }; + +#include "vmlXl.inc" diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlsl.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlsl.c new file mode 100644 index 0000000..6c984ae --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlsl.c @@ -0,0 +1,22 @@ +#include +#include "arm-neon-ref.h" +#include "compute-ref-data.h" + +#define INSN_NAME vmlsl +#define TEST_MSG "VMLSL" + +/* Expected results. */ +VECT_VAR_DECL(expected,int,16,8) [] = { 0x16d9, 0x16da, 0x16db, 0x16dc, + 0x16dd, 0x16de, 0x16df, 0x16e0 }; +VECT_VAR_DECL(expected,int,32,4) [] = { 0xffffc1d9, 0xffffc1da, + 0xffffc1db, 0xffffc1dc }; +VECT_VAR_DECL(expected,int,64,2) [] = { 0xffffffffffffc1d9, + 0xffffffffffffc1da }; +VECT_VAR_DECL(expected,uint,16,8) [] = { 0xc1d9, 0xc1da, 0xc1db, 0xc1dc, + 0xc1dd, 0xc1de, 0xc1df, 0xc1e0 }; +VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffc1d9, 0xffffc1da, + 0xffffc1db, 0xffffc1dc }; +VECT_VAR_DECL(expected,uint,64,2) [] = { 0xffffffffffffc1d9, + 0xffffffffffffc1da }; + +#include "vmlXl.inc"