From patchwork Thu Nov 6 19:05:06 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Ellcey X-Patchwork-Id: 407674 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 0E16714007D for ; Fri, 7 Nov 2014 06:05:41 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:reply-to:to:cc:date:in-reply-to :references:content-type:content-transfer-encoding:mime-version; q=dns; s=default; b=BQMOpcG3VHKzWbKANFCZJ7yZC+EjcnZ72cO4EajYhly bRsol+cguIcFd1ycAH0dvVK1Oq7JQBkuVHl+FCC0jfRQA+aWMs1DjgaHmAhxynEK 84lDT0U7Ybv/tM7/gZybMnmewukcsLOVrnm6RyFPy4fnwwZVTn+NTjDe8bofMnt8 = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:reply-to:to:cc:date:in-reply-to :references:content-type:content-transfer-encoding:mime-version; s=default; bh=HY82a1Z7CE3k4OzeGsmBBeTdAKI=; b=uFbp5N4pzpO0jkZfm pahhfXwlEoPTtA67C5YrTGpC4OB4jcM/D+rqMoN4VAEi61edy8NI8T2MY9P4CDA1 fbj7zOMSYHEu+EOzuTidGDk714sozV1/Wfu0M7iqH0zi/YPK02R/HywmqIaBBvR9 xb3vc/qcAjA9Uyy+MND5jCoedE= Received: (qmail 27675 invoked by alias); 6 Nov 2014 19:05:16 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 27512 invoked by uid 89); 6 Nov 2014 19:05:15 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=AWL, BAYES_00, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mailapp01.imgtec.com Received: from mailapp01.imgtec.com (HELO mailapp01.imgtec.com) (195.59.15.196) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 06 Nov 2014 19:05:13 +0000 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id ED6D7E8FCBC16; Thu, 6 Nov 2014 19:05:06 +0000 (GMT) Received: from KLMAIL02.kl.imgtec.org (10.40.60.222) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.195.1; Thu, 6 Nov 2014 19:05:10 +0000 Received: from hhmail02.hh.imgtec.org (10.100.10.20) by klmail02.kl.imgtec.org (10.40.60.222) with Microsoft SMTP Server (TLS) id 14.3.195.1; Thu, 6 Nov 2014 19:05:09 +0000 Received: from BAMAIL02.ba.imgtec.org (10.20.40.28) by hhmail02.hh.imgtec.org (10.100.10.20) with Microsoft SMTP Server (TLS) id 14.3.210.2; Thu, 6 Nov 2014 19:05:09 +0000 Received: from [192.168.65.53] (192.168.65.53) by bamail02.ba.imgtec.org (10.20.40.28) with Microsoft SMTP Server (TLS) id 14.3.174.1; Thu, 6 Nov 2014 11:05:07 -0800 Message-ID: <1415300706.14291.251.camel@ubuntu-sellcey> Subject: RE: [Patch] MIPS configuration patch to enable --with-[arch, endian, abi] From: Steve Ellcey Reply-To: To: Matthew Fortune CC: "gcc-patches@gcc.gnu.org" , "clm@codesourcery.com" , "Joseph S. Myers" Date: Thu, 6 Nov 2014 11:05:06 -0800 In-Reply-To: <6D39441BF12EF246A7ABCE6654B0235320F65183@LEMAIL01.le.imgtec.org> References: <6D39441BF12EF246A7ABCE6654B0235320F65183@LEMAIL01.le.imgtec.org> MIME-Version: 1.0 On Fri, 2014-10-31 at 15:12 -0700, Matthew Fortune wrote: > I'm not keen on adding support for --with-endian to mips. I believe that > various build systems have become quite dependent on 'mips' meaning big > endian and 'mipsel' being little endian. I'd prefer to remove that part > unless you (or anyone else) can identify a reason why we should support > it. OK, I will remove the --with-endian part of the patch, that will also take care of the issues Joseph had with the patch. > This is OK if --with-endian support is removed, otherwise if you see a > need for it then I'd like to see what Catherine thinks. > > Thanks, > Matthew Here is the patch with the endian support removed, I will go ahead and check it in. 2014-11-06 Steve Ellcey * config.gcc (mips*-mti-linux*): Remove gnu_ld and gas assignments. Set default_mips_arch and default_mips_abi instead of tm_defines. (mips*-*-linux*): Set default_mips_arch and default_mips_abi instead of tm_defines. (mips*-*-*): Check with_arch and with_abi. Set tm_defines. * config/mips/mips.h (STANDARD_STARTFILE_PREFIX_1): Set default based on MIPS_ABI_DEFAULT. (STANDARD_STARTFILE_PREFIX_2): Ditto. diff --git a/gcc/config.gcc b/gcc/config.gcc index 10b0a6e..f1bfb65 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -1952,30 +1952,30 @@ mips*-*-linux*) # Linux MIPS, either endian. extra_options="${extra_options} linux-android.opt" case ${target} in mipsisa32r2*) - tm_defines="${tm_defines} MIPS_ISA_DEFAULT=33" + default_mips_arch=mips32r2 ;; mipsisa32*) - tm_defines="${tm_defines} MIPS_ISA_DEFAULT=32" + default_mips_arch=mips32 ;; mips64el-st-linux-gnu) - tm_defines="${tm_defines} MIPS_ABI_DEFAULT=ABI_N32" + default_mips_abi=n32 tm_file="${tm_file} mips/st.h" tmake_file="${tmake_file} mips/t-st" enable_mips_multilibs="yes" ;; mips64octeon*-*-linux*) - tm_defines="${tm_defines} MIPS_ABI_DEFAULT=ABI_N32" + default_mips_abi=n32 tm_defines="${tm_defines} MIPS_CPU_STRING_DEFAULT=\\\"octeon\\\"" target_cpu_default=MASK_SOFT_FLOAT_ABI enable_mips_multilibs="yes" ;; mipsisa64r2*-*-linux*) - tm_defines="${tm_defines} MIPS_ABI_DEFAULT=ABI_N32" - tm_defines="${tm_defines} MIPS_ISA_DEFAULT=65" + default_mips_abi=n32 + default_mips_arch=mips64r2 enable_mips_multilibs="yes" ;; mips64*-*-linux* | mipsisa64*-*-linux*) - tm_defines="${tm_defines} MIPS_ABI_DEFAULT=ABI_N32" + default_mips_abi=n32 enable_mips_multilibs="yes" ;; esac @@ -4120,6 +4120,29 @@ case ${target} in tm_defines="TARGET_ENDIAN_DEFAULT=0 $tm_defines" ;; esac + if test x$with_arch != x; then + default_mips_arch=$with_arch + fi + if test x$with_abi != x; then + default_mips_abi=$with_abi + fi + case ${default_mips_arch} in + mips1) tm_defines="$tm_defines MIPS_ISA_DEFAULT=1" ;; + mips2) tm_defines="$tm_defines MIPS_ISA_DEFAULT=2" ;; + mips3) tm_defines="$tm_defines MIPS_ISA_DEFAULT=3" ;; + mips4) tm_defines="$tm_defines MIPS_ISA_DEFAULT=4" ;; + mips32) tm_defines="$tm_defines MIPS_ISA_DEFAULT=32" ;; + mips32r2) tm_defines="$tm_defines MIPS_ISA_DEFAULT=33" ;; + mips64) tm_defines="$tm_defines MIPS_ISA_DEFAULT=64" ;; + mips64r2) tm_defines="$tm_defines MIPS_ISA_DEFAULT=65" ;; + esac + case ${default_mips_abi} in + 32) tm_defines="$tm_defines MIPS_ABI_DEFAULT=ABI_32" ;; + o64) tm_defines="$tm_defines MIPS_ABI_DEFAULT=ABI_O64" ;; + n32) tm_defines="$tm_defines MIPS_ABI_DEFAULT=ABI_N32" ;; + 64) tm_defines="$tm_defines MIPS_ABI_DEFAULT=ABI_64" ;; + eabi) tm_defines="$tm_defines MIPS_ABI_DEFAULT=ABI_EABI" ;; + esac tmake_file="mips/t-mips $tmake_file" ;; diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index c7b998b..3b8469f 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -3009,3 +3009,13 @@ extern GTY(()) struct target_globals *mips16_globals; with arguments ARGS. */ #define PMODE_INSN(NAME, ARGS) \ (Pmode == SImode ? NAME ## _si ARGS : NAME ## _di ARGS) + +/* If we are *not* using multilibs and the default ABI is not ABI_32 we + need to change these from /lib and /usr/lib. */ +#if MIPS_ABI_DEFAULT == ABI_N32 +#define STANDARD_STARTFILE_PREFIX_1 "/lib32/" +#define STANDARD_STARTFILE_PREFIX_2 "/usr/lib32/" +#elif MIPS_ABI_DEFAULT == ABI_64 +#define STANDARD_STARTFILE_PREFIX_1 "/lib64/" +#define STANDARD_STARTFILE_PREFIX_2 "/usr/lib64/" +#endif