From patchwork Sat Sep 27 18:10:47 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andi Kleen X-Patchwork-Id: 394083 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 149131400EA for ; Sun, 28 Sep 2014 04:11:48 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; q=dns; s= default; b=t1uwnjLPjzbwZowBNOLdjKsd1Q+g6xLr8O8d4WBcfhYK1KHLjSXnd zyLQXW+8Rjz1OyLGkH7W3MyuR5D8AENzrj4O867l1syH6Qe/UNmXV+sjqXjWQUy9 BThnmG/dLmS1Q1D/b+xBBTCheFCq2hl3hhpiB/QMwc3YnkrNdgjEMw= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; s= default; bh=YX4OuZ7ajDRvDzLCICSR8m9hc3k=; b=sQdUtFDa5KlTKINSJ+c4 YFEoJDQb0VhI20J4X7k9WpcVRoiTStbmm4vWd4d789S7ynsbRxzOKJ8lbpEQOSf0 VGevo4Z0bq2wu0mG+5AO2oSC2mf3SrSKA4u+LbeNpb1VVimv3tf3TuWgJBMRmX44 v+M09z2MFT1TRPZBfq8UguI= Received: (qmail 10314 invoked by alias); 27 Sep 2014 18:11:42 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 10295 invoked by uid 89); 27 Sep 2014 18:11:41 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=AWL, BAYES_00, RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: one.firstfloor.org Received: from one.firstfloor.org (HELO one.firstfloor.org) (193.170.194.197) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Sat, 27 Sep 2014 18:11:40 +0000 Received: from basil.firstfloor.org (184-100-254-193.ptld.qwest.net [184.100.254.193]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by one.firstfloor.org (Postfix) with ESMTPSA id B42C3869A8; Sat, 27 Sep 2014 20:11:34 +0200 (CEST) Received: by basil.firstfloor.org (Postfix, from userid 1000) id E35A3A6203; Sat, 27 Sep 2014 11:10:50 -0700 (PDT) From: Andi Kleen To: gcc-patches@gcc.gnu.org Cc: Andi Kleen Subject: [PATCH 2/2] Remove x86 cmpstrnsi Date: Sat, 27 Sep 2014 11:10:47 -0700 Message-Id: <1411841447-20914-2-git-send-email-andi@firstfloor.org> In-Reply-To: <1411841447-20914-1-git-send-email-andi@firstfloor.org> References: <1411841447-20914-1-git-send-email-andi@firstfloor.org> From: Andi Kleen In my tests the optimized glibc out of line strcmp is always faster than using inline rep ; cmpsb, even for small strings. The Intel optimization manual also recommends to not use it. So remove the cmpstrnsi instruction. Tested on Sandy Bridge, Westmere Intel CPUs. gcc/: 2014-09-27 Andi Kleen * config/i386/i386.md (cmpstrnsi, cmpintqi): Remove expanders. --- gcc/config/i386/i386.md | 85 ------------------------------------------------- 1 file changed, 85 deletions(-) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 98df8e1..1d2f1a5 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -16097,91 +16097,6 @@ (const_string "*"))) (set_attr "mode" "QI")]) -(define_expand "cmpstrnsi" - [(set (match_operand:SI 0 "register_operand") - (compare:SI (match_operand:BLK 1 "general_operand") - (match_operand:BLK 2 "general_operand"))) - (use (match_operand 3 "general_operand")) - (use (match_operand 4 "immediate_operand"))] - "" -{ - rtx addr1, addr2, out, outlow, count, countreg, align; - - if (optimize_insn_for_size_p () && !TARGET_INLINE_ALL_STRINGOPS) - FAIL; - - /* Can't use this if the user has appropriated ecx, esi or edi. */ - if (fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG]) - FAIL; - - out = operands[0]; - if (!REG_P (out)) - out = gen_reg_rtx (SImode); - - addr1 = copy_addr_to_reg (XEXP (operands[1], 0)); - addr2 = copy_addr_to_reg (XEXP (operands[2], 0)); - if (addr1 != XEXP (operands[1], 0)) - operands[1] = replace_equiv_address_nv (operands[1], addr1); - if (addr2 != XEXP (operands[2], 0)) - operands[2] = replace_equiv_address_nv (operands[2], addr2); - - count = operands[3]; - countreg = ix86_zero_extend_to_Pmode (count); - - /* %%% Iff we are testing strict equality, we can use known alignment - to good advantage. This may be possible with combine, particularly - once cc0 is dead. */ - align = operands[4]; - - if (CONST_INT_P (count)) - { - if (INTVAL (count) == 0) - { - emit_move_insn (operands[0], const0_rtx); - DONE; - } - emit_insn (gen_cmpstrnqi_nz_1 (addr1, addr2, countreg, align, - operands[1], operands[2])); - } - else - { - rtx (*gen_cmp) (rtx, rtx); - - gen_cmp = (TARGET_64BIT - ? gen_cmpdi_1 : gen_cmpsi_1); - - emit_insn (gen_cmp (countreg, countreg)); - emit_insn (gen_cmpstrnqi_1 (addr1, addr2, countreg, align, - operands[1], operands[2])); - } - - outlow = gen_lowpart (QImode, out); - emit_insn (gen_cmpintqi (outlow)); - emit_move_insn (out, gen_rtx_SIGN_EXTEND (SImode, outlow)); - - if (operands[0] != out) - emit_move_insn (operands[0], out); - - DONE; -}) - -;; Produce a tri-state integer (-1, 0, 1) from condition codes. - -(define_expand "cmpintqi" - [(set (match_dup 1) - (gtu:QI (reg:CC FLAGS_REG) (const_int 0))) - (set (match_dup 2) - (ltu:QI (reg:CC FLAGS_REG) (const_int 0))) - (parallel [(set (match_operand:QI 0 "register_operand") - (minus:QI (match_dup 1) - (match_dup 2))) - (clobber (reg:CC FLAGS_REG))])] - "" -{ - operands[1] = gen_reg_rtx (QImode); - operands[2] = gen_reg_rtx (QImode); -}) - ;; memcmp recognizers. The `cmpsb' opcode does nothing if the count is ;; zero. Emit extra code to make sure that a zero-length compare is EQ.