| Message ID | 1389917678.3022.45.camel@ubuntu-sellcey |
|---|---|
| State | New |
| Headers | show |
Steve Ellcey <sellcey@mips.com> writes: > 2014-01-15 Andrew Pinski <apinski@cavium.com> > Steve Ellcey <sellcey@mips.com> > > PR target/59462 > * config/mips/mips.c (mips_print_operand): Check operand mode instead > of operator mode. > > > diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c > index 617391c..60cb8ee 100644 > --- a/gcc/config/mips/mips.c > +++ b/gcc/config/mips/mips.c > @@ -8184,7 +8184,7 @@ mips_print_operand (FILE *file, rtx op, int letter) > case 't': > { > int truth = (code == NE) == (letter == 'T'); > - fputc ("zfnt"[truth * 2 + (GET_MODE (op) == CCmode)], file); > + fputc ("zfnt"[truth * 2 + (GET_MODE (XEXP (op, 0)) == CCmode)], file); > } > break; > I think it'd be more direct to check the register class, since we used to store CCmode in GPRs too. I.e. ST_REGNO_P (XEXP (op, 0)). OK with that change, thanks. Please backport to 4.8 too. Richard
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 617391c..60cb8ee 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -8184,7 +8184,7 @@ mips_print_operand (FILE *file, rtx op, int letter) case 't': { int truth = (code == NE) == (letter == 'T'); - fputc ("zfnt"[truth * 2 + (GET_MODE (op) == CCmode)], file); + fputc ("zfnt"[truth * 2 + (GET_MODE (XEXP (op, 0)) == CCmode)], file); } break;
Here is a new patch to fix c-c++-common/cilk-plus/AN/builtin_func_double2.c on MIPS. When generating code for: (insn:TI 76 79 98 (set (reg:SI 2 $2 [orig:228 D.1939+-3 ] [228]) (if_then_else:SI (ne:SI (reg:CC 67 $fcc0) (const_int 0 [0])) (reg:SI 2 $2 [orig:228 D.1939+-3 ] [228]) (reg:SI 4 $4 [246]))) 609 {*movsi_on_cc} (nil)) The MIPS GCC compiler is generating: movz $4,$6,$fcc0 instead of movf $4,$6,$fcc0 This is because GCC is checking the 'ne' operator mode which is SI instead of the register operand mode which is CC. The not-equal operator is originally generated with a CC mode but it gets changed to SI during the combine optimization phase. This patch fixes the problem by changing the mode check to look at the register operand instead of the operator. It was tested with my mips-mti-linux-gnu target and I verified it fixes the bug and causes no regressions. OK to checkin? Steve Ellcey sellcey@mips.com 2014-01-15 Andrew Pinski <apinski@cavium.com> Steve Ellcey <sellcey@mips.com> PR target/59462 * config/mips/mips.c (mips_print_operand): Check operand mode instead of operator mode.