diff mbox

[SH] PR 50751 - some test cases

Message ID 1332280972.1876.205.camel@yam-132-YW-E178-FTW
State New
Headers show

Commit Message

Oleg Endo March 20, 2012, 10:02 p.m. UTC
Hi,

The attached patch adds some test cases for PR 50751 to check whether
mov.b insns are generated.

Tested on sh-sim with 
make check-gcc RUNTESTFLAGS="sh.exp=pr50751* --target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a-single/-mb,-m4-single/-ml,
-m4-single/-mb,-m4a-single/-ml,-m4a-single/-mb}"

to confirm that the tests pass as expected.

Cheers,
Oleg

testsuite/ChangeLog:

	PR target/50751
	* gcc/target/sh/pr50751-1.c: New.
	* gcc/target/sh/pr50751-2.c: New.
	* gcc/target/sh/pr50751-3.c: New.

Comments

Kaz Kojima March 21, 2012, 3:29 a.m. UTC | #1
Oleg Endo <oleg.endo@t-online.de> wrote:
> The attached patch adds some test cases for PR 50751 to check whether
> mov.b insns are generated.

OK.

Regards,
	kaz
diff mbox

Patch

Index: gcc/testsuite/gcc.target/sh/pr50751-1.c
===================================================================
--- gcc/testsuite/gcc.target/sh/pr50751-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/sh/pr50751-1.c	(revision 0)
@@ -0,0 +1,30 @@ 
+/* Check that the mov.b displacement addressing insn is generated.
+   If the insn is generated as expected, there should be no address 
+   calculations outside the mov insns.  */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-O1" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
+/* { dg-final { scan-assembler-not "add|sub" } } */
+
+void
+testfunc_00 (const char* ap, char* bp, char val)
+{
+  bp[0] = ap[15];
+  bp[2] = ap[5];
+  bp[9] = ap[7];
+  bp[0] = ap[15];
+  bp[4] = val;
+  bp[14] = val;
+}
+
+void
+testfunc_01 (volatile const char* ap, volatile char* bp, char val)
+{
+  bp[0] = ap[15];
+  bp[2] = ap[5];
+  bp[9] = ap[7];
+  bp[0] = ap[15];
+  bp[4] = val;
+  bp[14] = val;
+}
+
Index: gcc/testsuite/gcc.target/sh/pr50751-2.c
===================================================================
--- gcc/testsuite/gcc.target/sh/pr50751-2.c	(revision 0)
+++ gcc/testsuite/gcc.target/sh/pr50751-2.c	(revision 0)
@@ -0,0 +1,27 @@ 
+/* Check that the mov.b displacement addressing insn is generated and the 
+   base address is adjusted only once.  On SH2A this test is skipped because
+   there is a 4 byte mov.b insn that can handle larger displacements.  Thus
+   on SH2A the base address will not be adjusted in this case.  */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-O1" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" "-m2a*" } { "" } } */
+/* { dg-final { scan-assembler-times "add" 2 } } */
+
+void
+testfunc_00 (const char* ap, char* bp)
+{
+  bp[0] = ap[15];
+  bp[2] = ap[5];
+  bp[9] = ap[7];
+  bp[0] = ap[25];
+}
+
+void
+testfunc_01 (volatile const char* ap, volatile char* bp)
+{
+  bp[0] = ap[15];
+  bp[2] = ap[5];
+  bp[9] = ap[7];
+  bp[0] = ap[25];
+}
+
Index: gcc/testsuite/gcc.target/sh/pr50751-3.c
===================================================================
--- gcc/testsuite/gcc.target/sh/pr50751-3.c	(revision 0)
+++ gcc/testsuite/gcc.target/sh/pr50751-3.c	(revision 0)
@@ -0,0 +1,26 @@ 
+/* Check that on SH2A the 4 byte mov.b displacement insn is generated to
+   handle larger displacements.  If it is generated correctly, there should
+   be no base address adjustments outside the mov.b insns.  */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-O1" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m2a*" } } */
+/* { dg-final { scan-assembler-not "add|sub" } } */
+
+void
+testfunc_00 (const char* ap, char* bp)
+{
+  bp[100] = ap[15];
+  bp[200] = ap[50];
+  bp[900] = ap[71];
+  bp[0] = ap[25];
+}
+
+void
+testfunc_01 (volatile const char* ap, volatile char* bp)
+{
+  bp[100] = ap[15];
+  bp[200] = ap[50];
+  bp[900] = ap[71];
+  bp[0] = ap[25];
+}
+