From patchwork Tue Dec 20 17:27:18 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pat Haugen X-Patchwork-Id: 707522 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3tjl935b3Lz9t8j for ; Wed, 21 Dec 2016 04:27:35 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="e8RhF/wf"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :subject:to:cc:date:mime-version:content-type:message-id; q=dns; s=default; b=Q8S0M/ejK5Qe6nlD6MiLBMBbrx+91llD0bBDqbJ4h5k2SDrg26 1JnPApFNKfy+txPbFy+W/xvr6MJTEFS2BYIefv+DWKk8x7AbZR+xMtsVB7Y2f/Jq lLDC/JZC/lJWF2kcV9OWsJ7hEM3P73s3lM4ECGi/6ZJolISUkJIyfrpDk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :subject:to:cc:date:mime-version:content-type:message-id; s= default; bh=zzwMWvIGR3KQXjUN4Iej/QhwdKE=; b=e8RhF/wflJ0HqlpyJAz9 YCnorD7SjKOlzICCbHvDN9PqTnCdQwbP7H67d53qzoakuZfTS25BoPG96C/WTjPe e6CJQTlOP66DSeJ5KlTGQSOFIRdYd28WmJu7lOM+eHZLF/PUrQiuzqncirzDyEt9 dmmpv0m5PGB+VWGQzkp5A5Q= Received: (qmail 28963 invoked by alias); 20 Dec 2016 17:27:28 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 28946 invoked by uid 89); 20 Dec 2016 17:27:27 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.8 required=5.0 tests=BAYES_00, KAM_ASCII_DIVIDERS, KAM_LAZY_DOMAIN_SECURITY, RCVD_IN_DNSWL_LOW autolearn=no version=3.3.2 spammy=Net, U*pthaugen, sk:pthauge, 243651 X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.156.1) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 20 Dec 2016 17:27:26 +0000 Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.17/8.16.0.17) with SMTP id uBKHJpLO069617 for ; Tue, 20 Dec 2016 12:27:24 -0500 Received: from e36.co.us.ibm.com (e36.co.us.ibm.com [32.97.110.154]) by mx0a-001b2d01.pphosted.com with ESMTP id 27f3enp833-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 20 Dec 2016 12:27:24 -0500 Received: from localhost by e36.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 20 Dec 2016 10:27:20 -0700 Received: from b03cxnp08027.gho.boulder.ibm.com (b03cxnp08027.gho.boulder.ibm.com [9.17.130.19]) by d03dlp03.boulder.ibm.com (Postfix) with ESMTP id 417B819D801C; Tue, 20 Dec 2016 10:26:38 -0700 (MST) Received: from b03ledav004.gho.boulder.ibm.com (b03ledav004.gho.boulder.ibm.com [9.17.130.235]) by b03cxnp08027.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id uBKHRIFL10682786; Tue, 20 Dec 2016 10:27:19 -0700 Received: from b03ledav004.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 95E8178037; Tue, 20 Dec 2016 10:27:19 -0700 (MST) Received: from oc1687012634.ibm.com (unknown [9.85.169.90]) by b03ledav004.gho.boulder.ibm.com (Postfix) with ESMTP id EB5FD78041; Tue, 20 Dec 2016 10:27:18 -0700 (MST) From: Pat Haugen Subject: [PATCH,rs6000] Fix PR11488 for rs6000 target To: GCC Patches Cc: Segher Boessenkool , David Edelsohn Date: Tue, 20 Dec 2016 11:27:18 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16122017-0020-0000-0000-00000A8FE12D X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00006285; HX=3.00000240; KW=3.00000007; PH=3.00000004; SC=3.00000198; SDB=6.00796566; UDB=6.00386611; IPR=6.00574379; BA=6.00004991; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00013665; XFM=3.00000011; UTC=2016-12-20 17:27:21 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16122017-0021-0000-0000-000058432B2E Message-Id: <09df046e-555c-be35-d8ee-d5b96553e87e@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2016-12-20_12:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1612050000 definitions=main-1612200220 X-IsSubscribed: yes This patch attempts to fix problems with the first scheduling pass creating too much register pressure. It does this by enabling the target hook to compute the pressure classes for rs6000 target since the first thing I observed while investigating the testcase in the subject PR is that IRA was picking NON_SPECIAL_REGS as a pressure class which led to the sched-pressure code computing too high of a value for number of regs available for pseudos preferring GENERAL_REGS. It also enables -fsched-pressure by default, using the 'model' algorithm. I ran various runs of cpu20006 to determine the set of pressure classes and which sched-pressure algorithm to use. Net result is that with these patches I see 6 benchmarks improve in the 2.4-6% range but there are also a couple 2% degradations which will need follow up in GCC 8. There was also one benchmark that showed a much bigger improvement with the 'weighted' sched-pressure algorithm that also needs follow up ('weighted' was not chosen as default since it showed more degradations). Bootstrap/regtest on powerpc64/powerpc64le. There were 2 testcases that failed (sms-3.c/sms-6.c) but I have submitted a separate patch to fix those. Ok for trunk? -Pat 2016-12-20 Pat Haugen PR rtl-optimization/11488 * common/config/rs6000/rs6000-common.c (rs6000_option_optimization_table): Enable -fsched-pressure. * config/rs6000/rs6000.c (TARGET_COMPUTE_PRESSURE_CLASSES): Define target hook. (rs6000_option_override_internal): Set default -fsched-pressure algorithm. (rs6000_compute_pressure_classes): Implement target hook. Index: common/config/rs6000/rs6000-common.c =================================================================== --- common/config/rs6000/rs6000-common.c (revision 243651) +++ common/config/rs6000/rs6000-common.c (working copy) @@ -32,6 +32,8 @@ static const struct default_options rs6000_option_optimization_table[] = { { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 }, + /* Enable -fsched-pressure for first pass instruction scheduling. */ + { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 }, { OPT_LEVELS_NONE, 0, NULL, 0 } }; Index: config/rs6000/rs6000.c =================================================================== --- config/rs6000/rs6000.c (revision 243651) +++ config/rs6000/rs6000.c (working copy) @@ -1807,6 +1807,9 @@ static const struct attribute_spec rs600 #undef TARGET_LRA_P #define TARGET_LRA_P rs6000_lra_p +#undef TARGET_COMPUTE_PRESSURE_CLASSES +#define TARGET_COMPUTE_PRESSURE_CLASSES rs6000_compute_pressure_classes + #undef TARGET_CAN_ELIMINATE #define TARGET_CAN_ELIMINATE rs6000_can_eliminate @@ -5100,6 +5103,12 @@ rs6000_option_override_internal (bool gl global_options.x_param_values, global_options_set.x_param_values); + /* Use the 'model' -fsched-pressure algorithm by default. */ + maybe_set_param_value (PARAM_SCHED_PRESSURE_ALGORITHM, + SCHED_PRESSURE_MODEL, + global_options.x_param_values, + global_options_set.x_param_values); + /* If using typedef char *va_list, signal that __builtin_va_start (&ap, 0) can be optimized to ap = __builtin_next_arg (0). */ @@ -37450,6 +37459,32 @@ rs6000_lra_p (void) return TARGET_LRA; } +/* Compute register pressure classes. We implement the target hook to avoid + IRA picking something like NON_SPECIAL_REGS as a pressure class, which can + lead to incorrect estimates of number of available registers and therefor + increased register pressure/spill. */ +static int +rs6000_compute_pressure_classes (enum reg_class *pressure_classes) +{ + int n; + + n = 0; + pressure_classes[n++] = GENERAL_REGS; + if (TARGET_VSX) + pressure_classes[n++] = VSX_REGS; + else + { + if (TARGET_ALTIVEC) + pressure_classes[n++] = ALTIVEC_REGS; + if (TARGET_HARD_FLOAT && TARGET_FPRS) + pressure_classes[n++] = FLOAT_REGS; + } + pressure_classes[n++] = CR_REGS; + pressure_classes[n++] = SPECIAL_REGS; + + return n; +} + /* Given FROM and TO register numbers, say whether this elimination is allowed. Frame pointer elimination is automatically handled.