From patchwork Fri Jul 3 14:16:16 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Segher Boessenkool X-Patchwork-Id: 491095 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 7F0401402EC for ; Sat, 4 Jul 2015 00:16:37 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=mg7eB+fW; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id; q=dns; s=default; b=JzJ6D78WTSbC DnxidCVb1YI0OROo3uKsrkelDznaDkV2FY6FHlsIVTeaSKaeMksfNk18X3GCXoQG FtcgBlzFCSlizXhU32pHcx9O+W4+gtViI7OquCc2DO9LsLqF971P3SVQhDApXt6R TNg+h/c1HNri7tsn/kWSqi1IhquVYvc= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id; s=default; bh=2ZvxdSAVkYpjhh0ZKi IR/EXpFeM=; b=mg7eB+fWXxF9+/mBNC/LwrIabbFR9zXAU+FDqu0/pqOXdpl+NO 0TVaUwpFn4c4x20VlNMAzsCsE/KyV6pdvNUVSLXXG+Ijph2BfK8T+QZuz1k5Hiuj /lErAlspunyHnnLcd7RcmZZeYkoDwJXfLcWsLDwW0xYpVaUNv/v2t7Woc= Received: (qmail 93039 invoked by alias); 3 Jul 2015 14:16:31 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 93024 invoked by uid 89); 3 Jul 2015 14:16:30 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.3 required=5.0 tests=AWL, BAYES_50, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: gcc1-power7.osuosl.org Received: from gcc1-power7.osuosl.org (HELO gcc1-power7.osuosl.org) (140.211.15.137) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Fri, 03 Jul 2015 14:16:28 +0000 Received: from gcc1-power7.osuosl.org (localhost [127.0.0.1]) by gcc1-power7.osuosl.org (8.14.6/8.14.6) with ESMTP id t63EGP3U028083; Fri, 3 Jul 2015 07:16:25 -0700 Received: (from segher@localhost) by gcc1-power7.osuosl.org (8.14.6/8.14.6/Submit) id t63EGLuu027953; Fri, 3 Jul 2015 07:16:21 -0700 From: Segher Boessenkool To: gcc-patches@gcc.gnu.org Cc: dje.gcc@gmail.com, Segher Boessenkool Subject: [PATCH] rs6000: Add testcase for shifts Date: Fri, 3 Jul 2015 07:16:16 -0700 Message-Id: <0662d2e59fb2f983e8df0a473ab939b123025b07.1435932505.git.segher@kernel.crashing.org> X-IsSubscribed: yes This new test tests that all shifts of int compile to exactly one machine instruction, not two as in the PR (which was a problem in combine). Tested on powerpc64-linux, with the usual options (-m32,-m32/-mpowerpc64,-m64,-m64/-mlra); okay for trunk? Segher 2015-07-03 Segher Boessenkool gcc/testsuite/ PR rtl-optimization/66706 * gcc.target/powerpc/shift-int.c: New testcase. --- gcc/testsuite/gcc.target/powerpc/shift-int.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 gcc/testsuite/gcc.target/powerpc/shift-int.c diff --git a/gcc/testsuite/gcc.target/powerpc/shift-int.c b/gcc/testsuite/gcc.target/powerpc/shift-int.c new file mode 100644 index 0000000..fe696ea --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/shift-int.c @@ -0,0 +1,23 @@ +/* Check that shifts do not get unnecessary extends. + See PR66706 for a case where this failed. */ + +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +/* Each function should compile to exactly two instructions. */ +/* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 16 } } */ +/* { dg-final { scan-assembler-times {(?n)^\s+blr} 8 } } */ + + +typedef unsigned u; +typedef signed s; + +u rot(u x, u n) { return (x << n) | (x >> (32 - n)); } +u shl(u x, u n) { return x << n; } +u shr(u x, u n) { return x >> n; } +s asr(s x, u n) { return x >> n; } + +u roti(u x) { return (x << 23) | (x >> 9); } +u shli(u x) { return x << 23; } +u shri(u x) { return x >> 23; } +s asri(s x) { return x >> 23; }