| Message ID | 045d3e43-f1c9-2afd-a752-71c69f4d5165@linux.ibm.com |
|---|---|
| State | New |
| Headers | show |
| Series | rs6000: Rename instruction xvcvbf16sp to xvcvbf16spn | expand |
On Tue, Aug 18, 2020 at 01:30:53PM -0500, Peter Bergner wrote: > The xvcvbf16sp mnemonic, which was just added in ISA 3.1 has been renamed > to xvcvbf16spn, to make it consistent with the other non-signaling conversion > instructions which all end with "n". The only use of this instruction is in > an MMA conversion built-in function, so there is little to no compatibility > issue. > > I just pushed the patch that does the rename to binutils today. > > Ok for trunk and the GCC 10 branch after testing is clean? Yes, okay everywhere. Thanks! Segher > gcc/ > * config/rs6000/rs6000-builtin.def (BU_VSX_1): Rename xvcvbf16sp to > xvcvbf16spn. > * config/rs6000/rs6000-call.c (builtin_function_type): Likewise. > * config/rs6000/vsx.md: Likewise. > * doc/extend.texi: Likewise. > > gcc/testsuite/ > * gcc.target/powerpc/mma-builtin-3.c: Rename xvcvbf16sp to xvcvbf16spn.
On 8/18/20 1:34 PM, Segher Boessenkool wrote: > On Tue, Aug 18, 2020 at 01:30:53PM -0500, Peter Bergner wrote: >> The xvcvbf16sp mnemonic, which was just added in ISA 3.1 has been renamed >> to xvcvbf16spn, to make it consistent with the other non-signaling conversion >> instructions which all end with "n". The only use of this instruction is in >> an MMA conversion built-in function, so there is little to no compatibility >> issue. >> >> I just pushed the patch that does the rename to binutils today. >> >> Ok for trunk and the GCC 10 branch after testing is clean? > > Yes, okay everywhere. Thanks! Thanks. Pushed to trunk and GCC 10 branch. Thanks! Peter
diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def index f9f0fece549..03c234ffa98 100644 --- a/gcc/config/rs6000/rs6000-builtin.def +++ b/gcc/config/rs6000/rs6000-builtin.def @@ -2998,7 +2998,7 @@ BU_SPECIAL_X (RS6000_BUILTIN_CFSTRING, "__builtin_cfstring", RS6000_BTM_ALWAYS, RS6000_BTC_MISC) /* POWER10 MMA builtins. */ -BU_VSX_1 (XVCVBF16SP, "xvcvbf16sp", MISC, vsx_xvcvbf16sp) +BU_VSX_1 (XVCVBF16SPN, "xvcvbf16spn", MISC, vsx_xvcvbf16spn) BU_VSX_1 (XVCVSPBF16, "xvcvspbf16", MISC, vsx_xvcvspbf16) BU_MMA_1 (XXMFACC, "xxmfacc", QUAD, mma_xxmfacc) diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c index e39cfcf672b..3a23f1980ce 100644 --- a/gcc/config/rs6000/rs6000-call.c +++ b/gcc/config/rs6000/rs6000-call.c @@ -14037,7 +14037,7 @@ builtin_function_type (machine_mode mode_ret, machine_mode mode_arg0, case MISC_BUILTIN_CDTBCD: case MISC_BUILTIN_CBCDTD: case VSX_BUILTIN_XVCVSPBF16: - case VSX_BUILTIN_XVCVBF16SP: + case VSX_BUILTIN_XVCVBF16SPN: case P10_BUILTIN_MTVSRBM: case P10_BUILTIN_MTVSRHM: case P10_BUILTIN_MTVSRWM: diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index dd750210758..54da54c43dc 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -300,7 +300,7 @@ UNSPEC_VSX_DIVUD UNSPEC_VSX_MULSD UNSPEC_VSX_SIGN_EXTEND - UNSPEC_VSX_XVCVBF16SP + UNSPEC_VSX_XVCVBF16SPN UNSPEC_VSX_XVCVSPBF16 UNSPEC_VSX_XVCVSPSXDS UNSPEC_VSX_XVCVSPHP @@ -364,10 +364,10 @@ ]) (define_int_iterator XVCVBF16 [UNSPEC_VSX_XVCVSPBF16 - UNSPEC_VSX_XVCVBF16SP]) + UNSPEC_VSX_XVCVBF16SPN]) (define_int_attr xvcvbf16 [(UNSPEC_VSX_XVCVSPBF16 "xvcvspbf16") - (UNSPEC_VSX_XVCVBF16SP "xvcvbf16sp")]) + (UNSPEC_VSX_XVCVBF16SPN "xvcvbf16spn")]) ;; Like VI, defined in vector.md, but add ISA 2.07 integer vector ops (define_mode_iterator VI2 [V4SI V8HI V16QI V2DI]) diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 79833171c5a..bcc251481ca 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -21624,7 +21624,7 @@ void __builtin_mma_assemble_pair (__vector_pair *, vec_t, vec_t); void __builtin_mma_disassemble_pair (void *, __vector_pair *); vec_t __builtin_vsx_xvcvspbf16 (vec_t); -vec_t __builtin_vsx_xvcvbf16sp (vec_t); +vec_t __builtin_vsx_xvcvbf16spn (vec_t); @end smallexample @node RISC-V Built-in Functions diff --git a/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.c b/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.c index 29eb2754999..9bec78d333f 100644 --- a/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.c +++ b/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.c @@ -18,7 +18,7 @@ void foo1 (vec_t *vec) { vec[1] = __builtin_vsx_xvcvspbf16 (vec[0]); - vec[3] = __builtin_vsx_xvcvbf16sp (vec[2]); + vec[3] = __builtin_vsx_xvcvbf16spn (vec[2]); } /* { dg-final { scan-assembler-times {\mxxmtacc\M} 1 } } */ @@ -28,4 +28,4 @@ foo1 (vec_t *vec) /* { dg-final { scan-assembler-not {\mlxvp\M} } } */ /* { dg-final { scan-assembler-not {\mstxvp\M} } } */ /* { dg-final { scan-assembler-times {\mxvcvspbf16\M} 1 } } */ -/* { dg-final { scan-assembler-times {\mxvcvbf16sp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mxvcvbf16spn\M} 1 } } */