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Use movsicc to emit RTL. A separate patch will split movsicc. gcc/ 2013-02-14 Greta Yorsh * config/arm/arm.md (arm_smax_insn): Convert define_insn into define_insn_and_split. (arm_smin_insn,arm_umaxsi3,arm_uminsi3): Likewise. commit 068f9449536fca959fd687ac8b7e0bdae898f8bd Author: Greta Date: Fri Feb 15 14:41:48 2013 +0000 8-split-min-max.v2.patch diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 7c04840..5f5af3c 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -3443,15 +3443,23 @@ [(set_attr "predicable" "yes")] ) -(define_insn "*arm_smax_insn" +(define_insn_and_split "*arm_smax_insn" [(set (match_operand:SI 0 "s_register_operand" "=r,r") (smax:SI (match_operand:SI 1 "s_register_operand" "%0,?r") (match_operand:SI 2 "arm_rhs_operand" "rI,rI"))) (clobber (reg:CC CC_REGNUM))] "TARGET_ARM" - "@ - cmp\\t%1, %2\;movlt\\t%0, %2 - cmp\\t%1, %2\;movge\\t%0, %1\;movlt\\t%0, %2" + "#" + ; cmp\\t%1, %2\;movlt\\t%0, %2 + ; cmp\\t%1, %2\;movge\\t%0, %1\;movlt\\t%0, %2" + "TARGET_ARM" + [(set (reg:CC CC_REGNUM) + (compare:CC (match_dup 1) (match_dup 2))) + (set (match_dup 0) + (if_then_else:SI (ge:SI (reg:CC CC_REGNUM) (const_int 0)) + (match_dup 1) + (match_dup 2)))] + "" [(set_attr "conds" "clob") (set_attr "length" "8,12")] ) @@ -3483,15 +3491,23 @@ [(set_attr "predicable" "yes")] ) -(define_insn "*arm_smin_insn" +(define_insn_and_split "*arm_smin_insn" [(set (match_operand:SI 0 "s_register_operand" "=r,r") (smin:SI (match_operand:SI 1 "s_register_operand" "%0,?r") (match_operand:SI 2 "arm_rhs_operand" "rI,rI"))) (clobber (reg:CC CC_REGNUM))] "TARGET_ARM" - "@ - cmp\\t%1, %2\;movge\\t%0, %2 - cmp\\t%1, %2\;movlt\\t%0, %1\;movge\\t%0, %2" + "#" + ; cmp\\t%1, %2\;movge\\t%0, %2 + ; cmp\\t%1, %2\;movlt\\t%0, %1\;movge\\t%0, %2" + "TARGET_ARM" + [(set (reg:CC CC_REGNUM) + (compare:CC (match_dup 1) (match_dup 2))) + (set (match_dup 0) + (if_then_else:SI (lt:SI (reg:CC CC_REGNUM) (const_int 0)) + (match_dup 1) + (match_dup 2)))] + "" [(set_attr "conds" "clob") (set_attr "length" "8,12")] ) @@ -3506,16 +3522,24 @@ "" ) -(define_insn "*arm_umaxsi3" +(define_insn_and_split "*arm_umaxsi3" [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") (umax:SI (match_operand:SI 1 "s_register_operand" "0,r,?r") (match_operand:SI 2 "arm_rhs_operand" "rI,0,rI"))) (clobber (reg:CC CC_REGNUM))] "TARGET_ARM" - "@ - cmp\\t%1, %2\;movcc\\t%0, %2 - cmp\\t%1, %2\;movcs\\t%0, %1 - cmp\\t%1, %2\;movcs\\t%0, %1\;movcc\\t%0, %2" + "#" + ; cmp\\t%1, %2\;movcc\\t%0, %2 + ; cmp\\t%1, %2\;movcs\\t%0, %1 + ; cmp\\t%1, %2\;movcs\\t%0, %1\;movcc\\t%0, %2" + "TARGET_ARM" + [(set (reg:CC CC_REGNUM) + (compare:CC (match_dup 1) (match_dup 2))) + (set (match_dup 0) + (if_then_else:SI (geu:SI (reg:CC CC_REGNUM) (const_int 0)) + (match_dup 1) + (match_dup 2)))] + "" [(set_attr "conds" "clob") (set_attr "length" "8,8,12")] ) @@ -3530,16 +3554,24 @@ "" ) -(define_insn "*arm_uminsi3" +(define_insn_and_split "*arm_uminsi3" [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") (umin:SI (match_operand:SI 1 "s_register_operand" "0,r,?r") (match_operand:SI 2 "arm_rhs_operand" "rI,0,rI"))) (clobber (reg:CC CC_REGNUM))] "TARGET_ARM" - "@ - cmp\\t%1, %2\;movcs\\t%0, %2 - cmp\\t%1, %2\;movcc\\t%0, %1 - cmp\\t%1, %2\;movcc\\t%0, %1\;movcs\\t%0, %2" + "#" + ; cmp\\t%1, %2\;movcs\\t%0, %2 + ; cmp\\t%1, %2\;movcc\\t%0, %1 + ; cmp\\t%1, %2\;movcc\\t%0, %1\;movcs\\t%0, %2" + "TARGET_ARM" + [(set (reg:CC CC_REGNUM) + (compare:CC (match_dup 1) (match_dup 2))) + (set (match_dup 0) + (if_then_else:SI (ltu:SI (reg:CC CC_REGNUM) (const_int 0)) + (match_dup 1) + (match_dup 2)))] + "" [(set_attr "conds" "clob") (set_attr "length" "8,8,12")] )