From patchwork Thu Sep 11 15:15:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wilco X-Patchwork-Id: 388300 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id E5EEB14010C for ; Fri, 12 Sep 2014 01:15:35 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:references:in-reply-to:subject:date:message-id :mime-version:content-type; q=dns; s=default; b=YAm8aX7NOGfxSjPz HQC6a5iH8uH9g894Y9ZlFumVy9yE7X6JIGXaai7yJxh96eUdniRMHZBQrXe2IL1E geJ9ARR2wB4uFM9fWKx9iTkd7tqaPXEQxOUhL4MhcZba/Bey8LHIbp21iu6tdtE3 OEAs360M3/AWoz+LCuZVYNM/yv4= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:references:in-reply-to:subject:date:message-id :mime-version:content-type; s=default; bh=OfqcsiU27VSA77o7H9TJZ6 t2u+8=; b=Xpkordr+OSGR8Afrurf4psfHPi7KHLH0l93F9IwglPJfw4tomO9iK4 qbVJm6IS4N8PSfWfLIkTAwd/+vqPXh4j1o7wyYPb9qdyVijGZH/meG+PzO1V0dvJ fzJpZz2u1DUrxBWRGsTW6ftv8vJtSa3pL9c6n/Bc3Ic/U+8RVNPuc= Received: (qmail 8982 invoked by alias); 11 Sep 2014 15:15:17 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 8911 invoked by uid 89); 11 Sep 2014 15:15:17 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.0 required=5.0 tests=AWL, BAYES_00, SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 11 Sep 2014 15:15:15 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Thu, 11 Sep 2014 16:15:12 +0100 Received: from e103246vm ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 11 Sep 2014 16:15:11 +0100 From: "Wilco Dijkstra" To: "'Marcus Shawcroft'" Cc: References: <000f01cfc84f$2ee1df40$8ca59dc0$@com> In-Reply-To: Subject: RE: [PATCH 4/4] AArch64: Add regmove_costs for Cortex-A57 and A53 Date: Thu, 11 Sep 2014 16:15:10 +0100 Message-ID: <002101cfcdd3$2df88910$89e99b30$@com> MIME-Version: 1.0 X-MC-Unique: 114091116151204601 I've kept the integer move costs at 1 - patch attached for commit as I don't have write access. ChangeLog: 2014-09-11 Wilco Dijkstra * gcc/config/aarch64/aarch64.c: (cortexa57_regmove_cost): New cost table for A57. (cortexa53_regmove_cost): New cost table for A53. Increase GP2FP/FP2GP cost to spilling from integer to FP registers. > -----Original Message----- > From: Marcus Shawcroft [mailto:marcus.shawcroft@gmail.com] > Sent: 04 September 2014 17:40 > To: Wilco Dijkstra > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [PATCH 4/4] AArch64: Add regmove_costs for Cortex-A57 and A53 > > On 4 September 2014 15:47, Wilco Dijkstra wrote: > > This patch adds regmove_costs for Cortex-A57 and A53, and sets the cost of GP2FP/FP2GP > higher than > > memory cost to block the register allocator allocating integer values in FP registers. > > > > Overall these patches give 2-3% speedup on SPEC. > > > > This passes all regression tests (with this fix > > https://gcc.gnu.org/ml/gcc-patches/2014-09/msg00356.html). > > > > OK for commit? > > > > Wilco > > > > ChangeLog: > > 2014-09-04 Wilco Dijkstra > > > > * gcc/config/aarch64/aarch64.c: > > Add cortexa57_regmove_cost and cortexa53_regmove_cost to avoid > > spilling from integer to FP registers. > > Write a proper ChangeLog entry please. > > Keep the GP2GP cost aligned with generic until we have justification > to change it. > > /Marcus --- gcc/config/aarch64/aarch64.c | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 62b0168..bb092ca 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -218,6 +218,26 @@ static const struct cpu_regmove_cost generic_regmove_cost = NAMED_PARAM (FP2FP, 2) }; +static const struct cpu_regmove_cost cortexa57_regmove_cost = +{ + NAMED_PARAM (GP2GP, 1), + /* Avoid the use of slow int<->fp moves for spilling by setting + their cost higher than memmov_cost. */ + NAMED_PARAM (GP2FP, 5), + NAMED_PARAM (FP2GP, 5), + NAMED_PARAM (FP2FP, 2) +}; + +static const struct cpu_regmove_cost cortexa53_regmove_cost = +{ + NAMED_PARAM (GP2GP, 1), + /* Avoid the use of slow int<->fp moves for spilling by setting + their cost higher than memmov_cost. */ + NAMED_PARAM (GP2FP, 5), + NAMED_PARAM (FP2GP, 5), + NAMED_PARAM (FP2FP, 2) +}; + /* Generic costs for vector insn classes. */ #if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 __extension__ @@ -275,7 +295,7 @@ static const struct tune_params cortexa53_tunings = { &cortexa53_extra_costs, &generic_addrcost_table, - &generic_regmove_cost, + &cortexa53_regmove_cost, &generic_vector_cost, NAMED_PARAM (memmov_cost, 4), NAMED_PARAM (issue_rate, 2) @@ -285,7 +305,7 @@ static const struct tune_params cortexa57_tunings = { &cortexa57_extra_costs, &cortexa57_addrcost_table, - &generic_regmove_cost, + &cortexa57_regmove_cost, &cortexa57_vector_cost, NAMED_PARAM (memmov_cost, 4), NAMED_PARAM (issue_rate, 3)