From patchwork Thu Mar 7 02:13:48 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Cheng X-Patchwork-Id: 225697 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 1D5DD2C0378 for ; Thu, 7 Mar 2013 13:19:14 +1100 (EST) Comment: DKIM? See http://www.dkim.org DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d=gcc.gnu.org; s=default; x=1363227555; h=Comment: DomainKey-Signature:Received:Received:Received:Received:Received: From:To:References:In-Reply-To:Subject:Date:Message-ID: MIME-Version:Content-Type:Mailing-List:Precedence:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:Sender: Delivered-To; bh=dCm9jxmyqDfuPqiaK8ULEaZ2VX8=; b=dmEQLkWXKpOPOCh ijelu6ekfhY65EGer0Cu55NLyMikAXiQxQWAGPw1818AdIy/ytEbcGPkS5sfCsbU 2ZrApqhLf5HxZHv790jo+aJ2nY9YRPmg9mugsR0BM5Qj1+FUiJIFkZNO/D8J6iXA dTPM9LZmztQctoVlhh/gtAYtLmSI= Comment: DomainKeys? See http://antispam.yahoo.com/domainkeys DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=gcc.gnu.org; h=Received:Received:X-SWARE-Spam-Status:X-Spam-Check-By:Received:Received:Received:From:To:References:In-Reply-To:Subject:Date:Message-ID:MIME-Version:X-MC-Unique:Content-Type:X-IsSubscribed:Mailing-List:Precedence:List-Id:List-Unsubscribe:List-Archive:List-Post:List-Help:Sender:Delivered-To; b=Il+t0G9QYThWoEqMdfI6112wcfTcjaiy8fpI+q1v7uyaSVOtEb72iahIEEKUl9 npjOG0RHDOkBovFYXMaq8tk8tTjTqOiScW0XgYYFErQnQxb1k0TykgHMHnr9f/K/ w5YYt9Wh6UBvS09opQDt6h/FbYEQteSJqyOWDSkHU+ey0=; Received: (qmail 10800 invoked by alias); 7 Mar 2013 02:19:04 -0000 Received: (qmail 10785 invoked by uid 22791); 7 Mar 2013 02:19:01 -0000 X-SWARE-Spam-Status: No, hits=-2.0 required=5.0 tests=AWL, BAYES_00, KHOP_RCVD_UNTRUST, KHOP_SPAMHAUS_DROP, KHOP_THREADED, MSGID_MULTIPLE_AT, RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 07 Mar 2013 02:18:54 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Thu, 07 Mar 2013 02:18:52 +0000 Received: from Binsh02 ([10.1.255.212]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 7 Mar 2013 02:18:51 +0000 From: "Bin Cheng" To: References: <000f01ce163c$26b55570$74200050$@cheng@arm.com> In-Reply-To: <000f01ce163c$26b55570$74200050$@cheng@arm.com> Subject: RE: [PATCH ARM-Embedded-4_7-branch] fixing incoorect instruction length in checkin r193980 Date: Thu, 7 Mar 2013 10:13:48 +0800 Message-ID: <000001ce1ad9$6a043890$3e0ca9b0$@cheng@arm.com> MIME-Version: 1.0 X-MC-Unique: 113030702185202201 X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org My bad for missing the patch. As stated in previous message, the patch has already been applied to ARM-Embedded-4_7-Branch. Thanks. > -----Original Message----- > From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-owner@gcc.gnu.org] On > Behalf Of Bin Cheng > Sent: Friday, March 01, 2013 1:18 PM > To: gcc-patches@gcc.gnu.org > Cc: Joey Ye > Subject: [PATCH ARM-Embedded-4_7-branch] fixing incoorect instruction length > in checkin r193980 > > Hi, > On ARM-Embedded-4_7 branch, check-in(r193980) causes a "branch out of range" > bug. Root cause is the incorrect instruction length set by that check-in. > Since the length of instruction should strictly reflect the pattern it matches, > this patch fixes it by correcting the length. > > Patch applied to ARM-Embedded-4_7-branch as r196368. > > Thanks. > > > 2013-03-01 Bin Cheng > > * config/arm/arm.md (*arm_addsi3, *arm_subsi3_insn, *arm_mulsi3_v6) > (*arm_andsi3_insn, andsi_notsi_si, *iorsi3_insn, *arm_xorsi3) > (*arm_shiftsi3): Change attribute length from 2 to 4 for all > alternatives. > > > > Index: gcc/config/arm/arm.md =================================================================== --- gcc/config/arm/arm.md (revision 196332) +++ gcc/config/arm/arm.md (working copy) @@ -746,7 +746,7 @@ operands[1], 0); DONE; " - [(set_attr "length" "2,4,4,4,4,4,2,4,4,4,4,16") + [(set_attr "length" "4,4,4,4,4,4,4,4,4,4,4,16") (set_attr "predicable" "yes") (set_attr "arch" "t2,*,*,*,t2,t2,t2,*,*,t2,t2,*")] ) @@ -1234,7 +1234,7 @@ INTVAL (operands[1]), operands[0], operands[2], 0); DONE; " - [(set_attr "length" "4,2,4,4,16") + [(set_attr "length" "4,4,4,4,16") (set_attr "predicable" "yes") (set_attr "arch" "*,t2,*,*,*")] ) @@ -1360,7 +1360,7 @@ (match_operand:SI 2 "s_register_operand" "0,r")))] "TARGET_32BIT && arm_arch6" "mul%?\\t%0, %1, %2" - [(set_attr "length" "2,4") + [(set_attr "length" "4,4") (set_attr "insn" "mul") (set_attr "predicable" "yes") (set_attr "arch" "t2,*")] @@ -2213,7 +2213,7 @@ INTVAL (operands[2]), operands[0], operands[1], 0); DONE; " - [(set_attr "length" "2,2,4,4,16") + [(set_attr "length" "4,4,4,4,16") (set_attr "predicable" "yes") (set_attr "arch" "t2,t2,*,*,*")] ) @@ -2797,7 +2797,7 @@ (match_operand:SI 1 "s_register_operand" "0,r")))] "TARGET_32BIT" "bic%?\\t%0, %1, %2" - [(set_attr "length" "2,4") + [(set_attr "length" "4,4") (set_attr "predicable" "yes") (set_attr "arch" "t2,*")] ) @@ -2943,7 +2943,7 @@ INTVAL (operands[2]), operands[0], operands[1], 0); DONE; } - [(set_attr "length" "2,4,4,16") + [(set_attr "length" "4,4,4,16") (set_attr "arch" "t2,32,t2,32") (set_attr "predicable" "yes")]) @@ -3080,7 +3080,7 @@ INTVAL (operands[2]), operands[0], operands[1], 0); DONE; } - [(set_attr "length" "2,4,16") + [(set_attr "length" "4,4,16") (set_attr "predicable" "yes") (set_attr "arch" "t2,*,*")] ) @@ -3692,7 +3692,7 @@ (match_operand:SI 2 "reg_or_int_operand" "l,rM")]))] "TARGET_32BIT" "* return arm_output_shift(operands, 0);" - [(set_attr "length" "2,4") + [(set_attr "length" "4,4") (set_attr "predicable" "yes") (set_attr "shift" "1") (set (attr "type") (if_then_else (match_operand 2 "const_int_operand" "")