Show patches with: Submitter = Maciej W. Rozycki       |    State = Action Required       |   121 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[committed] MAINTAINERS: Update my e-mail address [committed] MAINTAINERS: Update my e-mail address - - - - --- 2024-02-03 Maciej W. Rozycki New
[2/2] RISC-V/testsuite: Add RTL cset-sext.c testcase variants RISC-V/testsuite: Add RTL if-conversion testcases - - - - --- 2024-01-24 Maciej W. Rozycki New
[1/2] RISC-V/testsuite: Add RTL pr105314.c testcase variants RISC-V/testsuite: Add RTL if-conversion testcases - - - - --- 2024-01-24 Maciej W. Rozycki New
[2/2] RISC-V/testsuite: Also verify if-conversion runs for pr105314.c RISC-V/testsuite: A couple of improvements for pr105314.c - - - - --- 2024-01-11 Maciej W. Rozycki New
[1/2] RISC-V/testsuite: Widen coverage for pr105314.c RISC-V/testsuite: A couple of improvements for pr105314.c - - - - --- 2024-01-11 Maciej W. Rozycki New
[committed] RISC-V/testsuite: Fix comment termination in pr105314.c [committed] RISC-V/testsuite: Fix comment termination in pr105314.c - - - - --- 2024-01-10 Maciej W. Rozycki New
RISC-V: Also handle sign extension in branch costing RISC-V: Also handle sign extension in branch costing - - - - --- 2024-01-08 Maciej W. Rozycki New
[1/1] testsuite: Support test execution timeout factor as a keyword Support per-test execution timeout factor - - - - --- 2023-12-12 Maciej W. Rozycki New
[DejaGNU,1/1] Support per-test execution timeout factor [DejaGNU,1/1] Support per-test execution timeout factor - - - - --- 2023-12-12 Maciej W. Rozycki New
AArch64/testsuite: Use non-capturing parentheses with ccmp_1.c AArch64/testsuite: Use non-capturing parentheses with ccmp_1.c - - - - --- 2023-11-22 Maciej W. Rozycki New
ARM/testsuite: Use non-capturing parentheses with pr53447-5.c ARM/testsuite: Use non-capturing parentheses with pr53447-5.c - - - - --- 2023-11-22 Maciej W. Rozycki New
testsuite: Fix subexpressions with `scan-assembler-times' testsuite: Fix subexpressions with `scan-assembler-times' - - - - --- 2023-11-19 Maciej W. Rozycki New
RISC-V: Remove duplicate `order_operator' predicate RISC-V: Remove duplicate `order_operator' predicate - - - - --- 2023-11-19 Maciej W. Rozycki New
[44/44] RISC-V/testsuite: Add branchless cases for FP NE cond-add operation RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[43/44] RISC-V/testsuite: Add branched cases for FP NE cond-add operation RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[42/44] RISC-V/testsuite: Add branched cases for FP NE cond-move operations RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[41/44] RISC-V/testsuite: Add branched cases for FP NE cond-move operations RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[40/44] RISC-V: Handle FP NE operator via inversion in cond-operation expansion RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[39/44] RISC-V/testsuite: Add branchless cases for generic FP cond adds RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[38/44] RISC-V/testsuite: Add branched cases for generic FP cond adds RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[37/44] RISC-V/testsuite: Add branchless cases for generic FP cond moves RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[36/44] RISC-V/testsuite: Add branched cases for generic FP cond moves RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[35/44] RISC-V: Avoid extraneous integer comparison for FP comparisons RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[34/44] RISC-V: Provide FP conditional-branch instructions for if-conversion RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[33/44] RISC-V: Also allow FP conditions in `riscv_expand_conditional_move' RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[32/44] RISC-V: Only use SUBREG if applicable in `riscv_expand_float_scc' RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[31/44] RISC-V/testsuite: Add branchless cases for generic integer cond adds RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[30/44] RISC-V/testsuite: Add branched cases for generic integer cond adds RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[29/44] RISC-V: Add `addMODEcc' implementation for generic targets RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[28/44] RISC-V/testsuite: Add branchless cases for generic integer cond moves RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[27/44] RISC-V/testsuite: Add branched cases for generic integer cond moves RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[26/44] RISC-V: Add `movMODEcc' implementation for generic targets RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[25/44] RISC-V: Implement `riscv_emit_unary' helper RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[24/44] RISC-V/testsuite: Add branchless cases for T-Head non-equality cond moves RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[23/44] RISC-V/testsuite: Add branched cases for T-Head non-equality cond moves RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[22/44] RISC-V: Fold all the cond-move variants together RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[21/44] RISC-V: Also accept constants for T-Head cond-move data input operands RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[20/44] RISC-V: Also accept constants for T-Head cond-move comparison operands RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[19/44] RISC-V/testsuite: Add branchless cases for equality cond-move operations RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[18/44] RISC-V/testsuite: Add branched cases for equality cond-move operations RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[17/44] RISC-V: Avoid extraneous EQ or NE operation in cond-move expansion RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[16/44] RISC-V/testsuite: Add branchless cases for GEU and LEU cond-move operations RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[15/44] RISC-V/testsuite: Add branched cases for GEU and LEU cond-move operations RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[14/44] RISC-V: Also invert the cond-move condition for GEU and LEU RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[12/44] RISC-V/testsuite: Add branched cases for FP cond-move operations RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[11/44] RISC-V/testsuite: Add branchless cases for integer cond-move operations RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[10/44] RISC-V/testsuite: Add branched cases for integer cond-move operations RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[09/44] RISC-V: Rework branch costing model for if-conversion RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[08/44] RISC-V: Simplify EQ vs NE selection in `riscv_expand_conditional_move' RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[07/44] RISC-V: Use `nullptr' in `riscv_expand_conditional_move' RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[06/44] RISC-V: Avoid repeated GET_MODE calls in `riscv_expand_conditional_move' RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[05/44] RISC-V: Fix `mode' usage in `riscv_expand_conditional_move' RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[04/44] RISC-V: Sanitise NEED_EQ_NE_P case with `riscv_emit_int_compare' RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[03/44] RISC-V: Reorder comment on SFB patterns RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[02/44] RISC-V/testsuite: Add cases for integer SFB cond-move operations RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[01/44] testsuite: Add cases for conditional-move and conditional-add operations RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-19 Maciej W. Rozycki New
[13/44] RISC-V/testsuite: Add branchless cases for FP cond-move operations RISC-V: Various if-conversion fixes and improvements - - - - --- 2023-11-18 Maciej W. Rozycki New
[committed] RISC-V: Fix indentation of "length" attribute for branches and jumps [committed] RISC-V: Fix indentation of "length" attribute for branches and jumps - - - - --- 2023-11-10 Maciej W. Rozycki New
[RFA] PR target/111815: VAX: Only accept the index scaler as the RHS operand to ASHIFT [RFA] PR target/111815: VAX: Only accept the index scaler as the RHS operand to ASHIFT - - - - --- 2023-10-16 Maciej W. Rozycki New
RISC-V/testsuite: Enable `vect_pack_trunc' RISC-V/testsuite: Enable `vect_pack_trunc' - - - - --- 2023-10-09 Maciej W. Rozycki New
RISC-V/testsuite: Fix ILP32 RVV failures from missing <gnu/stubs-ilp32d.h> RISC-V/testsuite: Fix ILP32 RVV failures from missing <gnu/stubs-ilp32d.h> - - - - --- 2023-09-22 Maciej W. Rozycki New
[committed] testsuite: Limit bb-slp-pr95839-v8.c to 64-bit vector targets [committed] testsuite: Limit bb-slp-pr95839-v8.c to 64-bit vector targets - - - - --- 2023-07-22 Maciej W. Rozycki New
[committed] testsuite: Add 64-bit vector variant for bb-slp-pr95839.c [committed] testsuite: Add 64-bit vector variant for bb-slp-pr95839.c - - - - --- 2023-07-19 Maciej W. Rozycki New
[3/3] testsuite: Require vectors of doubles for pr97428.c testsuite: Exclude vector tests for unsupported targets - - - - --- 2023-07-06 Maciej W. Rozycki New
[2/3] testsuite: Require 128-bit vectors for bb-slp-pr95839.c testsuite: Exclude vector tests for unsupported targets - - - - --- 2023-07-06 Maciej W. Rozycki New
[1/3] testsuite: Add check for vectors of 128 bits being supported testsuite: Exclude vector tests for unsupported targets - - - - --- 2023-07-06 Maciej W. Rozycki New
[v2] RISC-V: Avoid redundant sign-extension for SImode SGE, SGEU, SLE, SLEU [v2] RISC-V: Avoid redundant sign-extension for SImode SGE, SGEU, SLE, SLEU - - - - --- 2022-11-28 Maciej W. Rozycki New
testsuite: Fix missing EFFECTIVE_TARGETS variable errors testsuite: Fix missing EFFECTIVE_TARGETS variable errors - - - - --- 2022-11-15 Maciej W. Rozycki New
ira: Remove duplicate `memset' over `full_costs' from `assign_hard_reg' ira: Remove duplicate `memset' over `full_costs' from `assign_hard_reg' - - - - --- 2022-11-14 Maciej W. Rozycki New
[committed] ira: Fix `create_insn_allocnos' `outer' parameter documentation [committed] ira: Fix `create_insn_allocnos' `outer' parameter documentation - - - - --- 2022-11-14 Maciej W. Rozycki New
RISC-V: Avoid redundant sign-extension for SImode SGE, SGEU, SLE, SLEU RISC-V: Avoid redundant sign-extension for SImode SGE, SGEU, SLE, SLEU - - - - --- 2022-08-03 Maciej W. Rozycki New
RISC-V/testsuite: Restrict remaining `fmin'/`fmax' tests to hard float RISC-V/testsuite: Restrict remaining `fmin'/`fmax' tests to hard float - - - - --- 2022-07-28 Maciej W. Rozycki New
RISC-V: Standardize formatting of SFB ALU conditional move RISC-V: Standardize formatting of SFB ALU conditional move - - - - --- 2022-07-26 Maciej W. Rozycki New
RISC-V: Remove duplicate backslashes from `stack_protect_set_<mode>' RISC-V: Remove duplicate backslashes from `stack_protect_set_<mode>' - - - - --- 2022-07-26 Maciej W. Rozycki New
doc: Clarify FENV_ACCESS pragma semantics WRT `-ftrapping-math' doc: Clarify FENV_ACCESS pragma semantics WRT `-ftrapping-math' - - - - --- 2022-07-19 Maciej W. Rozycki New
RISC-V: Add RTX costs for `if_then_else' expressions RISC-V: Add RTX costs for `if_then_else' expressions - - - - --- 2022-07-18 Maciej W. Rozycki New
[committed] RISC-V/doc: Add index references for `mrelax' and `mriscv-attribute' [committed] RISC-V/doc: Add index references for `mrelax' and `mriscv-attribute' - - - - --- 2022-07-18 Maciej W. Rozycki New
[committed] RISC-V/doc: Correct the formatting of `-mstack-protector-guard-reg=' [committed] RISC-V/doc: Correct the formatting of `-mstack-protector-guard-reg=' - - - - --- 2022-07-18 Maciej W. Rozycki New
[committed] RISC-V/doc: Correct the name of `-mriscv-attribute' [committed] RISC-V/doc: Correct the name of `-mriscv-attribute' - - - - --- 2022-07-18 Maciej W. Rozycki New
[v2] RISC-V: Split unordered FP comparisons into individual RTL insns [v2] RISC-V: Split unordered FP comparisons into individual RTL insns - - - - --- 2022-07-04 Maciej W. Rozycki New
RISC-V: Split unordered FP comparisons into individual RTL insns RISC-V: Split unordered FP comparisons into individual RTL insns - - - - --- 2022-06-09 Maciej W. Rozycki New
RISC-V: Reset the length to the default of 4 for FP comparisons RISC-V: Reset the length to the default of 4 for FP comparisons - - - - --- 2022-06-09 Maciej W. Rozycki New
[committed] RISC-V: Use a tab rather than space with FSFLAGS [committed] RISC-V: Use a tab rather than space with FSFLAGS - - - - --- 2022-06-09 Maciej W. Rozycki New
[RESEND,committed,v4] RISC-V: Provide `fmin'/`fmax' RTL patterns [RESEND,committed,v4] RISC-V: Provide `fmin'/`fmax' RTL patterns - - - - --- 2022-05-10 Maciej W. Rozycki New
[Ada] PR ada/98724: Alpha/Linux/libada: Use wraplf for Aux_Long_Long_Float [Ada] PR ada/98724: Alpha/Linux/libada: Use wraplf for Aux_Long_Long_Float - - - - --- 2022-02-13 Maciej W. Rozycki New
[v4,GCC13] RISC-V: Provide `fmin'/`fmax' RTL patterns [v4,GCC13] RISC-V: Provide `fmin'/`fmax' RTL patterns - - - - --- 2022-02-08 Maciej W. Rozycki New
[v2] doc: RISC-V: Document the `-misa-spec=' option [v2] doc: RISC-V: Document the `-misa-spec=' option 1 - 1 - --- 2022-02-04 Maciej W. Rozycki New
doc: RISC-V: Document the `-misa-spec=' option doc: RISC-V: Document the `-misa-spec=' option - - - - --- 2022-02-04 Maciej W. Rozycki New
[v3,GCC13] RISC-V: Provide `fmin'/`fmax' RTL patterns [v3,GCC13] RISC-V: Provide `fmin'/`fmax' RTL patterns - - - - --- 2022-02-01 Maciej W. Rozycki New
RISC-V/testsuite: Run target testing over all the usual optimization levels RISC-V/testsuite: Run target testing over all the usual optimization levels - - - - --- 2022-01-31 Maciej W. Rozycki New
RISC-V: Add target machine headers as a dependency for riscv-sr.o RISC-V: Add target machine headers as a dependency for riscv-sr.o - - - - --- 2022-01-31 Maciej W. Rozycki New
RISC-V: Document `auipc' and `bitmanip' `type' attributes RISC-V: Document `auipc' and `bitmanip' `type' attributes - - - - --- 2022-01-27 Maciej W. Rozycki New
[GCC13] Don't force side effects for hardware vector element broadcast [GCC13] Don't force side effects for hardware vector element broadcast - - - - --- 2022-01-27 Maciej W. Rozycki New
[v2,GCC13] RISC-V: Provide `fmin'/`fmax' RTL patterns [v2,GCC13] RISC-V: Provide `fmin'/`fmax' RTL patterns - - - - --- 2022-01-26 Maciej W. Rozycki New
[GCC13?] RISC-V: Replace `smin'/`smax' RTL patterns with `fmin'/`fmax' [GCC13?] RISC-V: Replace `smin'/`smax' RTL patterns with `fmin'/`fmax' 1 - - - --- 2022-01-20 Maciej W. Rozycki New
RISC-V: Fix use-after-free error in `parse_multiletter_ext' RISC-V: Fix use-after-free error in `parse_multiletter_ext' - - - - --- 2022-01-18 Maciej W. Rozycki New
[committed] VAX: Implement the `-mlra' command-line option [committed] VAX: Implement the `-mlra' command-line option - - - - --- 2021-11-15 Maciej W. Rozycki New
[committed] VAX: Add the `setmemhi' instruction [committed] VAX: Add the `setmemhi' instruction - - - - --- 2021-11-14 Maciej W. Rozycki New
[committed,v2,11] ranger: Fix `-Werror' build error with `ranger_cache::push_poor_value' [committed,v2,11] ranger: Fix `-Werror' build error with `ranger_cache::push_poor_value' - - - - --- 2021-11-03 Maciej W. Rozycki New
PR middle-end/103059: reload: Also accept ASHIFT with indexed addressing PR middle-end/103059: reload: Also accept ASHIFT with indexed addressing - - - - --- 2021-11-03 Maciej W. Rozycki New
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