Patchwork GNU Compiler Collection

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Patch A/R/T Date Submitter Delegate State
[AArch64] Break -mcpu tie between the compiler and assembler 0 0 0 2015-08-20 James Greenhalgh New
[AArch64] Break -mcpu tie between the compiler and assembler 0 0 0 2015-08-19 James Greenhalgh New
[AArch64] Change aarch64 vector cost to match vectorizer 0 0 0 2015-08-04 Pawel Kupidura New
[AArch64] Change aarch64 vector cost to match vectorizer 0 0 0 2015-08-04 Pawel Kupidura New
[AArch64] Change aarch64 vector cost to match vectorizer 0 0 0 2015-07-27 Pawel Kupidura New
[AArch64] Change iterator for neg<mode>2 from VDQM to VDQ. 0 0 0 2013-04-25 James Greenhalgh New
[AArch64] Change to pass -mabi=* directly to the assembler 0 0 0 2013-07-19 Yufeng Zhang New
[AArch64] Cheap fix for argument types of vmull_high_lane_{us}{16,32} 0 0 0 2014-09-11 James Greenhalgh New
[AArch64] Classify FRAME_POINTER_REGNUM and ARG_POINTER_REGNUM as POINTER_REGS. 0 0 0 2013-10-16 Marcus Shawcroft New
[AArch64] Cleanup logic around aarch64_final_prescan 0 0 0 2014-10-22 Kyrylo Tkachov New
[AArch64] Compare Negative instruction in shift and extend mode 0 0 0 2013-04-10 Hurugalawadi, Naveen New
[AArch64] Compare instruction in shift_extend mode 0 0 0 2013-04-17 Hurugalawadi, Naveen New
[AArch64] Compare instruction in shift_extend mode 0 0 0 2013-04-15 Hurugalawadi, Naveen New
[AArch64] Compare instruction in shift_extend mode 0 0 0 2013-04-12 Hurugalawadi, Naveen New
[AArch64] Convert NEON frint implementations to use builtins. 0 0 0 2013-04-26 James Greenhalgh New
[AArch64] Convert ld1, st1 arm_neon.h intrinsics to RTL builtins. 0 0 0 2013-07-04 James Greenhalgh New
[AArch64] Convert ld1, st1 arm_neon.h intrinsics to RTL builtins. 0 0 0 2013-07-02 James Greenhalgh New
[AArch64] Correct cache line size calculation 0 0 0 2012-09-03 Marcus Shawcroft New
[AArch64] Define BE loader name. 0 0 0 2014-01-06 Marcus Shawcroft New
[AArch64] Define TARGET_FLAGS_REGNUM 0 0 0 2014-02-28 Ramana Radhakrishnan New
[AArch64] Define __ARM_NEON by default 0 0 0 2014-02-24 Ian Bolton New
[AArch64] Define vec_extract. 0 0 0 2013-11-05 Tejas Belagod New
[AArch64] Describe the 'BSL' RTL pattern more accurately. 0 0 0 2013-04-25 James Greenhalgh New
[AArch64] Do not overwrite cost in bswap case 0 0 0 2015-05-01 Kyrylo Tkachov New
[AArch64] Enable Address sanitizer and UB sanitizer 0 0 0 2014-09-26 Andreas Schwab New
[AArch64] Enable Address sanitizer and UB sanitizer 0 0 0 2014-09-05 Christophe Lyon New
[AArch64] Enable Redundant Extension Elimination by default at 02 or higher 0 0 0 2013-04-24 Ian Bolton New
[AArch64] Enable shrink wrap 0 0 0 2014-09-04 Jiong Wang New
[AArch64] Enable shuffle on big-endian and turn on the testsuite 0 0 0 2014-04-11 Alan Lawrence New
[AArch64] Error out of arm_neon.h if nofp/nosimd 0 0 0 2015-01-14 Kyrylo Tkachov New
[AArch64] Expand binary operations' constant operands for neon intrinsics. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] FP vdiv tescase made big-endian safe 0 0 0 2013-11-19 Alex Velenko New
[AArch64] Fall back to -fPIC if no support of -fpic relocation modifer in assembler 0 0 0 2015-06-29 Jiong Wang New
[AArch64] Fix Cortex-A53 shift costs 0 0 0 2015-05-01 Wilco New
[AArch64] Fix Cortex-A53 shift costs 0 0 0 2015-03-05 Wilco New
[AArch64] Fix FAIL: gcc.target/aarch64/target_attr_crypto_ice_1.c (internal compiler error) 0 0 0 2015-08-19 Kyrylo Tkachov New
[AArch64] Fix ICE at -O0 on vld1_lane intrinsics 0 0 0 2014-11-25 Alan Lawrence New
[AArch64] Fix LINUX_TARGET_LINK_SPEC to be consistent with ARM 0 0 0 2015-07-22 Szabolcs Nagy New
[AArch64] Fix Narrowing high shifts. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Fix PR 63724 - Improve immediate generation 0 0 0 2014-11-12 Ramana Radhakrishnan New
[AArch64] Fix PR 63724 - Improve immediate generation 0 0 0 2014-11-07 Ramana Radhakrishnan New
[AArch64] Fix PR 64263: Do not try to split constants when destination is SIMD reg 0 0 0 2014-12-12 Kyrylo Tkachov New
[AArch64] Fix PR 65624 (ICE in aarch64-linux-gnueabi crosscompiler on i686 host). 0 0 0 2015-04-01 max New
[AArch64] Fix PR/65770 vstN_lane on bigendian 0 0 0 2015-04-16 Alan Lawrence New
[AArch64] Fix PR63293 0 0 0 2014-09-25 Jiong Wang New
[AArch64] Fix PR63293 0 0 0 2014-09-19 Jiong Wang New
[AArch64] Fix REG_CFA_RESTORE mode. 0 0 0 2014-06-10 Marcus Shawcroft New
[AArch64] Fix __builtin_aarch64_absdi, must not fold to ABS_EXPR 0 0 0 2014-11-17 Alan Lawrence New
[AArch64] Fix aarch64_rtx_costs of PLUS/MINUS 0 0 0 2015-03-04 Wilco New
[AArch64] Fix aarch64_simd_valid_immediate for Bigendian 0 0 0 2014-03-21 Alan Lawrence New
[AArch64] Fix abitest for ilp32 0 0 0 2015-01-14 Hurugalawadi, Naveen New
[AArch64] Fix argument types for some high_lane* intrinsics implemented in assembly 0 0 0 2014-07-09 Kyrylo Tkachov New
[AArch64] Fix behaviour of -mcpu option to match ARM. 0 0 0 2014-01-16 James Greenhalgh New
[AArch64] Fix categorisation of the frecp* insns. 0 0 0 2013-09-03 James Greenhalgh New
[AArch64] Fix configure test for AArch64 dwarf2 debug_line 0 0 0 2013-08-22 Paolo Carlini New
[AArch64] Fix configure test for AArch64 dwarf2 debug_line 0 0 0 2013-08-22 Julian Brown New
[AArch64] Fix default CPU configurations 0 0 0 2014-02-25 Kyrylo Tkachov New
[AArch64] Fix duplication in test case. 0 0 0 2013-04-03 Tejas Belagod New
[AArch64] Fix early-clobber operands to vtbx[1,3] 0 0 0 2013-10-12 James Greenhalgh New
[AArch64] Fix early-clobber operands to vtbx[1,3] 0 0 0 2013-10-11 James Greenhalgh New
[AArch64] Fix faulty commit of testsuite/gcc.target/aarch64/csinc-2.c 0 0 0 2012-11-16 Ian Bolton New
[AArch64] Fix for LDR/STR to/from S and D registers 0 0 0 2013-05-01 Ian Bolton New
[AArch64] Fix for PR62040 0 0 0 2014-09-04 Carrot Wei New
[AArch64] Fix for PR62040 0 0 0 2014-08-20 Carrot Wei New
[AArch64] Fix geniterators.sh to use standard BRE syntax in sed 0 0 0 2015-03-23 Szabolcs Nagy New
[AArch64] Fix illegal assembly 'eon v1, v2, v3' 0 0 0 2015-02-11 Alan Lawrence New
[AArch64] Fix illegal assembly 'eon v1, v2, v3' 0 0 0 2015-01-28 Alan Lawrence New
[AArch64] Fix integer vabs intrinsics 0 0 0 2014-05-02 James Greenhalgh New
[AArch64] Fix invalid assembler in scalar_intrinsics.c test 0 0 0 2013-05-22 Ian Bolton New
[AArch64] Fix macro in vdup_lane_2 test case 0 0 0 2014-05-08 Ian Bolton New
[AArch64] Fix name of macros called in the vdup_lane Neon intrinsics 0 0 0 2013-08-12 James Greenhalgh New
[AArch64] Fix offset glitch in load reg pair pattern 0 0 0 2014-07-29 Jiong Wang New
[AArch64] Fix operand costing logic for MINUS 0 0 0 2015-04-27 Kyrylo Tkachov New
[AArch64] Fix order of modes to lroundmn2 standard names. 0 0 0 2013-04-26 James Greenhalgh New
[AArch64] Fix output template for Scalar Neon->Neon register move. 0 0 0 2013-10-16 James Greenhalgh New
[AArch64] Fix over length lines around aarch64_save_or_restore_fprs 0 0 0 2013-11-20 Marcus Shawcroft New
[AArch64] Fix parameters to vcvtx_high 0 0 0 2013-09-06 James Greenhalgh New
[AArch64] Fix possible wrong code generation when comparing DImode values. 0 0 0 2014-02-24 James Greenhalgh New
[AArch64] Fix possible wrong code generation when comparing DImode values. 0 0 0 2013-05-23 James Greenhalgh New
[AArch64] Fix predicate and constraint mismatch in logical atomic operations 0 0 0 2014-09-25 Michael Collison New
[AArch64] Fix preferred_reload_class for regclass STACK_REG. 0 0 0 2013-10-16 Marcus Shawcroft New
[AArch64] Fix printf format warning in aarch64_print_operand 0 0 0 2013-04-22 James Greenhalgh New
[AArch64] Fix register constraints for lane intrinsics. 0 0 0 2013-09-06 James Greenhalgh New
[AArch64] Fix shuffle for big-endian. 0 0 0 2014-04-02 Tejas Belagod New
[AArch64] Fix shuffle for big-endian. 0 0 0 2014-02-21 Tejas Belagod New
[AArch64] Fix size of memory store for the vst<n>_lane intrinsics 0 0 0 2013-10-29 James Greenhalgh New
[AArch64] Fix some reg-to-reg move scheduler types 0 0 0 2014-06-10 Kyrylo Tkachov New
[AArch64] Fix some saturating math NEON intrinsics types 0 0 0 2014-06-30 Kyrylo Tkachov New
[AArch64] Fix some saturating math NEON intrinsics types 0 0 0 2014-06-16 Kyrylo Tkachov New
[AArch64] Fix some warnings about unused variables. 0 0 0 2012-12-18 James Greenhalgh New
[AArch64] Fix the description of simd_fabd 0 0 0 2013-05-02 Vidya Praveen New
[AArch64] Fix the generation of .arch and .cpu assembly directives 0 0 0 2013-04-10 Yufeng Zhang New
[AArch64] Fix the pointer-typed function argument expansion in aarch64_simd_expand_args 0 0 0 2013-09-10 Yufeng Zhang New
[AArch64] Fix the pointer-typed function argument expansion in aarch64_simd_expand_args 0 0 0 2013-09-10 Yufeng Zhang New
[AArch64] Fix type of *<LOGICAL:optab>_one_cmpl_<SHIFT:optab><mode>3 pattern 0 0 0 2015-06-01 Kyrylo Tkachov New
[AArch64] Fix type of add_losym_<mode> 0 0 0 2014-07-14 Richard Earnshaw New
[AArch64] Fix types for some multiply instructions. 0 0 0 2013-09-06 James Greenhalgh New
[AArch64] Fix types for vcvt<sd>_n intrinsics. 0 0 0 2013-10-17 James Greenhalgh New
[AArch64] Fix types for vqdmlals_lane_s32 and vqdmlsls_lane_s32 intrinsics 0 0 0 2014-08-04 Kyrylo Tkachov New
[AArch64] Fix types of second parameter to qtbl/qtbx intrinsics 0 0 0 2013-09-06 James Greenhalgh New