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Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
RISC-V: Enable movmisalign for VLS modes
RISC-V: Enable movmisalign for VLS modes
- - - -
-
-
-
2023-08-29
钟居哲
New
RISC-V: Make sure we get VL REG operand for VLMAX vsetvl
RISC-V: Make sure we get VL REG operand for VLMAX vsetvl
- - - -
-
-
-
2023-08-30
钟居哲
New
middle-end: Apply MASK_LEN_LOAD_LANES/MASK_LEN_STORE_LANES to ivopts/alias
middle-end: Apply MASK_LEN_LOAD_LANES/MASK_LEN_STORE_LANES to ivopts/alias
- - - -
-
-
-
2023-08-30
钟居哲
New
[V5] RISC-V: Enable vec_int testsuite for RVV VLA vectorization
[V5] RISC-V: Enable vec_int testsuite for RVV VLA vectorization
- - - -
-
-
-
2023-08-30
钟居哲
New
test: Add xfail for riscv_vector
test: Add xfail for riscv_vector
- - - -
-
-
-
2023-08-30
钟居哲
New
test: Fix XPASS of RVV
test: Fix XPASS of RVV
- - - -
-
-
-
2023-08-30
钟居哲
New
test: Adapt slp-26.c check for RVV
test: Adapt slp-26.c check for RVV
- - - -
-
-
-
2023-08-30
钟居哲
New
test: Add xfail into slp-reduc-7.c for RVV VLA vectorization
test: Add xfail into slp-reduc-7.c for RVV VLA vectorization
- - - -
-
-
-
2023-08-30
钟居哲
New
[V6] RISC-V: Enable vec_int testsuite for RVV VLA vectorization
[V6] RISC-V: Enable vec_int testsuite for RVV VLA vectorization
- - - -
-
-
-
2023-08-30
钟居哲
New
RISC-V: Add Vector cost model framework for RVV
RISC-V: Add Vector cost model framework for RVV
- - - -
-
-
-
2023-08-31
钟居哲
New
RISC-V: Enable VECT_COMPARE_COSTS by default
RISC-V: Enable VECT_COMPARE_COSTS by default
- - - -
-
-
-
2023-08-31
钟居哲
New
RISC-V: Add dynamic LMUL compile option
RISC-V: Add dynamic LMUL compile option
- - - -
-
-
-
2023-08-31
钟居哲
New
RISC-V: Fix Dynamic LMUL compile option
RISC-V: Fix Dynamic LMUL compile option
- - - -
-
-
-
2023-09-04
钟居哲
New
RISC-V: Support Dynamic LMUL Cost model
RISC-V: Support Dynamic LMUL Cost model
- - - -
-
-
-
2023-09-04
钟居哲
New
RISC-V: Export functions as global extern preparing for dynamic LMUL patch use
RISC-V: Export functions as global extern preparing for dynamic LMUL patch use
- - - -
-
-
-
2023-09-05
钟居哲
New
[V2] RISC-V: Support Dynamic LMUL Cost model
[V2] RISC-V: Support Dynamic LMUL Cost model
- - - -
-
-
-
2023-09-05
钟居哲
New
RISC-V: Fix incorrect mode tieable which cause ICE in RA[PR111296]
RISC-V: Fix incorrect mode tieable which cause ICE in RA[PR111296]
- - - -
-
-
-
2023-09-06
钟居哲
New
RISC-V: Remove unreasonable TARGET_64BIT for VLS modes with size = 64bit
RISC-V: Remove unreasonable TARGET_64BIT for VLS modes with size = 64bit
- - - -
-
-
-
2023-09-06
钟居哲
New
RISC-V: Fix VSETVL PASS AVL/VL fetch bug[111295]
RISC-V: Fix VSETVL PASS AVL/VL fetch bug[111295]
- - - -
-
-
-
2023-09-06
钟居哲
New
[Committed,V2] RISC-V: Fix incorrect mode tieable which cause ICE in RA[PR111296]
[Committed,V2] RISC-V: Fix incorrect mode tieable which cause ICE in RA[PR111296]
- - - -
-
-
-
2023-09-06
钟居哲
New
RISC-V: Remove incorrect earliest vsetvl post optimization[PR111313]
RISC-V: Remove incorrect earliest vsetvl post optimization[PR111313]
- - - -
-
-
-
2023-09-07
钟居哲
New
RISC-V: Enable RVV scalable vectorization by default[PR111311]
RISC-V: Enable RVV scalable vectorization by default[PR111311]
- - - -
-
-
-
2023-09-07
钟居哲
New
RISC-V: Add VLS mask modes mov patterns[PR111311]
RISC-V: Add VLS mask modes mov patterns[PR111311]
- - - -
-
-
-
2023-09-07
钟居哲
New
RISC-V: Replace rtx REG for zero REGS operations
RISC-V: Replace rtx REG for zero REGS operations
- - - -
-
-
-
2023-09-07
钟居哲
New
RISC-V: Fix incorrect nregs calculation for VLS modes
RISC-V: Fix incorrect nregs calculation for VLS modes
- - - -
-
-
-
2023-09-08
钟居哲
New
RISC-V: Suppress bogus warning for VLS types
RISC-V: Suppress bogus warning for VLS types
- - - -
-
-
-
2023-09-08
钟居哲
New
[Committed] RISC-V: Fix VLS floating-point operations predicate
[Committed] RISC-V: Fix VLS floating-point operations predicate
- - - -
-
-
-
2023-09-09
钟居哲
New
RISC-V: Add VLS modes VEC_PERM support[PR111311]
RISC-V: Add VLS modes VEC_PERM support[PR111311]
- - - -
-
-
-
2023-09-09
钟居哲
New
RISC-V: Fix dump FILE of VSETVL PASS[PR111311]
RISC-V: Fix dump FILE of VSETVL PASS[PR111311]
- - - -
-
-
-
2023-09-09
钟居哲
New
RISC-V: Expand fixed-vlmax/vls vector permutation in targethook
RISC-V: Expand fixed-vlmax/vls vector permutation in targethook
- - - -
-
-
-
2023-09-10
钟居哲
New
RISC-V: Avoid unnecessary slideup in compress pattern of vec_perm
RISC-V: Avoid unnecessary slideup in compress pattern of vec_perm
- - - -
-
-
-
2023-09-10
钟居哲
New
[V2] RISC-V: Avoid unnecessary slideup in compress pattern of vec_perm
[V2] RISC-V: Avoid unnecessary slideup in compress pattern of vec_perm
- - - -
-
-
-
2023-09-10
钟居哲
New
[Committed] RISC-V: Add missing VLS mask bool mode reg -> reg patterns
[Committed] RISC-V: Add missing VLS mask bool mode reg -> reg patterns
- - - -
-
-
-
2023-09-11
钟居哲
New
[Committed,V2] RISC-V: Add VLS modes VEC_PERM support[PR111311]
[Committed,V2] RISC-V: Add VLS modes VEC_PERM support[PR111311]
- - - -
-
-
-
2023-09-11
钟居哲
New
RISC-V: Use dominance analysis in global vsetvl elimination
RISC-V: Use dominance analysis in global vsetvl elimination
- - - -
-
-
-
2023-09-11
钟居哲
New
RISC-V: Remove redundant functions
RISC-V: Remove redundant functions
- - - -
-
-
-
2023-09-11
钟居哲
New
[V2] RISC-V: Support Dynamic LMUL Cost model
[V2] RISC-V: Support Dynamic LMUL Cost model
- - - -
-
-
-
2023-09-11
钟居哲
New
[V3] RISC-V: Support Dynamic LMUL Cost model
[V3] RISC-V: Support Dynamic LMUL Cost model
- - - -
-
-
-
2023-09-11
钟居哲
New
[V4] RISC-V: Support Dynamic LMUL Cost model
[V4] RISC-V: Support Dynamic LMUL Cost model
- - - -
-
-
-
2023-09-12
钟居哲
New
[V5] RISC-V: Support Dynamic LMUL Cost model
[V5] RISC-V: Support Dynamic LMUL Cost model
- - - -
-
-
-
2023-09-12
钟居哲
New
RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337]
RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337]
- - - -
-
-
-
2023-09-12
钟居哲
New
[V2] RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337]
[V2] RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337]
- - - -
-
-
-
2023-09-12
钟居哲
New
[committed] RISC-V: Remove redundant ABI test
[committed] RISC-V: Remove redundant ABI test
- - - -
-
-
-
2023-09-13
钟居哲
New
RISC-V: Support VLS modes VEC_EXTRACT auto-vectorization
RISC-V: Support VLS modes VEC_EXTRACT auto-vectorization
- - - -
-
-
-
2023-09-13
钟居哲
New
RISC-V: Expand VLS mode to scalar mode move[PR111391]
RISC-V: Expand VLS mode to scalar mode move[PR111391]
- - - -
-
-
-
2023-09-13
钟居哲
New
[V2] RISC-V: Expand VLS mode to scalar mode move[PR111391]
[V2] RISC-V: Expand VLS mode to scalar mode move[PR111391]
- - - -
-
-
-
2023-09-13
钟居哲
New
RISC-V: Fix ICE in get_avl_or_vl_reg[PR111395]
RISC-V: Fix ICE in get_avl_or_vl_reg[PR111395]
- - - -
-
-
-
2023-09-14
钟居哲
New
[V2] RISC-V: Fix ICE in get_avl_or_vl_reg
[V2] RISC-V: Fix ICE in get_avl_or_vl_reg
- - - -
-
-
-
2023-09-14
钟居哲
New
[V3] RISC-V: Fix ICE in get_avl_or_vl_reg
[V3] RISC-V: Fix ICE in get_avl_or_vl_reg
- - - -
-
-
-
2023-09-14
钟居哲
New
[Committed] RISC-V: Format VSETVL PASS code
[Committed] RISC-V: Format VSETVL PASS code
- - - -
-
-
-
2023-09-14
钟居哲
New
[V3] RISC-V: Expand VLS mode to scalar mode move[PR111391]
[V3] RISC-V: Expand VLS mode to scalar mode move[PR111391]
- - - -
-
-
-
2023-09-14
钟居哲
New
[V4] RISC-V: Expand VLS mode to scalar mode move[PR111391]
[V4] RISC-V: Expand VLS mode to scalar mode move[PR111391]
- - - -
-
-
-
2023-09-14
钟居哲
New
RISC-V: Support VLS modes mask operations
RISC-V: Support VLS modes mask operations
- - - -
-
-
-
2023-09-14
钟居哲
New
RISC-V: Support VLS modes vec_init auto-vectorization
RISC-V: Support VLS modes vec_init auto-vectorization
- - - -
-
-
-
2023-09-15
钟居哲
New
test: Remove XPASS for RISCV
test: Remove XPASS for RISCV
- - - -
-
-
-
2023-09-15
钟居哲
New
test: Block slp-16.c check for target support vect_strided6
test: Block slp-16.c check for target support vect_strided6
- - - -
-
-
-
2023-09-15
钟居哲
New
test: Isolate slp-1.c check of target supports vect_strided5
test: Isolate slp-1.c check of target supports vect_strided5
- - - -
-
-
-
2023-09-15
钟居哲
New
test: Block vect_strided5 for slp-34-big-array.c SLP check
test: Block vect_strided5 for slp-34-big-array.c SLP check
- - - -
-
-
-
2023-09-15
钟居哲
New
test: Block SLP check of slp-34.c for vect_strided5
test: Block SLP check of slp-34.c for vect_strided5
- - - -
-
-
-
2023-09-15
钟居哲
New
test: Block SLP check of slp-35.c for vect_strided5
test: Block SLP check of slp-35.c for vect_strided5
- - - -
-
-
-
2023-09-15
钟居哲
New
internal-fn: Convert uninitialized SSA_NAME into SCRATCH rtx[PR110751]
internal-fn: Convert uninitialized SSA_NAME into SCRATCH rtx[PR110751]
- - - -
-
-
-
2023-09-16
钟居哲
New
RISC-V: Support VLS modes reduction[PR111153]
RISC-V: Support VLS modes reduction[PR111153]
- - - -
-
-
-
2023-09-17
钟居哲
New
[V2] internal-fn: Support undefined rtx for uninitialized SSA_NAME
[V2] internal-fn: Support undefined rtx for uninitialized SSA_NAME
- - - -
-
-
-
2023-09-17
钟居哲
New
[V3] internal-fn: Support undefined rtx for uninitialized SSA_NAME
[V3] internal-fn: Support undefined rtx for uninitialized SSA_NAME
- - - -
-
-
-
2023-09-18
钟居哲
New
[Committed] RISC-V: Remove redundant codes of VLS patterns[NFC]
[Committed] RISC-V: Remove redundant codes of VLS patterns[NFC]
- - - -
-
-
-
2023-09-18
钟居哲
New
RISC-V: Remove autovec-vls.md file and clean up VLS move modes[NFC]
RISC-V: Remove autovec-vls.md file and clean up VLS move modes[NFC]
- - - -
-
-
-
2023-09-18
钟居哲
New
[Committed] RISC-V: Fix VSETVL PASS fusion bug
[Committed] RISC-V: Fix VSETVL PASS fusion bug
- - - -
-
-
-
2023-09-18
钟居哲
New
[Committed] RISC-V: Support VLS reduction
[Committed] RISC-V: Support VLS reduction
- - - -
-
-
-
2023-09-18
钟居哲
New
[Committed] RISC-V: Fix bogus FAILs of vsetvl testcases
[Committed] RISC-V: Fix bogus FAILs of vsetvl testcases
- - - -
-
-
-
2023-09-18
钟居哲
New
RISC-V: Remove redundant vec_duplicate pattern
RISC-V: Remove redundant vec_duplicate pattern
- - - -
-
-
-
2023-09-18
钟居哲
New
RISC-V: Fix RVV can change mode class bug
RISC-V: Fix RVV can change mode class bug
- - - -
-
-
-
2023-09-19
钟居哲
New
[V2] RISC-V: Fix RVV can change mode class bug
[V2] RISC-V: Fix RVV can change mode class bug
- - - -
-
-
-
2023-09-19
钟居哲
New
[Committed] RISC-V: Support integer FMA/FNMA VLS modes autovectorization
[Committed] RISC-V: Support integer FMA/FNMA VLS modes autovectorization
- - - -
-
-
-
2023-09-19
钟居哲
New
[Committed] RISC-V: Support VLS floating-point FMA/FNMA/FMS auto-vectorization
[Committed] RISC-V: Support VLS floating-point FMA/FNMA/FMS auto-vectorization
- - - -
-
-
-
2023-09-19
钟居哲
New
[Committed] RISC-V: Support VLS unary floating-point patterns
[Committed] RISC-V: Support VLS unary floating-point patterns
- - - -
-
-
-
2023-09-19
钟居哲
New
RISC-V: Add FNMS floating-point VLS tests
RISC-V: Add FNMS floating-point VLS tests
- - - -
-
-
-
2023-09-19
钟居哲
New
[Committed] RISC-V: Extend VLS modes in 'VWEXTI' iterator
[Committed] RISC-V: Extend VLS modes in 'VWEXTI' iterator
- - - -
-
-
-
2023-09-20
钟居哲
New
[Committed] RISC-V: Fix Demand comparison bug[VSETVL PASS]
[Committed] RISC-V: Fix Demand comparison bug[VSETVL PASS]
- - - -
-
-
-
2023-09-20
钟居哲
New
[Committed] RISC-V: Support VLS floating-point extend/truncate
[Committed] RISC-V: Support VLS floating-point extend/truncate
- - - -
-
-
-
2023-09-20
钟居哲
New
[Committed,V4] internal-fn: Support undefined rtx for uninitialized SSA_NAME[PR110751]
[Committed,V4] internal-fn: Support undefined rtx for uninitialized SSA_NAME[PR110751]
- - - -
-
-
-
2023-09-20
钟居哲
New
[Committed] RISC-V: Support VLS INT <-> FP conversions
[Committed] RISC-V: Support VLS INT <-> FP conversions
- - - -
-
-
-
2023-09-21
钟居哲
New
RISC-V: Fix SUBREG move of VLS mode[PR111486]
RISC-V: Fix SUBREG move of VLS mode[PR111486]
- - - -
-
-
-
2023-09-21
钟居哲
New
RISC-V: Enable undefined support for RVV auto-vectorization[PR110751]
RISC-V: Enable undefined support for RVV auto-vectorization[PR110751]
- - - -
-
-
-
2023-09-21
钟居哲
New
[Committed] RISC-V: Support VLS mult high
[Committed] RISC-V: Support VLS mult high
- - - -
-
-
-
2023-09-21
钟居哲
New
[Committed] RISC-V: Add more VLS unary tests
[Committed] RISC-V: Add more VLS unary tests
- - - -
-
-
-
2023-09-21
钟居哲
New
[Committed] RISC-V: Add VLS integer ABS support
[Committed] RISC-V: Add VLS integer ABS support
- - - -
-
-
-
2023-09-21
钟居哲
New
RISC-V: Add VLS conditional patterns support
RISC-V: Add VLS conditional patterns support
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2023-09-22
钟居哲
New
[Committed] RISC-V: Remove @ of vec_duplicate pattern
[Committed] RISC-V: Remove @ of vec_duplicate pattern
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2023-09-22
钟居哲
New
[Committed] RISC-V: Add VLS unary combine patterns
[Committed] RISC-V: Add VLS unary combine patterns
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2023-09-23
钟居哲
New
[Committed] RISC-V: Support full coverage VLS combine support
[Committed] RISC-V: Support full coverage VLS combine support
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2023-09-24
钟居哲
New
RISC-V: Fix AVL/VL bug of VSETVL PASS[PR111548]
RISC-V: Fix AVL/VL bug of VSETVL PASS[PR111548]
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2023-09-24
钟居哲
New
RISC-V: Add opaque integer modes to fix ICE on DSE[PR111590]
RISC-V: Add opaque integer modes to fix ICE on DSE[PR111590]
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2023-09-26
钟居哲
New
MATCH: Optimize COND_ADD_LEN reduction pattern
MATCH: Optimize COND_ADD_LEN reduction pattern
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2023-09-26
钟居哲
New
[V2] MATCH: Optimize COND_ADD_LEN reduction pattern
[V2] MATCH: Optimize COND_ADD_LEN reduction pattern
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2023-09-26
钟居哲
New
MATCH: Optimize COND_ADD reduction pattern
MATCH: Optimize COND_ADD reduction pattern
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2023-09-26
钟居哲
New
[V3] MATCH: Optimize COND_ADD_LEN reduction pattern
[V3] MATCH: Optimize COND_ADD_LEN reduction pattern
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2023-09-26
钟居哲
New
[V2] MATCH: Optimize COND_ADD_LEN reduction pattern
[V2] MATCH: Optimize COND_ADD_LEN reduction pattern
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2023-09-26
钟居哲
New
[V2] MATCH: Optimize COND_ADD reduction pattern
[V2] MATCH: Optimize COND_ADD reduction pattern
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2023-09-26
钟居哲
New
[Committed] RISC-V: Fix mem-to-mem VLS move pattern[PR111566]
[Committed] RISC-V: Fix mem-to-mem VLS move pattern[PR111566]
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2023-09-26
钟居哲
New
[V2] RISC-V: Fix mem-to-mem VLS move pattern[PR111566]
[V2] RISC-V: Fix mem-to-mem VLS move pattern[PR111566]
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2023-09-26
钟居哲
New
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