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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[V2] libcpp: Optimize #pragma once with a hash table [PR58770] [V2] libcpp: Optimize #pragma once with a hash table [PR58770] - - - - --- 2022-08-01 Paul Hollinsky New
[V2] introduce light expander sra [V2] introduce light expander sra - - - - --- 2023-10-27 Jiufu Guo New
[V2] internal-fn: Support undefined rtx for uninitialized SSA_NAME [V2] internal-fn: Support undefined rtx for uninitialized SSA_NAME - - - - --- 2023-09-17 juzhe.zhong@rivai.ai New
[V2] improve bitmap / sbitmap compatability of bitmap_set_bit - - - - --- 2017-07-24 tbsaunde+gcc@tbsaunde.org New
[V2] i386: Inline function with default arch/tune to caller [V2] i386: Inline function with default arch/tune to caller - - - - --- 2023-07-04 Hongyu Wang New
[V2] gimple_fold: Support COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold [V2] gimple_fold: Support COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold - - - - --- 2023-08-22 juzhe.zhong@rivai.ai New
[V2] gcc-14/changes.html: Deprecate a GCC C extension on flexible array members. [V2] gcc-14/changes.html: Deprecate a GCC C extension on flexible array members. - - - - --- 2023-08-07 Qing Zhao New
[V2] fixed testcase riscv/pr103302.c [V2] fixed testcase riscv/pr103302.c - - - - --- 2021-12-23 Liao Shihua New
[V2] extract DF/SF/SI/HI/QI subreg from parameter word on stack [V2] extract DF/SF/SI/HI/QI subreg from parameter word on stack - - - - --- 2023-01-04 Jiufu Guo New
[V2] ctf: fix incorrect CTF for multi-dimensional array types [V2] ctf: fix incorrect CTF for multi-dimensional array types - - - - --- 2024-03-04 Indu Bhagat New
[V2] coroutines: Adjust outlined function names [PR95520]. [V2] coroutines: Adjust outlined function names [PR95520]. - - - - --- 2021-07-11 Iain Sandoe New
[V2] btf: emit linkage information in BTF_KIND_FUNC entries [V2] btf: emit linkage information in BTF_KIND_FUNC entries - - - - --- 2022-07-12 Jose E. Marchesi New
[V2] bpf: do not --enable-gcov for bpf-*-* targets [V2] bpf: do not --enable-gcov for bpf-*-* targets - - - - --- 2022-02-23 Jose E. Marchesi New
[V2] auto_vec copy/move improvements [V2] auto_vec copy/move improvements - - - - --- 2021-06-16 Trevor Saunders New
[V2] arm: add -static-pie support [V2] arm: add -static-pie support - - - - --- 2022-07-20 Lance Fredrickson New
[V2] arm: [testsuite] fix lob tests for -mfloat-abi=hard [V2] arm: [testsuite] fix lob tests for -mfloat-abi=hard - - - - --- 2020-12-01 Andrea Corallo New
[V2] arm: [testcase] Better narrow some bfloat16 testcase [V2] arm: [testcase] Better narrow some bfloat16 testcase - - - - --- 2020-11-06 Andrea Corallo New
[V2] aarch64: Use Q-reg loads/stores in movmem expansion [V2] aarch64: Use Q-reg loads/stores in movmem expansion - - - - --- 2020-07-28 Sudakshina Das New
[V2] aarch64: Implement the ACLE instruction/data prefetch functions. [V2] aarch64: Implement the ACLE instruction/data prefetch functions. - - - - --- 2023-10-30 Victor Do Nascimento New
[V2] aarch64: Do not alter force_reg returned rtx expanding pauth builtins [V2] aarch64: Do not alter force_reg returned rtx expanding pauth builtins - - - - --- 2020-09-28 Andrea Corallo New
[V2] aarch64: Add vstN_lane_bf16 + vstNq_lane_bf16 intrinsics [V2] aarch64: Add vstN_lane_bf16 + vstNq_lane_bf16 intrinsics - - - - --- 2020-10-26 Andrea Corallo New
[V2] aarch64: Add vcopy(q)__lane(q)_bf16 intrinsics [V2] aarch64: Add vcopy(q)__lane(q)_bf16 intrinsics - - - - --- 2020-10-26 Andrea Corallo New
[V2] aarch64: Add bfloat16 vldN_lane_bf16 + vldNq_lane_bf16 intrisics [V2] aarch64: Add bfloat16 vldN_lane_bf16 + vldNq_lane_bf16 intrisics - - - - --- 2020-10-26 Andrea Corallo New
[V2] VECT: Support mask_len_strided_load/mask_len_strided_store in loop vectorize [V2] VECT: Support mask_len_strided_load/mask_len_strided_store in loop vectorize - - - - --- 2023-11-06 juzhe.zhong@rivai.ai New
[V2] VECT: Support mask_len_strided_load/mask_len_strided_store in loop vectorize [V2] VECT: Support mask_len_strided_load/mask_len_strided_store in loop vectorize - - - - --- 2023-11-06 juzhe.zhong@rivai.ai New
[V2] VECT: Support loop len control on EXTRACT_LAST vectorization [V2] VECT: Support loop len control on EXTRACT_LAST vectorization - - - - --- 2023-08-10 juzhe.zhong@rivai.ai New
[V2] VECT: Support floating-point in-order reduction for length loop control [V2] VECT: Support floating-point in-order reduction for length loop control - - - - --- 2023-07-21 juzhe.zhong@rivai.ai New
[V2] VECT: Support LEN_MASK_ LOAD/STORE to support flow control for length loop control [V2] VECT: Support LEN_MASK_ LOAD/STORE to support flow control for length loop control - - - - --- 2023-06-12 juzhe.zhong@rivai.ai New
[V2] VECT: Support CALL vectorization for COND_LEN_* [V2] VECT: Support CALL vectorization for COND_LEN_* - - - - --- 2023-07-28 juzhe.zhong@rivai.ai New
[V2] VECT: Fix ICE on MASK_LEN_{LOAD, STORE} when no LEN recorded[PR110989] [V2] VECT: Fix ICE on MASK_LEN_{LOAD, STORE} when no LEN recorded[PR110989] - - - - --- 2023-08-11 juzhe.zhong@rivai.ai New
[V2] VECT: Fix ICE of variable stride on strieded load/store with SELECT_VL loop control. [V2] VECT: Fix ICE of variable stride on strieded load/store with SELECT_VL loop control. - - - - --- 2023-07-06 juzhe.zhong@rivai.ai New
[V2] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721] [V2] VECT: Enhance SLP of MASK_LEN_GATHER_LOAD[PR111721] - - - - --- 2023-10-12 juzhe.zhong@rivai.ai New
[V2] VECT: Change flow of decrement IV [V2] VECT: Change flow of decrement IV - - - - --- 2023-05-31 juzhe.zhong@rivai.ai New
[V2] VECT: Apply MASK_LEN_{LOAD_LANES, STORE_LANES} into vectorizer [V2] VECT: Apply MASK_LEN_{LOAD_LANES, STORE_LANES} into vectorizer - - - - --- 2023-08-15 juzhe.zhong@rivai.ai New
[V2] VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer [V2] VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer - - - - --- 2023-06-20 juzhe.zhong@rivai.ai New
[V2] VECT: Apply LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer [V2] VECT: Apply LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer - - - - --- 2023-07-04 juzhe.zhong@rivai.ai New
[V2] VECT: Apply COND_LEN_* into vectorizable_operation [V2] VECT: Apply COND_LEN_* into vectorizable_operation - - - - --- 2023-07-12 juzhe.zhong@rivai.ai New
[V2] VECT: Add SELECT_VL support [V2] VECT: Add SELECT_VL support - - - - --- 2023-06-05 juzhe.zhong@rivai.ai New
[V2] VECT: Add COND_LEN_* operations for loop control with length targets [V2] VECT: Add COND_LEN_* operations for loop control with length targets - - - - --- 2023-07-10 juzhe.zhong@rivai.ai New
[V2] Use system default for long double if not specified on PowerPC. [V2] Use system default for long double if not specified on PowerPC. - - - - --- 2022-02-04 Michael Meissner New
[V2] Use subscalar mode to move struct block for parameter [V2] Use subscalar mode to move struct block for parameter - - - - --- 2022-11-17 Jiufu Guo New
[V2] Use preferred mode for doloop iv [PR61837]. [V2] Use preferred mode for doloop iv [PR61837]. - - - - --- 2021-07-13 Jiufu Guo New
[V2] Update block move for struct param or returns [V2] Update block move for struct param or returns - - - - --- 2022-11-24 Jiufu Guo New
[V2] Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c [V2] Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c - - - - --- 2023-05-31 yulong New
[V2] TEST: Fix vect_cond_arith_* dump checks for RVV [V2] TEST: Fix vect_cond_arith_* dump checks for RVV - - - - --- 2023-10-08 juzhe.zhong@rivai.ai New
[V2] Support folding min(poly,poly) to const [V2] Support folding min(poly,poly) to const - - - - --- 2023-09-08 Lehua Ding New
[V2] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter in… [V2] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter in… - - - - --- 2023-08-11 Liu, Hongtao New
[V2] Split loop for NE condition. [V2] Split loop for NE condition. - - - - --- 2021-05-17 Jiufu Guo New
[V2] Simplify vector ((VCE (a cmp b ? -1 : 0)) < 0) ? c : d to just (VCE ((a cmp b) ? (VCE c) : (VC… [V2] Simplify vector ((VCE (a cmp b ? -1 : 0)) < 0) ? c : d to just (VCE ((a cmp b) ? (VCE c) : (VC… - - - - --- 2023-11-16 Liu, Hongtao New
[V2] Setup predicate for switch default case in IPA (PR ipa/91089) [V2] Setup predicate for switch default case in IPA (PR ipa/91089) - - - - --- 2019-09-02 Feng Xue OS New
[V2] Set bound/cmp/control for until wrap loop. [V2] Set bound/cmp/control for until wrap loop. - - - - --- 2021-09-02 Jiufu Guo New
[V2] SSA MATH: Support COND_LEN_FMA for floating-point math optimization [V2] SSA MATH: Support COND_LEN_FMA for floating-point math optimization - - - - --- 2023-07-13 juzhe.zhong@rivai.ai New
[V2] SCCVN: Add LEN_MASK_STORE and fix LEN_STORE [V2] SCCVN: Add LEN_MASK_STORE and fix LEN_STORE - - - - --- 2023-06-26 juzhe.zhong@rivai.ai New
[V2] Rework 128-bit complex multiply and divide, PR target/107299 [V2] Rework 128-bit complex multiply and divide, PR target/107299 - - - - --- 2022-12-13 Michael Meissner New
[V2] Restrict the two sources of vect_recog_cond_expr_convert_pattern to be of the same type when c… [V2] Restrict the two sources of vect_recog_cond_expr_convert_pattern to be of the same type when c… - - - - --- 2022-02-17 Liu, Hongtao New
[V2] Rename ufix_trunc/ufloat* patterns to fixuns_trunc/floatuns* to align with standard pattern na… [V2] Rename ufix_trunc/ufloat* patterns to fixuns_trunc/floatuns* to align with standard pattern na… - - - - --- 2023-03-30 Liu, Hongtao New
[V2] Remove empty loop with assumed finiteness (PR tree-optimization/89713) [V2] Remove empty loop with assumed finiteness (PR tree-optimization/89713) - - - - --- 2019-05-24 Feng Xue OS New
[V2] RTL_SSA: Relax PHI_MODE in phi_setup [V2] RTL_SSA: Relax PHI_MODE in phi_setup - - - - --- 2023-07-17 juzhe.zhong@rivai.ai New
[V2] RISC-V:Fix a bug that is the CMO builtins are missing parameter [V2] RISC-V:Fix a bug that is the CMO builtins are missing parameter - - - - --- 2022-06-07 yulong New
[V2] RISC-V:Add '-m[no]-csr-check' option in gcc. [V2] RISC-V:Add '-m[no]-csr-check' option in gcc. - - - - --- 2022-09-13 Jiawei New
[V2] RISC-V: decouple stack allocation for rv32e w/o save-restore. [V2] RISC-V: decouple stack allocation for rv32e w/o save-restore. - - - - --- 2023-04-29 Fei Gao New
[V2] RISC-V: XFAIL scan dump fails for autovec PR111311 [V2] RISC-V: XFAIL scan dump fails for autovec PR111311 - - - - --- 2023-12-08 Edwin Lu New
[V2] RISC-V: Using merge approach to optimize repeating sequence in vec_init [V2] RISC-V: Using merge approach to optimize repeating sequence in vec_init - - - - --- 2023-05-12 juzhe.zhong@rivai.ai New
[V2] RISC-V: Update test expectancies with recent scheduler change [V2] RISC-V: Update test expectancies with recent scheduler change - - - - --- 2024-03-12 Edwin Lu New
[V2] RISC-V: Throw compilation error for unknown sub-extension or supervisor extension [V2] RISC-V: Throw compilation error for unknown sub-extension or supervisor extension - - - - --- 2023-07-13 Lehua Ding New
[V2] RISC-V: Switch RVV cost model. [V2] RISC-V: Switch RVV cost model. - - - - --- 2024-01-10 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support one more overlap for wv instructions [V2] RISC-V: Support one more overlap for wv instructions - - - - --- 2023-12-18 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support non-SLP unordered reduction [V2] RISC-V: Support non-SLP unordered reduction - - - - --- 2023-07-17 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support movmisalign of RVV VLA modes [V2] RISC-V: Support movmisalign of RVV VLA modes - - - - --- 2023-10-09 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support in-order floating-point reduction [V2] RISC-V: Support in-order floating-point reduction - - - - --- 2023-07-20 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support highest-number regno overlap for widen ternary [V2] RISC-V: Support highest-number regno overlap for widen ternary - - - - --- 2023-12-04 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support gather_load/scatter RVV auto-vectorization [V2] RISC-V: Support gather_load/scatter RVV auto-vectorization - - - - --- 2023-07-06 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support floating-point vfwadd/vfwsub vv/wv combine lowering [V2] RISC-V: Support floating-point vfwadd/vfwsub vv/wv combine lowering - - - - --- 2023-06-28 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support const vector expansion with step vector with base != 0 [V2] RISC-V: Support const vector expansion with step vector with base != 0 - - - - --- 2023-06-26 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support combine cond extend and reduce sum to widen reduce sum [V2] RISC-V: Support combine cond extend and reduce sum to widen reduce sum - - - - --- 2023-09-20 Lehua Ding New
[V2] RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337] [V2] RISC-V: Support VECTOR BOOL vcond_mask optab[PR111337] - - - - --- 2023-09-12 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT to optimize codegen of both VLA &&… [V2] RISC-V: Support TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT to optimize codegen of both VLA &&… - - - - --- 2023-05-15 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support RVV permutation auto-vectorization [V2] RISC-V: Support RVV permutation auto-vectorization - - - - --- 2023-06-01 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support RVV floating-point auto-vectorization [V2] RISC-V: Support RVV floating-point auto-vectorization - - - - --- 2023-06-21 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support RVV VLA SLP auto-vectorization [V2] RISC-V: Support RVV VLA SLP auto-vectorization - - - - --- 2023-06-07 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support POPCOUNT auto-vectorization [V2] RISC-V: Support POPCOUNT auto-vectorization - - - - --- 2023-07-31 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support MASK_LEN_{LOAD_LANES,STORE_LANES} [V2] RISC-V: Support MASK_LEN_{LOAD_LANES,STORE_LANES} - - - - --- 2023-08-16 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support LEN_FOLD_EXTRACT_LAST auto-vectorization [V2] RISC-V: Support LEN_FOLD_EXTRACT_LAST auto-vectorization - - - - --- 2023-08-24 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support Dynamic LMUL Cost model [V2] RISC-V: Support Dynamic LMUL Cost model - - - - --- 2023-09-05 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support Dynamic LMUL Cost model [V2] RISC-V: Support Dynamic LMUL Cost model - - - - --- 2023-09-11 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support COND_LEN_* patterns [V2] RISC-V: Support COND_LEN_* patterns - - - - --- 2023-07-12 juzhe.zhong@rivai.ai New
[V2] RISC-V: Support CALL conditional autovec patterns [V2] RISC-V: Support CALL conditional autovec patterns - - - - --- 2023-08-03 juzhe.zhong@rivai.ai New
[V2] RISC-V: Specify mtune and march for PR113742 [V2] RISC-V: Specify mtune and march for PR113742 - - - - --- 2024-02-20 Edwin Lu New
[V2] RISC-V: Rework Phase 5 && Phase 6 of VSETVL PASS [V2] RISC-V: Rework Phase 5 && Phase 6 of VSETVL PASS - - - - --- 2023-06-09 juzhe.zhong@rivai.ai New
[V2] RISC-V: Replace not + bitwise_imm with li + bitwise_not [V2] RISC-V: Replace not + bitwise_imm with li + bitwise_not - - - - --- 2023-09-12 Jivan Hakobyan New
[V2] RISC-V: Remove earlyclobber for wx/wf instructions. [V2] RISC-V: Remove earlyclobber for wx/wf instructions. - - - - --- 2023-11-30 juzhe.zhong@rivai.ai New
[V2] RISC-V: Remove duplicate `#include "riscv-vector-switch.def"` [V2] RISC-V: Remove duplicate `#include "riscv-vector-switch.def"` - - - - --- 2023-06-13 Lehua Ding New
[V2] RISC-V: Refactor the framework of RVV auto-vectorization [V2] RISC-V: Refactor the framework of RVV auto-vectorization - - - - --- 2023-05-23 juzhe.zhong@rivai.ai New
[V2] RISC-V: Refactor and clean expand_cond_len_{unop, binop, ternop} [V2] RISC-V: Refactor and clean expand_cond_len_{unop, binop, ternop} - - - - --- 2023-08-29 Lehua Ding New
[V2] RISC-V: Refactor RVV machine modes [V2] RISC-V: Refactor RVV machine modes - - - - --- 2023-07-19 juzhe.zhong@rivai.ai New
[V2] RISC-V: Refactor Phase 3 (Demand fusion) of VSETVL PASS [V2] RISC-V: Refactor Phase 3 (Demand fusion) of VSETVL PASS - - - - --- 2023-08-23 juzhe.zhong@rivai.ai New
[V2] RISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743] [V2] RISC-V: Optimize vsetvli of LCM INSERTED edge for user vsetvli [PR 109743] - - - - --- 2023-05-08 juzhe.zhong@rivai.ai New
[V2] RISC-V: Optimize fault only first load [V2] RISC-V: Optimize fault only first load - - - - --- 2023-04-23 juzhe.zhong@rivai.ai New
[V2] RISC-V: Optimize comparison patterns for register allocation [V2] RISC-V: Optimize comparison patterns for register allocation - - - - --- 2023-04-24 juzhe.zhong@rivai.ai New
[V2] RISC-V: Optimize combine sequence by merge approach [V2] RISC-V: Optimize combine sequence by merge approach - - - - --- 2023-11-13 juzhe.zhong@rivai.ai New
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