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Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[2/4,AArch64] Improve error message for non-constant immediates
- - - -
-
-
-
2014-12-05
Alan Lawrence
New
[1/4,AArch64] Fix ICE on non-constant indices to __builtin_aarch64_im_lane_boundsi
- - - -
-
-
-
2014-12-05
Alan Lawrence
New
Ping with testcase: [PATCH][AArch64] Fix __builtin_aarch64_absdi, must not fold to ABS_EXPR
- - - -
-
-
-
2014-12-03
Alan Lawrence
New
Ping with testcase: [PATCH][AArch64] Fix __builtin_aarch64_absdi, must not fold to ABS_EXPR
- - - -
-
-
-
2014-11-26
Alan Lawrence
New
[AArch64] Fix ICE at -O0 on vld1_lane intrinsics
- - - -
-
-
-
2014-11-25
Alan Lawrence
New
[AArch64] Tidy up aarch64_simd_expand_args
- - - -
-
-
-
2014-11-17
Alan Lawrence
New
[ARM] Remove vec_shr and vec_shl optabs
- - - -
-
-
-
2014-11-17
Alan Lawrence
New
[AArch64] Fix __builtin_aarch64_absdi, must not fold to ABS_EXPR
- - - -
-
-
-
2014-11-17
Alan Lawrence
New
[AArch64] Add vec_shr pattern for 64-bit vectors using ush{l,r}; enable tests.
- - - -
-
-
-
2014-11-14
Alan Lawrence
New
[3/3,AArch64] Replace temporary assembler for vld1_dup
- - - -
-
-
-
2014-11-14
Alan Lawrence
New
[2/3,AArch64] Extend aarch64_simd_vec_set pattern, replace asm for vld1_lane
- - - -
-
-
-
2014-11-14
Alan Lawrence
New
[1/3,AArch64] Replace __builtin_aarch64_createv1df with a cast, cleanup
- - - -
-
-
-
2014-11-14
Alan Lawrence
New
[AArch64] Remove/merge redundant iterators
- - - -
-
-
-
2014-11-13
Alan Lawrence
New
[4/4,Vectorizer] Make reductions-via-shifts and vec_shr_optab endianness-neutral
- - - -
-
-
-
2014-11-12
Alan Lawrence
New
[3/4] Remove VEC_RSHIFT_EXPR tree code, now unused
- - - -
-
-
-
2014-11-12
Alan Lawrence
New
[2/4,Vectorizer] Use a VEC_PERM_EXPR instead of VEC_RSHIFT_EXPR; expand appropriate VEC_PERM_EXPRs …
- - - -
-
-
-
2014-11-12
Alan Lawrence
New
[1/4,Vectorizer] Split vect_gen_perm_mask into _checked and _any variants
- - - -
-
-
-
2014-11-12
Alan Lawrence
New
[10/11,RS6000] Migrate reduction optabs to reduc_..._scal
- - - -
-
-
-
2014-11-12
Alan Lawrence
New
[AArch64] Add bounds checking to vqdm*_lane intrinsics via a qualifier that also flips endianness
- - - -
-
-
-
2014-11-06
Alan Lawrence
New
Relax check against commuting XOR and ASHIFTRT in combine.c
- - - -
-
-
-
2014-10-24
Alan Lawrence
New
[Protopatch,11/11,IA64] Migrate to reduc_(plus|min|max)_scal_v2df optab
- - - -
-
-
-
2014-10-24
Alan Lawrence
New
[10/11,RS6000] Migrate reduction optabs to reduc_..._scal
- - - -
-
-
-
2014-10-24
Alan Lawrence
New
[9/11,i386] Migrate reduction optabs to reduc_..._scal
- - - -
-
-
-
2014-10-24
Alan Lawrence
New
[8/11,ARM] Migrate to new reduc_[us](min|max)_scal_optab
- - - -
-
-
-
2014-10-24
Alan Lawrence
New
[7/11,ARM] Migrate to new reduc_plus_scal_optab
- - - -
-
-
-
2014-10-24
Alan Lawrence
New
[v2,0-6/11] Fix PR/61114, make direct vector reductions endianness-neutral
- - - -
-
-
-
2014-10-24
Alan Lawrence
New
Relax check against commuting XOR and ASHIFTRT in combine.c
- - - -
-
-
-
2014-10-23
Alan Lawrence
New
[PATCH/RFC,v2,3/14] Add new optabs for reducing vectors to scalars
- - - -
-
-
-
2014-09-25
Alan Lawrence
New
[PATCH/RFC,v2,3/14] Add new optabs for reducing vectors to scalars
- - - -
-
-
-
2014-09-25
Alan Lawrence
New
[2/14,Vectorizer] Make REDUC_xxx_EXPR tree codes produce a scalar result
- - - -
-
-
-
2014-09-24
Alan Lawrence
New
Put all constants last in tree_swap_operands_p, remove odd -Os check
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
[16,/,14+2,MIPS] Remove vec_shl and (hopefully) fix vec_shr
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
[PATCH/RFC,15,/,14+2,RS6000] Remove vec_shl and (hopefully) fix vec_shr
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
[14/14,Vectorizer] Tidy up vect_create_epilog / use_scalar_result
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
[13/14,AArch64_be] Fix vec_shr pattern to correctly implement endianness-neutral optab
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
[12/14,Vectorizer] Redefine VEC_RSHIFT_EXPR and vec_shr_optab as endianness-neutral
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
[11/14] Remove VEC_LSHIFT_EXPR and vec_shl_optab
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
[10/14,AArch64] Implement vec_shr optab
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
[9/14] Enforce whole-vector-shifts to always be by a whole number of elements
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
[8/14,Testsuite] Add tests of reductions using whole-vector-shifts (ior)
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
[7/14,Testsuite] Add tests of reductions using whole-vector-shifts (multiplication)
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
[6/14,AArch64] Restore gimple_folding of reduction intrinsics
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
[5/14,AArch64] Use new reduc_[us](min|max)_scal optabs, inc. for builtins
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
[4/14,AArch64] Use new reduc_plus_scal optabs, inc. for __builtins
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
[3/14] Add new optabs for reducing vectors to scalars
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
[2/14,Vectorizer] Make REDUC_xxx_EXPR tree codes produce a scalar result
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
[1/14,AArch64] Temporarily remove aarch64_gimple_fold_builtin code for reduction operations
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
Relax check against commuting XOR and ASHIFTRT in combine.c
- - - -
-
-
-
2014-09-18
Alan Lawrence
New
[AArch64,Testsuite] Fix scan-assembler test false alarm on aarch64-linux-gnu
- - - -
-
-
-
2014-09-09
Alan Lawrence
New
[AArch64] Simplify vreinterpret for float64x1_t using casts.
- - - -
-
-
-
2014-09-08
Alan Lawrence
New
[2/2,AArch64] Replace temporary inline assembler for vset_lane
- - - -
-
-
-
2014-09-08
Alan Lawrence
New
[1/2,AArch64,Testsuite] Add execution test of vset(q?)_lane intrinsics.
- - - -
-
-
-
2014-09-08
Alan Lawrence
New
[2/2,AArch64] Simplify+improve patterns for ushr(d?)_n_u64 intrinsic
- - - -
-
-
-
2014-09-08
Alan Lawrence
New
[1/2,AArch64] Simplify patterns for sshr_n_[us]64 intrinsic
- - - -
-
-
-
2014-09-08
Alan Lawrence
New
[Obvious] Remove unused aarch64_types_cmtst_qualifiers, was breaking bootstrap.
- - - -
-
-
-
2014-09-08
Alan Lawrence
New
[AArch64,Testsuite] Add a test of the vst[234](q?) intrinsics
- - - -
-
-
-
2014-09-08
Alan Lawrence
New
[AArch64,Testsuite] Add a test of the vldN_lane intrinsic
- - - -
-
-
-
2014-09-08
Alan Lawrence
New
[AArch64,Testsuite] Add a test of vldN_dup intrinsics
- - - -
-
-
-
2014-09-08
Alan Lawrence
New
[AArch64,Testsuite] Extend test of vld1+vst1 intrinsics to cover more variants
- - - -
-
-
-
2014-09-08
Alan Lawrence
New
[AArch64,Testsuite] Add test of vld[234]q? intrinsic
- - - -
-
-
-
2014-09-08
Alan Lawrence
New
[4.9,AArch64] Backport r214953: Rename [u]int32x1_t to [u]int32_t (resp 16x1, 8x1)in arm_neon.h
- - - -
-
-
-
2014-09-05
Alan Lawrence
New
[AArch64] Tidy: remove unused qualifier_const_pointer
- - - -
-
-
-
2014-08-20
Alan Lawrence
New
[AArch64] One-liner: fix type of an add in SIMD registers
- - - -
-
-
-
2014-08-20
Alan Lawrence
New
[AArch64] Remove varargs from aarch64_simd_expand_args
- - - -
-
-
-
2014-08-20
Alan Lawrence
New
[AArch64] Add a builtin for rbit(q?)_p8; add intrinsics and tests.
- - - -
-
-
-
2014-08-19
Alan Lawrence
New
[AArch64,2/2] Remove vector compare/tst __builtins
- - - -
-
-
-
2014-08-19
Alan Lawrence
New
[AArch64,1/2] Improve codegen of vector compares inc. tst instruction
- - - -
-
-
-
2014-08-19
Alan Lawrence
New
[AArch64,3/3] Fix XOR_one_cmpl pattern; add SIMD-reg variants for BIC,ORN,EON
- - - -
-
-
-
2014-08-12
Alan Lawrence
New
[AArch64,2/3] Add SIMD-reg variants of logical operators and/ior/xor/not
- - - -
-
-
-
2014-08-12
Alan Lawrence
New
[AArch64,1/3] Don't disparage add/sub in SIMD registers
- - - -
-
-
-
2014-08-12
Alan Lawrence
New
[AArch64,2/2] Replace temporary inline assembler for vget_high
- - - -
-
-
-
2014-08-12
Alan Lawrence
New
[AArch64,1/2] Add execution tests of vget_low and vget_high
- - - -
-
-
-
2014-08-12
Alan Lawrence
New
[AArch64] Prefer dup to zip for vec_perm_const; enable dup for bigendian; add testcase.
- - - -
-
-
-
2014-08-04
Alan Lawrence
New
[AArch64] Removed unused get_lane and dup_lane builtins.
- - - -
-
-
-
2014-08-01
Alan Lawrence
New
[RFC,Vectorizer,AArch64] Fix PR/61114 by redefining REDUC_xxx_EXPR tree codes to return scalars
- - - -
-
-
-
2014-08-01
Alan Lawrence
New
[AArch64] Rename [u]int32x1_t to [u]int32_t (resp 16x1, 8x1) in arm_neon.h
- - - -
-
-
-
2014-07-24
Alan Lawrence
New
Relax check against commuting XOR and ASHIFTRT in combine.c
- - - -
-
-
-
2014-07-17
Alan Lawrence
New
Does anyone use Ada on Alpha?
- - - -
-
-
-
2014-07-16
Alan Lawrence
New
Relax check against commuting XOR and ASHIFTRT in combine.c
- - - -
-
-
-
2014-07-16
Alan Lawrence
New
[4.9,AArch64] Backport 211892: PR/60825 Make float64x1_t in arm_neon.h a proper vector type
- - - -
-
-
-
2014-07-08
Alan Lawrence
New
[4.9,ARM] Backport r211369 PR/61062 Fix arm_neon.h ZIP/UZP/TRN for Bigendian
- - - -
-
-
-
2014-07-08
Alan Lawrence
New
[4.9,AArch64,testsuite] Backport r211502: PR/59843 Fix ICE on singleton vector of float on AArch64
- - - -
-
-
-
2014-07-04
Alan Lawrence
New
[ARM/AArch64,Testsuite] Fix vext[us]64_1.c test on ARM by unsharing test body
- - - -
-
-
-
2014-07-03
Alan Lawrence
New
Relax check against commuting XOR and ASHIFTRT in combine.c
- - - -
-
-
-
2014-06-30
Alan Lawrence
New
[AARCH64] fix and enable non-const shuffle for bigendian using TBL instruction
- - - -
-
-
-
2014-06-25
Alan Lawrence
New
[AArch64,2/2] PR/60825 Make {int,uint}64x1_t in arm_neon.h a proper vector type
- - - -
-
-
-
2014-06-24
Alan Lawrence
New
[Obvious,AArch64,testsuite] Add --save-temps to singleton_intrinsics_1.c test.
- - - -
-
-
-
2014-06-24
Alan Lawrence
New
[4.9,ARM] Backport r210219: "Neon Intrinsics TLC - remove ML"
- - - -
-
-
-
2014-06-23
Alan Lawrence
New
[4.8,ARM] Backport of r211369: PR/61062 Fix arm_neon.h ZIP/UZP/TRN for bigendian
- - - -
-
-
-
2014-06-19
Alan Lawrence
New
[AArch64,2/2] PR/60825 Make {int,uint}64x1_t in arm_neon.h a proper vector type
- - - -
-
-
-
2014-06-19
Alan Lawrence
New
[AArch64,1/2] PR/60825 Make float64x1_t in arm_neon.h a proper vector type
- - - -
-
-
-
2014-06-19
Alan Lawrence
New
[4.8,ARM] Backport r210219: "Neon Intrinsics TLC - remove ML"
- - - -
-
-
-
2014-06-16
Alan Lawrence
New
[Committed,Obvious] Remove duplicated vect-singleton_1.c test body
- - - -
-
-
-
2014-06-13
Alan Lawrence
New
[AArch64/ARM,2/3] Recognize shuffle patterns for REV instructions on AArch64, rewrite intrinsics.
- - - -
-
-
-
2014-06-03
Alan Lawrence
New
[AArch64/ARM,2/3] Detect EXT patterns to vec_perm_const, use for EXT intrinsics
- - - -
-
-
-
2014-06-03
Alan Lawrence
New
[AArch64] Remove from arm_neon.h functions not in the spec
- - - -
-
-
-
2014-05-29
Alan Lawrence
New
[AArch64,2/2] Correct signedness of builtins, remove casts from arm_neon.h
- - - -
-
-
-
2014-05-29
Alan Lawrence
New
[AArch64,1/2] Correct signedness of builtins, remove casts from arm_neon.h
- - - -
-
-
-
2014-05-29
Alan Lawrence
New
[AArch64] Remove from arm_neon.h functions not in the spec
- - - -
-
-
-
2014-05-27
Alan Lawrence
New
[AArch64,/,testsuite] Add V1DFmode, fixes PR/59843
- - - -
-
-
-
2014-05-15
Alan Lawrence
New
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