Patchwork GNU Compiler Collection

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Patch A/R/T Date Submitter Delegate State
[AArch64] Fix possible wrong code generation when comparing DImode values. 0 0 0 2014-02-24 James Greenhalgh New
[AArch64] Fix possible wrong code generation when comparing DImode values. 0 0 0 2013-05-23 James Greenhalgh New
[AArch64] Fix predicate and constraint mismatch in logical atomic operations 0 0 0 2014-09-25 Michael Collison New
[AArch64] Fix preferred_reload_class for regclass STACK_REG. 0 0 0 2013-10-16 Marcus Shawcroft New
[AArch64] Fix printf format warning in aarch64_print_operand 0 0 0 2013-04-22 James Greenhalgh New
[AArch64] Fix register constraints for lane intrinsics. 0 0 0 2013-09-06 James Greenhalgh New
[AArch64] Fix shuffle for big-endian. 0 0 0 2014-04-02 Tejas Belagod New
[AArch64] Fix shuffle for big-endian. 0 0 0 2014-02-21 Tejas Belagod New
[AArch64] Fix size of memory store for the vst<n>_lane intrinsics 0 0 0 2013-10-29 James Greenhalgh New
[AArch64] Fix some reg-to-reg move scheduler types 0 0 0 2014-06-10 Kyrylo Tkachov New
[AArch64] Fix some saturating math NEON intrinsics types 0 0 0 2014-06-30 Kyrylo Tkachov New
[AArch64] Fix some saturating math NEON intrinsics types 0 0 0 2014-06-16 Kyrylo Tkachov New
[AArch64] Fix some warnings about unused variables. 0 0 0 2012-12-18 James Greenhalgh New
[AArch64] Fix the description of simd_fabd 0 0 0 2013-05-02 Vidya Praveen New
[AArch64] Fix the generation of .arch and .cpu assembly directives 0 0 0 2013-04-10 Yufeng Zhang New
[AArch64] Fix the pointer-typed function argument expansion in aarch64_simd_expand_args 0 0 0 2013-09-10 Yufeng Zhang New
[AArch64] Fix the pointer-typed function argument expansion in aarch64_simd_expand_args 0 0 0 2013-09-10 Yufeng Zhang New
[AArch64] Fix type of *<LOGICAL:optab>_one_cmpl_<SHIFT:optab><mode>3 pattern 0 0 0 2015-06-01 Kyrylo Tkachov New
[AArch64] Fix type of add_losym_<mode> 0 0 0 2014-07-14 Richard Earnshaw New
[AArch64] Fix types for some multiply instructions. 0 0 0 2013-09-06 James Greenhalgh New
[AArch64] Fix types for vcvt<sd>_n intrinsics. 0 0 0 2013-10-17 James Greenhalgh New
[AArch64] Fix types for vqdmlals_lane_s32 and vqdmlsls_lane_s32 intrinsics 0 0 0 2014-08-04 Kyrylo Tkachov New
[AArch64] Fix types of second parameter to qtbl/qtbx intrinsics 0 0 0 2013-09-06 James Greenhalgh New
[AArch64] Fix typo in aarch64_builtin_reciprocal. 0 0 0 2015-12-01 Ramana Radhakrishnan New
[AArch64] Fix unordered comparisons to floating-point vcond. 0 0 0 2013-01-18 James Greenhalgh New
[AArch64] Fix up BSL expander for floating point types 0 0 0 2014-11-11 James Greenhalgh New
[AArch64] Fix usage of +no in error message for aarch64_parse_extension 0 0 0 2014-12-10 Kyrylo Tkachov New
[AArch64] Fix vcond where comparison and result have different types. 0 0 0 2013-05-14 James Greenhalgh New
[AArch64] Fix vcvt_high_f64_f32 and vcvt_figh_f32_f64 intrinsics. 0 0 0 2015-09-21 James Greenhalgh New
[AArch64] Fix vcvt_high_f64_f32 and vcvt_figh_f32_f64 intrinsics. 0 0 0 2015-09-10 James Greenhalgh New
[AArch64] Fix vcvt_high_f64_f32 and vcvt_figh_f32_f64 intrinsics. 0 0 0 2015-09-09 James Greenhalgh New
[AArch64] Fix vdup<bhsd>_lane<q>_* intrinsics' lane parameter. 0 0 0 2013-09-05 Tejas Belagod New
[AArch64] Fix vfmaq_lane_f64. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Fix vld1<q>_* asm constraints in arm_neon.h 0 0 0 2013-04-24 James Greenhalgh New
[AArch64] Fix vmovn_high_*, vqmovn_high_* and vqmovun_high_* intrinsics. 0 0 0 2013-01-03 Tejas Belagod New
[AArch64] Fix vqtb[lx][234] on big-endian 0 0 0 2015-11-06 Christophe Lyon New
[AArch64] Fix whitespace around aarch64_movdi_<mode>low 0 0 0 2013-11-19 Marcus Shawcroft New
[AArch64] Fix wrong ".cfi_def_cfa_offset" in epilogue 0 0 0 2014-08-20 Jiong Wang New
[AArch64] Fix wrong-code bug in right-shift SISD patterns 0 0 0 2015-02-18 Kyrylo Tkachov New
[AArch64] Fix/revert fallout from machine_mode change 0 0 0 2014-10-29 Kyrylo Tkachov New
[AArch64] Fixup the vget_lane RTL patterns and intrinsics 0 0 0 2013-08-05 James Greenhalgh New
[AArch64] Fold max and min reduction builtins to tree. 0 0 0 2013-04-30 James Greenhalgh New
[AArch64] Force __builtin_aarch64_fp[sc]r argument into a REG 0 0 0 2015-09-14 Richard Sandiford New
[AArch64] Force register scaling out of mem ref and comment why 0 0 0 2016-02-04 Bin Cheng New
[AArch64] Fully support rotate on logical operations 0 0 0 2014-03-26 Richard Earnshaw New
[AArch64] GCC 6 regression in vector performance. - Fix vector initialization to happen with lane load instructions. 0 0 0 2016-01-20 James Greenhalgh New
[AArch64] Generalize code alignment 0 0 0 2014-12-12 Wilco New
[AArch64] Get %c output template tests to pass for -fPIC 0 0 0 2013-10-21 Kyrylo Tkachov New
[AArch64] Handle -|x| case using a single csneg 0 0 0 2015-07-13 Kyrylo Tkachov New
[AArch64] Handle CSEL of zero_extended operands in rtx costs 0 0 0 2016-01-11 Kyrill Tkachov New
[AArch64] Handle FLOAT and UNSIGNED_FLOAT in rtx costs 0 0 0 2015-05-01 Kyrylo Tkachov New
[AArch64] Handle REG+REG+CONST and REG+NON_REG+CONST in legitimize address 0 0 0 2015-12-04 Bin.Cheng New
[AArch64] Handle REG+REG+CONST and REG+NON_REG+CONST in legitimize address 0 0 0 2015-12-03 Bin.Cheng New
[AArch64] Handle REG+REG+CONST and REG+NON_REG+CONST in legitimize address 0 0 0 2015-12-01 Bin.Cheng New
[AArch64] Handle REG+REG+CONST and REG+NON_REG+CONST in legitimize address 0 0 0 2015-11-19 Bin.Cheng New
[AArch64] Handle REG+REG+CONST and REG+NON_REG+CONST in legitimize address 0 0 0 2015-11-17 Bin Cheng New
[AArch64] Handle SYMBOL_SMALL_TPREL appropriately 0 0 0 2015-02-02 Hurugalawadi, Naveen New
[AArch64] Handle compare of zero_extract form of TST-immediate in rtx costs 0 0 0 2016-01-11 Kyrill Tkachov New
[AArch64] Handle const address in aarch64_print_operand 0 0 0 2015-09-08 Jiong Wang New
[AArch64] Handle fcvta[su] and frint in RTX cost function 0 0 0 2014-07-10 Kyrylo Tkachov New
[AArch64] Handle function literal pools according to function size 0 0 0 2015-11-13 Evandro Menezes New
[AArch64] Handle symbol + offset more effectively 0 0 0 2012-09-25 Ian Bolton New
[AArch64] Handle vector float modes properly in aarch64_output_simd_mov_immediate 0 0 0 2015-10-27 Kyrylo Tkachov New
[AArch64] Handle wrong cost for addition of minus immediate in aarch64_rtx_costs. 0 0 0 2015-06-26 Bin Cheng New
[AArch64] Implement %c output template 0 0 0 2013-10-17 Kyrylo Tkachov New
[AArch64] Implement -fpic for -mcmodel=small 0 0 0 2015-05-20 Jiong Wang New
[AArch64] Implement -m{cpu,tune,arch}=native using only /proc/cpuinfo 0 0 0 2015-04-22 Kyrylo Tkachov New
[AArch64] Implement -m{cpu,tune,arch}=native using only /proc/cpuinfo 0 0 0 2015-04-22 Kyrylo Tkachov New
[AArch64] Implement -m{cpu,tune,arch}=native using only /proc/cpuinfo 0 0 0 2015-04-20 Kyrylo Tkachov New
[AArch64] Implement ADD in vector registers for 32-bit scalar values. 0 0 0 2014-06-23 James Greenhalgh New
[AArch64] Implement ADD in vector registers for 32-bit scalar values. 0 0 0 2014-05-16 James Greenhalgh New
[AArch64] Implement ADD in vector registers for 32-bit scalar values. 0 0 0 2014-03-28 James Greenhalgh New
[AArch64] Implement Bitwise AND and Set Flags 0 0 0 2013-01-29 Hurugalawadi, Naveen New
[AArch64] Implement HARD_REGNO_CALLER_SAVE_MODE 0 0 0 2014-05-12 Ian Bolton New
[AArch64] Implement SIMD Absolute Difference Instructions 0 0 0 2013-02-27 Hurugalawadi, Naveen New
[AArch64] Implement SIMD Absolute Difference Instructions 0 0 0 2013-02-27 Hurugalawadi, Naveen New
[AArch64] Implement SIMD Absolute Difference Instructions 0 0 0 2013-02-27 Hurugalawadi, Naveen New
[AArch64] Implement SIMD Absolute Difference Instructions 0 0 0 2013-01-30 Hurugalawadi, Naveen New
[AArch64] Implement TARGET_GIMPLE_FOLD_BUILTIN for aarch64 backend. 0 0 0 2013-04-25 James Greenhalgh New
[AArch64] Implement TARGET_SCHED_MACRO_FUSION_PAIR_P 0 0 0 2014-11-13 Kyrylo Tkachov New
[AArch64] Implement TARGET_SCHED_MACRO_FUSION_PAIR_P 0 0 0 2014-11-11 Kyrylo Tkachov New
[AArch64] Implement TARGET_SHIFT_TRUNCATION_MASK. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Implement Vector Permute Support 0 0 0 2014-01-16 Alex Velenko New
[AArch64] Implement Vector Permute Support 0 0 0 2014-01-14 Alex Velenko New
[AArch64] Implement Vector Permute Support 0 0 0 2012-12-04 James Greenhalgh New
[AArch64] Implement adrp+add fusion 0 0 0 2014-11-12 Kyrylo Tkachov New
[AArch64] Implement bswaphi2 with rev16 0 0 0 2012-11-16 Ian Bolton New
[AArch64] Implement copysign[ds]f3 0 0 0 2015-09-16 James Greenhalgh New
[AArch64] Implement ctz and clrsb standard patterns 0 0 0 2012-09-18 Ian Bolton New
[AArch64] Implement ctz and clrsb standard patterns 0 0 0 2012-09-18 Ian Bolton New
[AArch64] Implement ctz and clrsb standard patterns 0 0 0 2012-09-18 Ian Bolton New
[AArch64] Implement ffs standard pattern 0 0 0 2012-09-14 Ian Bolton New
[AArch64] Implement fnma, fms and fnms standard patterns 0 0 0 2012-09-14 Ian Bolton New
[AArch64] Implement framework for Tree/Gimple Implementation of NEON intrinsics. 0 0 0 2013-03-14 Tejas Belagod New
[AArch64] Implement framework for Tree/Gimple Implementation of NEON intrinsics. 0 0 0 2013-03-14 Tejas Belagod New
[AArch64] Implement movmem for the benefit of inline memcpy 0 0 0 2014-08-05 Andrew Pinski New
[AArch64] Implement movmem for the benefit of inline memcpy 0 0 0 2014-06-06 James Greenhalgh New
[AArch64] Implement section anchors 0 0 0 2012-09-06 James Greenhalgh New
[AArch64] Implement some saturating math NEON intrinsics 0 0 0 2014-08-04 Kyrylo Tkachov New
[AArch64] Implement some vca*_f[32,64] intrinsics 0 0 0 2014-07-10 Kyrylo Tkachov New