Patchwork GNU Compiler Collection

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Patch A/R/T Date Submitter Delegate State
[AARCH64] movi type attribute confusion 0 0 0 2015-06-12 Jim Wilson New
[AARch64,COMMITTED] Move saved_varargs_size. 0 0 0 2014-06-05 Marcus Shawcroft New
[AArch32,NEON] Implementing vmaxnmQ_ST and vminnmQ_ST intrinsics. 0 0 0 2016-01-08 Bilyan Borisov New
[AArch32,NEON] Implementing vmaxnmQ_ST and vminnmQ_ST intrinsincs. 0 0 0 2015-12-21 Bilyan Borisov New
[AArch32] Additional bics patterns. 0 0 0 2015-05-15 Alex Velenko New
[AArch32] Additional bics patterns. 0 0 0 2015-04-24 Alex Velenko New
[AArch32] Additional bics patterns. 0 0 0 2015-04-22 Alex Velenko New
[AArch32] Testcase fix for __ATOMIC_CONSUME 0 0 0 2015-01-27 Alex Velenko New
[AArch64,-mtune,cleanup,1/5] Remove -march=generic. 0 0 0 2013-11-13 James Greenhalgh New
[AArch64,-mtune,cleanup,2/5] Tune for Cortex-A53 by default. 0 0 0 2013-11-13 James Greenhalgh New
[AArch64,-mtune,cleanup,3/5,Temporary] When asked to tune for Cortex-A57, tune for Cortex-A15 0 0 0 2013-11-13 James Greenhalgh New
[AArch64,-mtune,cleanup,4/5] Remove "example-1", "example-2" tuning options. 0 0 0 2013-11-13 James Greenhalgh New
[AArch64,-mtune,cleanup,5/5] Update invoke.texi 0 0 0 2013-11-13 James Greenhalgh New
[AArch64,/,testsuite] Add V1DFmode, fixes PR/59843 0 0 0 2014-05-15 Alan Lawrence New
[AArch64,01/14] Use "generic" target, if no other default. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,02/14] Add "xgene1" core identifier. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,03/14] Retrieve BRANCH_COST from tuning structure. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,04/14] Correct the maximum shift amount for shifted operands. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,05/14] Add AArch64 'prefetch'-pattern. 0 0 0 2014-02-28 Gopalasubramanian, Ganesh New
[AArch64,05/14] Add AArch64 'prefetch'-pattern. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,06/14] Extend '*tb<optab><mode>1'. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,07/14] Define additional patterns for adds/subs. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,08/14] Define a variant of cmp for the CC_NZ case. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,09/14] Add special cases of zero-extend w/ compare operations. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,1/14] Add ident field to struct processor 0 0 0 2015-07-16 Kyrylo Tkachov New
[AArch64,1/2] Add execution tests of vget_low and vget_high 0 0 0 2014-08-12 Alan Lawrence New
[AArch64,1/2] Add fmul-by-power-of-2+fcvt optimisation 0 0 0 2015-10-20 Kyrylo Tkachov New
[AArch64,1/2] Add fmul-by-power-of-2+fcvt optimisation 0 0 0 2015-10-19 Kyrylo Tkachov New
[AArch64,1/2] Correct signedness of builtins, remove casts from arm_neon.h 0 0 0 2014-05-29 Alan Lawrence New
[AArch64,1/2] Implement CRC32 ACLE intrinsics 0 0 0 2014-06-10 Kyrylo Tkachov New
[AArch64,1/2] Improve codegen of vector compares inc. tst instruction 0 0 0 2014-08-19 Alan Lawrence New
[AArch64,1/2] Mark GOT related MEM rtx as const to help RTL loop IV 0 0 0 2015-07-07 Jiong Wang New
[AArch64,1/2] PR rtl-optimization/68796 Add compare-of-zero_extract pattern 0 0 0 2015-12-18 Kyrill Tkachov New
[AArch64,1/2] PR rtl-optimization/68796 Add compare-of-zero_extract pattern 0 0 0 2015-12-17 Kyrill Tkachov New
[AArch64,1/2] PR/60825 Make float64x1_t in arm_neon.h a proper vector type 0 0 0 2014-06-19 Alan Lawrence New
[AArch64,1/2] Remove UNSPEC_CLS and use clrsb RTL code in its' place 0 0 0 2014-07-22 Kyrylo Tkachov New
[AArch64,1/2] Rename SYMBOL_SMALL_GOT to SYMBOL_SMALL_GOT_4G 0 0 0 2015-06-26 Jiong Wang New
[AArch64,1/3,big.LITTLE] Driver rewriting of big.LITTLE names. 0 0 0 2013-12-18 James Greenhalgh New
[AArch64,1/3] Don't disparage add/sub in SIMD registers 0 0 0 2014-08-12 Alan Lawrence New
[AArch64,1/3] Expand signed mod by power of 2 using CSNEG 0 0 0 2015-09-02 Kyrylo Tkachov New
[AArch64,1/3] Expand signed mod by power of 2 using CSNEG 0 0 0 2015-08-20 Kyrylo Tkachov New
[AArch64,1/3] Expand signed mod by power of 2 using CSNEG 0 0 0 2015-08-13 Kyrylo Tkachov New
[AArch64,1/3] Expand signed mod by power of 2 using CSNEG 0 0 0 2015-07-24 Kyrylo Tkachov New
[AArch64,1/4,Fix,vtbx1] Allow signed and unsigned versions of intrinsics to coexist. 0 0 0 2013-11-22 James Greenhalgh New
[AArch64,1/4] Define candidates for instruction fusion in a .def file 0 0 0 2015-06-23 James Greenhalgh New
[AArch64,1/5] Implement TARGET_SCHED_MACRO_FUSION_PAIR_P 0 0 0 2014-11-18 Kyrylo Tkachov New
[AArch64,1/5] Improve MOVI handling (Change interface of aarch64_simd_valid_immediate) 0 0 0 2013-06-03 Ian Bolton New
[AArch64,1/5] Improve immediate generation 0 0 0 2015-09-02 Wilco New
[AArch64,1/5] Use atomic instructions for swap and fetch-update operations. 0 0 0 2015-09-21 Matthew Wahab New
[AArch64,1/5] Use atomic instructions for swap and fetch-update operations. 0 0 0 2015-09-17 Matthew Wahab New
[AArch64,1/6] Implement support for Crypto -- Define TARGET_CRYPTO. 0 0 0 2013-12-06 Tejas Belagod New
[AArch64,1/6] aarch64: Add addti3 and subti3 patterns 0 0 0 2014-01-08 Richard Henderson New
[AArch64,1/7] Add support for ARMv8.1 Adv.SIMD,instructions. 0 0 0 2015-10-23 Matthew Wahab New
[AArch64,10/14] Add mov<mode>cc definition for GPF case. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,10/14] Implement target pragmas 0 0 0 2015-08-03 Kyrylo Tkachov New
[AArch64,10/14] Implement target pragmas 0 0 0 2015-07-24 Kyrylo Tkachov New
[AArch64,10/14] Implement target pragmas 0 0 0 2015-07-16 Kyrylo Tkachov New
[AArch64,11/14] Optimize and(s) patterns for HI/QI operands. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,11/14] Re-layout SIMD builtin types on builtin expansion 0 0 0 2015-07-24 Kyrylo Tkachov New
[AArch64,11/14] Re-layout SIMD builtin types on builtin expansion 0 0 0 2015-07-21 Kyrylo Tkachov New
[AArch64,11/14] Re-layout SIMD builtin types on builtin expansion 0 0 0 2015-07-16 Kyrylo Tkachov New
[AArch64,12/14] Generate 'bics', when only interested in CC_NZ. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,12/14] Target attributes and target pragmas tests 0 0 0 2015-07-24 Kyrylo Tkachov New
[AArch64,12/14] Target attributes and target pragmas tests 0 0 0 2015-07-16 Kyrylo Tkachov New
[AArch64,13/14] Initial tuning description for XGene-1 core. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,14/14] Add cost-model for XGene-1. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,14/14] Reuse target_option_current_node when passing pragma string to target attribute 0 0 0 2015-07-16 Kyrylo Tkachov New
[AArch64,2/14] Refactor arches handling, add arch enum identifier 0 0 0 2015-07-16 Kyrylo Tkachov New
[AArch64,2/2] Add CRC32 ACLE intrinsics testsuite 0 0 0 2014-06-10 Kyrylo Tkachov New
[AArch64,2/2] Add rtx cost function handling of clz, clrsb, rbit 0 0 0 2014-07-22 Kyrylo Tkachov New
[AArch64,2/2] Correct signedness of builtins, remove casts from arm_neon.h 0 0 0 2014-05-29 Alan Lawrence New
[AArch64,2/2] Define TARGET_UNSPEC_MAY_TRAP_P for AArch64 0 0 0 2015-07-07 Jiong Wang New
[AArch64,2/2] Do not double-copy bytes in volatile struct operations 0 0 0 2014-08-21 James Greenhalgh New
[AArch64,2/2] Implement -fpic for -mcmodel=small 0 0 0 2015-06-26 Jiong Wang New
[AArch64,2/2] PR/60825 Make {int,uint}64x1_t in arm_neon.h a proper vector type 0 0 0 2014-06-24 Alan Lawrence New
[AArch64,2/2] PR/60825 Make {int,uint}64x1_t in arm_neon.h a proper vector type 0 0 0 2014-06-19 Alan Lawrence New
[AArch64,2/2] Remove vector compare/tst __builtins 0 0 0 2014-08-19 Alan Lawrence New
[AArch64,2/2] Replace temporary inline assembler for vget_high 0 0 0 2014-08-12 Alan Lawrence New
[AArch64,2/2] Wire up TARGET_DEFAULT_MAX_SCALARIZATION_SIZE 0 0 0 2014-08-20 James Greenhalgh New
[AArch64,2/3,big.LITTLE] Allow tuning parameters without unique tuning targets. 0 0 0 2013-12-18 James Greenhalgh New
[AArch64,2/3] Add SIMD-reg variants of logical operators and/ior/xor/not 0 0 0 2014-08-12 Alan Lawrence New
[AArch64,2/3] Implement negcc, notcc optabs 0 0 0 2015-09-01 Kyrylo Tkachov New
[AArch64,2/3] Recognise rev16 operations on SImode and DImode data 0 0 0 2014-03-19 Kyrylo Tkachov New
[AArch64,2/3] Strengthen barriers for sync-compare-swap builtins. 0 0 0 2015-05-21 Matthew Wahab New
[AArch64,2/4,Fix,vtbx1] Handle poly types in the new Simd types infrastructure 0 0 0 2013-11-22 James Greenhalgh New
[AArch64,2/4] Control the FMA steering pass in tuning structures rather than as core property 0 0 0 2015-06-23 James Greenhalgh New
[AArch64,2/5] Add BIC instruction. 0 0 0 2015-09-17 Matthew Wahab New
[AArch64,2/5] Implement adrp+add fusion 0 0 0 2014-11-18 Kyrylo Tkachov New
[AArch64,2/5] Improve MOVI handling (Remove wrapper function) 0 0 0 2013-06-03 Ian Bolton New
[AArch64,2/5] Improve immediate generation 0 0 0 2015-09-02 Wilco New
[AArch64,2/5] Make BIC, other logical instructions, available. (was: Add BIC instruction.) 0 0 0 2015-09-21 Matthew Wahab New
[AArch64,2/6] Implement support for Crypto -- Instruction types. 0 0 0 2013-12-06 Tejas Belagod New
[AArch64,2/6] aarch64: Add mulditi3 and umulditi3 patterns 0 0 0 2014-01-08 Richard Henderson New
[AArch64,2/7] Add sqrdmah, sqrdmsh instructions. 0 0 0 2015-10-23 Matthew Wahab New
[AArch64,3/14] Refactor option override code 0 0 0 2015-07-24 Kyrylo Tkachov New
[AArch64,3/14] Refactor option override code 0 0 0 2015-07-16 Kyrylo Tkachov New
[AArch64,3/3,big.LITTLE] Add support for -mcpu=cortex-a57.cortex-a53 0 0 0 2013-12-18 James Greenhalgh New
[AArch64,3/3] Fix XOR_one_cmpl pattern; add SIMD-reg variants for BIC,ORN,EON 0 0 0 2014-08-12 Alan Lawrence New
[AArch64,3/4,Fix,vtbx1] Implement bsl intrinsics using builtins 0 0 0 2013-11-22 James Greenhalgh New
[AArch64,3/4] De-const-ify struct tune_params 0 0 0 2015-06-23 James Greenhalgh New