Show patches with: State = Action Required       |    Archived = No       |   126642 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[1/2] Allow REG_EQUAL for ZERO_EXTRACT - - - - --- 2015-06-28 Kugan Vivekanandarajah New
[VRP] Improve value ranges for unsigned division - - - - --- 2015-06-24 Kugan Vivekanandarajah New
[VRP] Improve value ranges for unsigned division - - - - --- 2015-06-20 Kugan Vivekanandarajah New
[ARM] Fix neon-reload-class.c testcase - - - - --- 2015-06-05 Kugan Vivekanandarajah New
[RFC] Elimination of zext/sext - type promotion pass - - - - --- 2015-06-01 Kugan Vivekanandarajah New
[PR65768] Check rtx_cost when propagating constant - - - - --- 2015-06-01 Kugan Vivekanandarajah New
[ARM] fix arm bootstrap - - - - --- 2015-05-15 Kugan Vivekanandarajah New
[AArch64,PR65375] Fix RTX cost for vector SET - - - - --- 2015-05-06 Kugan Vivekanandarajah New
[RFC] Elimination of zext/sext - type promotion pass - - - - --- 2015-05-01 Kugan Vivekanandarajah New
[ARM,PR65768] Keep constants in register when expanding - - - - --- 2015-04-26 Kugan Vivekanandarajah New
[ARM] Fix RTX cost for vector SET - - - - --- 2015-04-24 Kugan Vivekanandarajah New
[AArch64,PR65375] Fix RTX cost for vector SET - - - - --- 2015-04-24 Kugan Vivekanandarajah New
[RFC,3/3] Enable zero/sign extension elimination - - - - --- 2015-04-22 Kugan Vivekanandarajah New
[RFC,1/3] Free a bit in SSA_NAME to save wrapped information - - - - --- 2015-04-22 Kugan Vivekanandarajah New
[RFC,2/3] Propagate and save value ranges wrapped information - - - - --- 2015-04-22 Kugan Vivekanandarajah New
[AArch64,PR65375] Fix RTX cost for vector SET - - - - --- 2015-04-17 Kugan Vivekanandarajah New
[AArch64,PR65139] use clobber with match_scratch for aarch64_lshr_sisd_or_int_<mode>3 - - - - --- 2015-04-15 Kugan Vivekanandarajah New
[AArch64,PR65139] use clobber with match_scratch for aarch64_lshr_sisd_or_int_<mode>3 - - - - --- 2015-04-15 Kugan Vivekanandarajah New
[PR65768] Check rtx_cost when propagating constant - - - - --- 2015-04-15 Kugan Vivekanandarajah New
[ARM,PR65768] Keep constants in register when expanding - - - - --- 2015-04-15 Kugan Vivekanandarajah New
[AArch64,PR65139] use clobber with match_scratch for aarch64_lshr_sisd_or_int_<mode>3 - - - - --- 2015-04-14 Kugan Vivekanandarajah New
[AArch64,PR65375] Fix RTX cost for vector SET - - - - --- 2015-03-17 Kugan Vivekanandarajah New
[AArch64,PR65375] Fix RTX cost for vector SET - - - - --- 2015-03-16 Kugan Vivekanandarajah New
[AArch64,PR65375] Fix RTX cost for vector SET - - - - --- 2015-03-16 Kugan Vivekanandarajah New
[AArch64,PR65375] Fix RTX cost for vector SET - - - - --- 2015-03-16 Kugan Vivekanandarajah New
Fix typo in ira-costs.c - - - - --- 2015-02-27 Kugan Vivekanandarajah New
[RFC,3/3] Enable zero/sign extension elimination - - - - --- 2015-01-17 Kugan Vivekanandarajah New
[RFC,2/3] Propagate and save value ranges wrapped information - - - - --- 2015-01-17 Kugan Vivekanandarajah New
[RFC,1/3] Free a bit in SSA_NAME to save wrapped information - - - - --- 2015-01-17 Kugan Vivekanandarajah New
[RFC] Elimination of zext/sext - type promotion pass - - - - --- 2014-11-09 Kugan Vivekanandarajah New
[AArch64] LR register not used in leaf functions - - - - --- 2014-09-22 Kugan Vivekanandarajah New
[2/2] Enable elimination of zext/sext - - - - --- 2014-09-09 Kugan Vivekanandarajah New
pr43550 - remove unnecessary uxts in bswap - - - - --- 2014-09-05 Kugan Vivekanandarajah New
[2/2] Enable elimination of zext/sext - - - - --- 2014-09-04 Kugan Vivekanandarajah New
[2/2] Enable elimination of zext/sext - - - - --- 2014-08-28 Kugan Vivekanandarajah New
PR tree-optimization/52904 testcase - - - - --- 2014-08-12 Kugan Vivekanandarajah New
PR tree-optimization/52904 testcase - - - - --- 2014-08-12 Kugan Vivekanandarajah New
PR tree-optimization/52904 testcase - - - - --- 2014-08-09 Kugan Vivekanandarajah New
[2/2] Enable elimination of zext/sext - - - - --- 2014-08-07 Kugan Vivekanandarajah New
[2/2] Enable elimination of zext/sext - - - - --- 2014-07-14 Kugan Vivekanandarajah New
[RFC,ARM] TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook - - - - --- 2014-07-12 Kugan Vivekanandarajah New
[2/2] Enable elimination of zext/sext - - - - --- 2014-07-07 Kugan Vivekanandarajah New
[1/2] Enable setting sign and unsigned promoted mode (SPR_SIGNED_AND_UNSIGNED) - - - - --- 2014-07-07 Kugan Vivekanandarajah New
[1/2] Enable setting sign and unsigned promoted mode (SPR_SIGNED_AND_UNSIGNED) - - - - --- 2014-06-26 Kugan Vivekanandarajah New
[1/2] Enable setting sign and unsigned promoted mode (SPR_SIGNED_AND_UNSIGNED) - - - - --- 2014-06-26 Kugan Vivekanandarajah New
[2/2] Enable elimination of zext/sext - - - - --- 2014-06-25 Kugan Vivekanandarajah New
[1/2] Enable setting sign and unsigned promoted mode (SPR_SIGNED_AND_UNSIGNED) - - - - --- 2014-06-25 Kugan Vivekanandarajah New
[2/2] Enable elimination of zext/sext - - - - --- 2014-06-24 Kugan Vivekanandarajah New
[1/2] Enable setting sign and unsigned promoted mode (SPR_SIGNED_AND_UNSIGNED) - - - - --- 2014-06-24 Kugan Vivekanandarajah New
[RFC,ARM] TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook - - - - --- 2014-06-09 Kugan Vivekanandarajah New
[RFC,AArch64] Define TARGET_SPILL_CLASS - - - - --- 2014-05-21 Kugan Vivekanandarajah New
[RFC,AArch64] Define BASE_REG_CLASS to be GENERAL_REGS - - - - --- 2014-05-15 Kugan Vivekanandarajah New
[RFC,AArch64] Remove CORE_REGS form reg_class - - - - --- 2014-05-15 Kugan Vivekanandarajah New
[RFC,AARCH64] TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook - - - - --- 2014-05-02 Kugan Vivekanandarajah New
[RFC,AARCH64] TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook - - - - --- 2014-05-02 Kugan Vivekanandarajah New
[RFC,ARM] TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook - - - - --- 2014-05-02 Kugan Vivekanandarajah New
[RFC,ARM] TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook - - - - --- 2014-04-29 Kugan Vivekanandarajah New
[RFC,AARCH64] TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook - - - - --- 2014-04-29 Kugan Vivekanandarajah New
[RFC,AARCH64] TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook - - - - --- 2014-04-26 Kugan Vivekanandarajah New
[RFC,ARM] TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook - - - - --- 2014-04-26 Kugan Vivekanandarajah New
[VRP] Improve value range for loop index - - - - --- 2014-04-09 Kugan Vivekanandarajah New
[AARCH64] PR60034 - - - - --- 2014-03-25 Kugan Vivekanandarajah New
[AARCH64] PR60034 - - - - --- 2014-03-03 Kugan Vivekanandarajah New
[AARCH64] PR60034 - - - - --- 2014-02-21 Kugan Vivekanandarajah New
Added myself to MAINTAINERS (Write After Approval) - - - - --- 2014-02-17 Kugan Vivekanandarajah New
[ARM] add HFmode to arm_preferred_simd_mode - - - - --- 2014-02-14 Kugan Vivekanandarajah New
[ARM] Vectorizer generates unaligned access when -mno-unaligned-access is enabled - - - - --- 2014-02-03 Kugan Vivekanandarajah New
[AARCH64] PR59695 - - - - --- 2014-01-11 Kugan Vivekanandarajah New
[PING^2,2,of,2] RTL expansion for zero sign extension elimination with VRP - - - - --- 2014-01-07 Kugan Vivekanandarajah New
AARCH64 configure check for gas -mabi support - - - - --- 2013-12-10 Kugan Vivekanandarajah New
AARCH64 configure check for gas -mabi support - - - - --- 2013-12-10 Kugan Vivekanandarajah New
AARCH64 configure check for gas -mabi support - - - - --- 2013-12-09 Kugan Vivekanandarajah New
[PING^2,2,of,2] RTL expansion for zero sign extension elimination with VRP - - - - --- 2013-12-06 Kugan Vivekanandarajah New
AARCH64 configure check for gas -mabi support - - - - --- 2013-12-04 Kugan Vivekanandarajah New
[RFC,LIBGCC,2,of,2] 64 bit divide implementation for processor without hw divide instruction - - - - --- 2013-11-27 Kugan Vivekanandarajah New
[RFC,LIBGCC,1,of,2] 64 bit divide implementation for processor without hw divide instruction - - - - --- 2013-11-26 Kugan Vivekanandarajah New
[RFC,LIBGCC,2,of,2] 64 bit divide implementation for processor without hw divide instruction - - - - --- 2013-11-23 Kugan Vivekanandarajah New
[RFC,LIBGCC,1,of,2] 64 bit divide implementation for processor without hw divide instruction - - - - --- 2013-11-23 Kugan Vivekanandarajah New
[ARM] Fix testsuite testcase neon-vcond-[ltgt,unordered].c - - - - --- 2013-10-24 Kugan Vivekanandarajah New
[ARM] Fix testsuite testcase neon-vcond-[ltgt,unordered].c - - - - --- 2013-10-23 Kugan Vivekanandarajah New
[PING^2,2,of,2] RTL expansion for zero sign extension elimination with VRP - - - - --- 2013-10-16 Kugan Vivekanandarajah New
[2,of,2] RTL expansion for zero sign extension elimination with VRP - - - - --- 2013-10-08 Kugan Vivekanandarajah New
[ARM,PR58578] Split shift di patterns - - - - --- 2013-10-01 Kugan Vivekanandarajah New
[ping,1,of,2] Add value range info to SSA_NAME for zero sign extension elimination in RTL - - - - --- 2013-09-19 Kugan Vivekanandarajah New
[ping,1,of,2] Add value range info to SSA_NAME for zero sign extension elimination in RTL - - - - --- 2013-09-18 Kugan Vivekanandarajah New
[ping,1,of,2] Add value range info to SSA_NAME for zero sign extension elimination in RTL - - - - --- 2013-09-16 Kugan Vivekanandarajah New
[ping,1,of,2] Add value range info to SSA_NAME for zero sign extension elimination in RTL - - - - --- 2013-09-13 Kugan Vivekanandarajah New
[2,of,2] RTL expansion for zero sign extension elimination with VRP - - - - --- 2013-09-02 Kugan Vivekanandarajah New
[ping,1,of,2] Add value range info to SSA_NAME for zero sign extension elimination in RTL - - - - --- 2013-09-02 Kugan Vivekanandarajah New
[2,of,2] RTL expansion for zero sign extension elimination with VRP - - - - --- 2013-08-14 Kugan Vivekanandarajah New
[ping,1,of,2] Add value range info to SSA_NAME for zero sign extension elimination in RTL - - - - --- 2013-08-14 Kugan Vivekanandarajah New
[ping,2,of,2] RTL expansion for zero sign extension elimination with VRP - - - - --- 2013-06-17 Kugan Vivekanandarajah New
[ping,1,of,2] Add value range info to SSA_NAME for zero sign extension elimination in RTL - - - - --- 2013-06-17 Kugan Vivekanandarajah New
[2,of,2] RTL expansion for zero sign extension elimination with VRP - - - - --- 2013-06-03 Kugan Vivekanandarajah New
[1,of,2] Add value range info to SSA_NAME for zero sign extension elimination in RTL - - - - --- 2013-06-03 Kugan Vivekanandarajah New
rtl expansion without zero/sign extension based on VRP - - - - --- 2013-05-17 Kugan Vivekanandarajah New
rtl expansion without zero/sign extension based on VRP - - - - --- 2013-05-13 Kugan Vivekanandarajah New
[x86_64] : AMD znver2 enablement [x86_64] : AMD znver2 enablement - - - - --- 2018-10-31 Kumar, Venkataramanan New
[x86_64] Fix znver1 imov/imovx load reservations. - - - - --- 2016-10-11 Kumar, Venkataramanan New
[V2] Fix SLP PR58135. - - - - --- 2016-05-18 Kumar, Venkataramanan New
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