Patches

Show patches with: State = Action Required       |    Archived = No   
« 1 2 ... 330 331 332593 594 »
Patch A/R/T S/W/F Date Submitter Delegate State
AARCH64 configure check for gas -mabi support - - - 0 0 0 2013-12-04 Kugan New
[RFC,LIBGCC,2,of,2] 64 bit divide implementation for processor without hw divide instruction - - - 0 0 0 2013-11-27 Kugan New
[RFC,LIBGCC,1,of,2] 64 bit divide implementation for processor without hw divide instruction - - - 0 0 0 2013-11-26 Kugan New
[RFC,LIBGCC,2,of,2] 64 bit divide implementation for processor without hw divide instruction - - - 0 0 0 2013-11-23 Kugan New
[RFC,LIBGCC,1,of,2] 64 bit divide implementation for processor without hw divide instruction - - - 0 0 0 2013-11-23 Kugan New
[ARM] Fix testsuite testcase neon-vcond-[ltgt,unordered].c - - - 0 0 0 2013-10-24 Kugan New
[ARM] Fix testsuite testcase neon-vcond-[ltgt,unordered].c - - - 0 0 0 2013-10-23 Kugan New
[PING^2,2,of,2] RTL expansion for zero sign extension elimination with VRP - - - 0 0 0 2013-10-16 Kugan New
[2,of,2] RTL expansion for zero sign extension elimination with VRP - - - 0 0 0 2013-10-08 Kugan New
[ARM,PR58578] Split shift di patterns - - - 0 0 0 2013-10-01 Kugan New
[ping,1,of,2] Add value range info to SSA_NAME for zero sign extension elimination in RTL - - - 0 0 0 2013-09-19 Kugan New
[ping,1,of,2] Add value range info to SSA_NAME for zero sign extension elimination in RTL - - - 0 0 0 2013-09-18 Kugan New
[ping,1,of,2] Add value range info to SSA_NAME for zero sign extension elimination in RTL - - - 0 0 0 2013-09-16 Kugan New
[ping,1,of,2] Add value range info to SSA_NAME for zero sign extension elimination in RTL - - - 0 0 0 2013-09-13 Kugan New
[2,of,2] RTL expansion for zero sign extension elimination with VRP - - - 0 0 0 2013-09-02 Kugan New
[ping,1,of,2] Add value range info to SSA_NAME for zero sign extension elimination in RTL - - - 0 0 0 2013-09-02 Kugan New
[2,of,2] RTL expansion for zero sign extension elimination with VRP - - - 0 0 0 2013-08-14 Kugan New
[ping,1,of,2] Add value range info to SSA_NAME for zero sign extension elimination in RTL - - - 0 0 0 2013-08-14 Kugan New
[ping,2,of,2] RTL expansion for zero sign extension elimination with VRP - - - 0 0 0 2013-06-17 Kugan New
[ping,1,of,2] Add value range info to SSA_NAME for zero sign extension elimination in RTL - - - 0 0 0 2013-06-17 Kugan New
[2,of,2] RTL expansion for zero sign extension elimination with VRP - - - 0 0 0 2013-06-03 Kugan New
[1,of,2] Add value range info to SSA_NAME for zero sign extension elimination in RTL - - - 0 0 0 2013-06-03 Kugan New
rtl expansion without zero/sign extension based on VRP - - - 0 0 0 2013-05-17 Kugan New
rtl expansion without zero/sign extension based on VRP - - - 0 0 0 2013-05-13 Kugan New
Fix for PR26702: Emit .size for BSS variables on arm-eabi - - - 0 0 0 2015-03-30 Kwok Cheung Yeung New
Fix detection of thread support with uClibc in libgcc - - - 0 0 0 2014-10-11 Kwok Cheung Yeung New
[aarch64] aarch64-linux: output .note.GNU-stack - - - 0 0 0 2014-05-14 Kyle McMartin New
Fix PCH on AArch64 (PR pch/60010) - - - 0 0 0 2014-01-31 Kyle McMartin New
[RFC,regrename,sel-sched] Fix arm bootstrap - - - 0 0 0 2016-09-22 Kyrill Tkachov New
[simplify-rtx] (GTU (PLUS a C) (C - 1)) --> (LTU a -C) - - - 0 0 0 2016-09-19 Kyrill Tkachov New
[simplify-rtx] (GTU (PLUS a C) (C - 1)) --> (LTU a -C) - - - 0 0 0 2016-09-16 Kyrill Tkachov New
[ARM,v2] Use snprintf rather than sprintf - - - 0 0 0 2016-09-08 Kyrill Tkachov New
[expmed.c] PR middle-end/77426 Delete duplicate condition in synth_mult - - - 0 0 0 2016-09-07 Kyrill Tkachov New
[v3] GIMPLE store merging pass - - - 0 0 0 2016-09-06 Kyrill Tkachov New
[AArch64] Add ANDS pattern for CMP+ZERO_EXTEND - - - 0 0 0 2016-09-01 Kyrill Tkachov New
[ARM] PR target/70473: Reduce size of Cortex-A8 automaton - - - 0 0 0 2016-08-26 Kyrill Tkachov New
[AArch64,5] Backport Work around for PR target/64971 - - - 0 0 0 2016-08-26 Kyrill Tkachov New
[ARM] Refactor MOVW/MOVT fusion logic to allow extension - - - 0 0 0 2016-08-24 Kyrill Tkachov New
[v2] GIMPLE store merging pass - - - 0 0 0 2016-08-22 Kyrill Tkachov New
[RFC] PR middle-end/22141 GIMPLE store widening pass - - - 0 0 0 2016-07-15 Kyrill Tkachov New
[AArch64] Allow multiple-of-8 immediate offsets for TImode LDP/STP - - - 0 0 0 2016-07-13 Kyrill Tkachov New
[vectorizer,2/2] Hook up mult synthesis logic into vectorisation of mult-by-constant - - - 0 0 0 2016-07-07 Kyrill Tkachov New
[RTL,ifcvt] PR rtl-optimization/71594: ICE in noce_emit_cmove due to mismatched source modes - - - 0 0 0 2016-07-05 Kyrill Tkachov New
[vectorizer,2/2] Hook up mult synthesis logic into vectorisation of mult-by-constant - - - 0 0 0 2016-07-05 Kyrill Tkachov New
[expr.c] PR middle-end/71700: zero-extend sub-word value when widening constructor element - - - 0 0 0 2016-07-01 Kyrill Tkachov New
[vectorizer,2/2] Hook up mult synthesis logic into vectorisation of mult-by-constant - - - 0 0 0 2016-06-30 Kyrill Tkachov New
[AArch64] Fix some scan-assembler tests for -mabi=ilp32 - - - 0 0 0 2016-06-29 Kyrill Tkachov New
[RTL,ifcvt] PR rtl-optimization/71594: ICE in noce_emit_cmove due to mismatched source modes - - - 0 0 0 2016-06-24 Kyrill Tkachov New
[ARM] Add support for some ARMv8-A cores to driver-arm.c - - - 0 0 0 2016-06-22 Kyrill Tkachov New
[AArch64] Add initial support for Cortex-A73 - - - 0 0 0 2016-06-21 Kyrill Tkachov New
[typo] alignement -> alignment - - - 0 0 0 2016-06-20 Kyrill Tkachov New
[AArch64,obvious] Clean up parentheses and use GET_MODE_UNIT_BITSIZE in a couple of patterns - - - 0 0 0 2016-06-15 Kyrill Tkachov New
[vectorizer,2/2] Hook up mult synthesis logic into vectorisation of mult-by-constant - - - 0 0 0 2016-06-15 Kyrill Tkachov New
[1/2] Move choose_mult_variant declaration and dependent declarations to expmed.h - - - 0 0 0 2016-06-15 Kyrill Tkachov New
[RTL,ifcvt] Allow simple register subregs in noce_convert_multiple_sets - - - 0 0 0 2016-06-14 Kyrill Tkachov New
Fix typo in copyright boilerplate - - - 0 0 0 2016-06-14 Kyrill Tkachov New
[vectorizer,2/2] PR 65951: Hook up mult synthesis logic into vectorisation of mult-by-constant - - - 0 0 0 2016-06-13 Kyrill Tkachov New
[1/2] Move mult synthesis definitions into a separate file - - - 0 0 0 2016-06-13 Kyrill Tkachov New
[ARM] Delete thumb_reload_in_h - - - 0 0 0 2016-06-10 Kyrill Tkachov New
[AArch64] Handle AND+ASHIFT form of UBFIZ correctly in costs - - - 0 0 0 2016-06-09 Kyrill Tkachov New
[AArch64,2/2] (Re)Implement vcopy<q>_lane<q> intrinsics - - - 0 0 0 2016-06-07 Kyrill Tkachov New
[AArch64,1/2] Add support INS (element) instruction to copy lanes between vectors - - - 0 0 0 2016-06-07 Kyrill Tkachov New
[3/3,RTL,ifcvt] PR middle-end/37780: Conditional expression with __builtin_clz() should be optimi... - - - 0 0 0 2016-06-07 Kyrill Tkachov New
[RTL,ifcvt] Print name of noce trasform that succeeded in dump file - - - 0 0 0 2016-06-06 Kyrill Tkachov New
[AArch64] Add initial support for Cortex-A73 - - - 0 0 0 2016-06-06 Kyrill Tkachov New
[ARM] Add initial support for Cortex-A73 - - - 0 0 0 2016-06-06 Kyrill Tkachov New
[AArch64] Model CSEL instruction in Cortex-A57 scheduling model - - - 0 0 0 2016-06-06 Kyrill Tkachov New
[ARM,obvious] Fix typos in *thumb1_mulsi3 comment - - - 0 0 0 2016-06-03 Kyrill Tkachov New
[combine] PR middle-end/71074 Check that const_op is >= 0 before potentially shifting in simplify... - - - 0 0 0 2016-06-03 Kyrill Tkachov New
[ARM] Fix gcc.target/arm/builtin-bswap16-1.c - - - 0 0 0 2016-06-03 Kyrill Tkachov New
[wwwdocs,obvious] Fix typo in -finline-matmul-limit - - - 0 0 0 2016-06-03 Kyrill Tkachov New
[wwwdocs,AArch64] Mention -mcpu=qdf24xx support for GCC 6 - - - 0 0 0 2016-06-02 Kyrill Tkachov New
[ARM,wwwdocs] Mention some arm port changes for GCC 6 - - - 0 0 0 2016-06-02 Kyrill Tkachov New
[ARM,1/4] Replace uses of int_log2 by exact_log2 - - - 0 0 0 2016-06-02 Kyrill Tkachov New
[wwwdocs] Improve arm and aarch64-related info in readings.html - - - 0 0 0 2016-06-02 Kyrill Tkachov New
[testsuite/ARM] Enable atomic tests in gcc.dg for -march=armv8-a bare metal - - - 0 0 0 2016-06-01 Kyrill Tkachov New
[RFC,rtlanal] Fix rtl-optimization/71295 - - - 0 0 0 2016-05-31 Kyrill Tkachov New
[ARM] PR71061, length pop* pattern in epilogue correctly - - - 0 0 0 2016-05-31 Kyrill Tkachov New
[AArch64] Use aarch64_fusion_enabled_p to check for insn fusion capabilities - - - 0 0 0 2016-05-27 Kyrill Tkachov New
[AArch64] Remove aarch64_simd_attr_length_move - - - 0 0 0 2016-05-27 Kyrill Tkachov New
[AArch64] Enable -frename-registers at -O2 and higher - - - 0 0 0 2016-05-27 Kyrill Tkachov New
[ARM] Tie operand 1 to operand 0 in AESMC pattern when fusing AES/AESMC - - - 0 0 0 2016-05-27 Kyrill Tkachov New
[AArch64] Tie operand 1 to operand 0 in AESMC pattern when AES/AESMC fusion is enabled - - - 0 0 0 2016-05-27 Kyrill Tkachov New
[3/3,RTL,ifcvt] PR middle-end/37780: Conditional expression with __builtin_clz() should be optimi... - - - 0 0 0 2016-05-26 Kyrill Tkachov New
[2/3,AArch64] Keep CTZ components together until after reload - - - 0 0 0 2016-05-26 Kyrill Tkachov New
[1/3,ARM] Keep ctz expressions together until after reload - - - 0 0 0 2016-05-26 Kyrill Tkachov New
[RTL,ifcvt] PR rtl-optimization/66940: Avoid signed overflow in noce_get_alt_condition - - - 0 0 0 2016-05-25 Kyrill Tkachov New
[ARM,4/4] Simplify checks for CONST_INT_P and comparison against 1/0 - - - 0 0 0 2016-05-24 Kyrill Tkachov New
[ARM,3/4] Cleanup casts from INTVAL to [unsigned] HOST_WIDE_INT - - - 0 0 0 2016-05-24 Kyrill Tkachov New
[ARM,2/4] Replace casts of 1 to HOST_WIDE_INT by HOST_WIDE_INT_1 and HOST_WIDE_INT_1U - - - 0 0 0 2016-05-24 Kyrill Tkachov New
[ARM,1/4] Replace uses of int_log2 by exact_log2 - - - 0 0 0 2016-05-24 Kyrill Tkachov New
[ARM] Add support for overflow add, sub, and neg operations - - - 0 0 0 2016-05-24 Kyrill Tkachov New
[ARM] PR target/69857 Remove bogus early return false; in gen_operands_ldrd_strd - - - 0 0 0 2016-05-24 Kyrill Tkachov New
[RTL,ifcvt] PR rtl-optimization/66940: Avoid signed overflow in noce_get_alt_condition - - - 0 0 0 2016-05-23 Kyrill Tkachov New
[AArch64] Tie operand 1 to operand 0 in AESMC pattern when AES/AESMC fusion is enabled - - - 0 0 0 2016-05-20 Kyrill Tkachov New
[ARM] Tie operand 1 to operand 0 in AESMC pattern when fusing AES/AESMC - - - 0 0 0 2016-05-20 Kyrill Tkachov New
[AArch64] PR target/70809: Delete aarch64_vmls<mode> pattern - - - 0 0 0 2016-05-20 Kyrill Tkachov New
[wwwdocs] Improve arm and aarch64-related info in readings.html - - - 0 0 0 2016-05-19 Kyrill Tkachov New
[ARM] PR target/70830: Avoid POP-{reglist}^ when returning from interrupt handlers - - - 0 0 0 2016-05-17 Kyrill Tkachov New
[AArch64] PR target/70809: Delete aarch64_vmls<mode> pattern - - - 0 0 0 2016-05-17 Kyrill Tkachov New
« 1 2 ... 330 331 332593 594 »