Patches

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Patch A/R/T S/W/F Date Submitter Delegate State
[AArch64] Remove unused types and variables for abi types - - - 0 0 0 2013-07-02 Yufeng Zhang New
[AArch64] Remove v8type attribute. - - - 0 0 0 2013-11-14 James Greenhalgh New
[AArch64] Remove varargs from aarch64_simd_expand_args - - - 0 0 0 2014-08-20 Alan Lawrence New
[AArch64] Remove/merge redundant iterators - - - 0 0 0 2014-11-13 Alan Lawrence New
[AArch64] Removed unused SLOWMUL target flags - - - 0 0 0 2015-05-15 Kyrylo Tkachov New
[AArch64] Removed unused get_lane and dup_lane builtins. - - - 0 0 0 2014-08-01 Alan Lawrence New
[AArch64] Rename [u]int32x1_t to [u]int32_t (resp 16x1, 8x1) in arm_neon.h - - - 0 0 0 2014-07-24 Alan Lawrence New
[AArch64] Replace insn to zero up DF register - - - 0 0 0 2016-03-10 Evandro Menezes New
[AArch64] Replace insn to zero up DF register - - - 0 0 0 2016-03-09 Evandro Menezes New
[AArch64] Replace insn to zero up DF register - - - 0 0 0 2016-02-29 Evandro Menezes New
[AArch64] Replace insn to zero up DF register - - - 0 0 0 2016-02-26 Evandro Menezes New
[AArch64] Replace insn to zero up DF register - - - 0 0 0 2016-01-27 Evandro Menezes New
[AArch64] Replace insn to zero up DF register - - - 0 0 0 2015-10-19 Evandro Menezes New
[AArch64] Replace insn to zero up SIMD registers - - - 0 0 0 2016-04-25 Evandro Menezes New
[AArch64] Restore recog state after finding pre-madd instruction - - - 0 0 0 2014-10-29 Kyrylo Tkachov New
[AArch64] Restrict 16-bit sqrdml{sa}h instructions to FP_LO_REGS - - - 0 0 0 2016-01-26 James Greenhalgh New
[AArch64] Restrict the shift value in compare extended shift operation - - - 0 0 0 2013-05-07 Hurugalawadi, Naveen New
[AArch64] Restrict usage of FP/SIMD registers for TImode reload and absdi2 patterns for non-float... - - - 0 0 0 2014-08-07 Kyrylo Tkachov New
[AArch64] Restrict usage of SBFIZ to valid range only - - - 0 0 0 2012-10-16 Ian Bolton New
[AArch64] Restrict usage of SBFIZ to valid range only - - - 0 0 0 2012-10-15 Ian Bolton New
[AArch64] Restructure arm_neon.h vector types' implementation. - - - 0 0 0 2014-06-27 Tejas Belagod New
[AArch64] Restructure arm_neon.h vector types' implementation. - - - 0 0 0 2014-06-23 Tejas Belagod New
[AArch64] Restructure arm_neon.h vector types's implementation(Take 2). - - - 0 0 0 2014-11-05 tejas belagod New
[AArch64] Restructure arm_neon.h vector types's implementation(Take 2). - - - 0 0 0 2014-10-01 tejas belagod New
[AArch64] Rework ARMv8.1 command line options. - - - 0 0 0 2015-12-07 Matthew Wahab New
[AArch64] Rework ARMv8.1 command line options. - - - 0 0 0 2015-11-27 Matthew Wahab New
[AArch64] Rework ARMv8.1 command line options. - - - 0 0 0 2015-11-16 Matthew Wahab New
[AArch64] Rewrite the vdup_lane intrinsics in C - - - 0 0 0 2013-08-09 James Greenhalgh New
[AArch64] Rewrite v<max,min><nm><q><v>_<sfu><8, 16, 32, 64> intrinsics using builtins. - - - 0 0 0 2013-05-01 James Greenhalgh New
[AArch64] Rewrite vabs<q>_s<8,16,32,64> AdvSIMD intrinsics to fold to tree. - - - 0 0 0 2013-07-19 James Greenhalgh New
[AArch64] Rewrite vabs<q>_s<8,16,32,64> AdvSIMD intrinsics to fold to tree. - - - 0 0 0 2013-07-19 James Greenhalgh New
[AArch64] Rewrite vca<ge, gt, le, lt> Neon patterns in C. - - - 0 0 0 2013-04-30 James Greenhalgh New
[AArch64] Rid the world of NAMED_PARAM - - - 0 0 0 2015-02-04 James Greenhalgh New
[AArch64] Set TARGET_OMIT_STRUCT_RETURN_REG to true. - - - 0 0 0 2016-04-26 Ramana Radhakrishnan New
[AArch64] Set TREE_TARGET_GLOBALS in aarch64_set_current_function when new tree is the default no... - - - 0 0 0 2016-02-25 Kyrill Tkachov New
[AArch64] Set libgloss_dir for aarch64*-*-* targets - - - 0 0 0 2013-01-10 Yufeng Zhang New
[AArch64] Shift right pattern fix - - - 0 0 0 2014-01-30 Alex Velenko New
[AArch64] Simplify TLS pattern by hardcoding relocation modifiers into pattern - - - 0 0 0 2015-09-10 Jiong Wang New
[AArch64] Simplify ashl<mode>3 expander for SHORT modes - - - 0 0 0 2016-04-27 Kyrill Tkachov New
[AArch64] Simplify reduc_plus_scal_v2[sd]f sequence - - - 0 0 0 2016-05-17 James Greenhalgh New
[AArch64] Simplify vreinterpret for float64x1_t using casts. - - - 0 0 0 2014-09-08 Alan Lawrence New
[AArch64] Skip aarch64*-*-* for g++.dg/cpp0x/alias-decl-debug-0.C - - - 0 0 0 2013-05-28 Yufeng Zhang New
[AArch64] Skip gcc.target/aarch64/assembler_arch_1.c if assembler does not support it - - - 0 0 0 2016-02-16 Kyrill Tkachov New
[AArch64] Some aarch64-builtins.c cleanup. - - - 0 0 0 2014-08-04 James Greenhalgh New
[AArch64] Specify CRC and Crypto support for Cortex-A53, A57 - - - 0 0 0 2014-01-16 Kyrylo Tkachov New
[AArch64] Split a move of Q-reg vectors contained in general regs. - - - 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Support --mcmodel=tiny. - - - 0 0 0 2013-05-29 Marcus Shawcroft New
[AArch64] Support AdvSIMD MOVI / MVNI shifting ones variant. - - - 0 0 0 2013-07-12 Tejas Belagod New
[AArch64] Support BFI instruction and insv standard pattern - - - 0 0 0 2013-05-30 Ian Bolton New
[AArch64] Support BFI instruction and insv standard pattern - - - 0 0 0 2013-05-20 Ian Bolton New
[AArch64] Support BFI instruction and insv standard pattern - - - 0 0 0 2013-05-08 Ian Bolton New
[AArch64] Support BFXIL in the backend - - - 0 0 0 2013-06-27 Ian Bolton New
[AArch64] Support BICS instruction in the backend - - - 0 0 0 2013-05-01 Ian Bolton New
[AArch64] Support BICS instruction in the backend - - - 0 0 0 2013-04-26 Ian Bolton New
[AArch64] Support EXTR in backend - - - 0 0 0 2013-03-14 Ian Bolton New
[AArch64] Support LDR/STR to/from S and D registers - - - 0 0 0 2013-04-26 Ian Bolton New
[AArch64] Support NEG in vector registers for DI and SI mode - - - 0 0 0 2013-07-23 Ian Bolton New
[AArch64] Support ROR in backend - - - 0 0 0 2013-03-14 Ian Bolton New
[AArch64] Support SADDL/SSUBL/UADDL/USUBL - - - 0 0 0 2013-09-30 Vidya Praveen New
[AArch64] Support SBC in the backend - - - 0 0 0 2013-03-14 Ian Bolton New
[AArch64] Support SISD Shifts (SHL/USHR/SSHL/USHL/SSHR) - - - 0 0 0 2013-08-20 Vidya Praveen New
[AArch64] Support SISD variants of SCVTF,UCVTF - - - 0 0 0 2014-01-13 Vidya Praveen New
[AArch64] Support abs standard pattern for DI mode - - - 0 0 0 2013-06-25 Ian Bolton New
[AArch64] Support float->int conversions in vector registers. - - - 0 0 0 2013-05-01 James Greenhalgh New
[AArch64] Support for CLZ - - - 0 0 0 2013-05-22 Vidya Praveen New
[AArch64] Support for SMLAL/SMLSL/UMLAL/UMLSL - - - 0 0 0 2013-06-14 Vidya Praveen New
[AArch64] Support missing vcond pattern by adding/using vec_cmp/vcond_mask patterns. - - - 0 0 0 2016-06-08 Bin Cheng New
[AArch64] Support missing vcond pattern by adding/using vec_cmp/vcond_mask patterns. - - - 0 0 0 2016-05-17 Bin Cheng New
[AArch64] Support scalar form of FABD - - - 0 0 0 2013-05-02 Vidya Praveen New
[AArch64] Support vrecp<esx> neon intrinsics in RTL. - - - 0 0 0 2013-04-22 James Greenhalgh New
[AArch64] Switch constant pools to separate rodata sections. - - - 0 0 0 2015-11-09 Ramana Radhakrishnan New
[AArch64] Switch constant pools to separate rodata sections. - - - 0 0 0 2015-11-04 Ramana Radhakrishnan New
[AArch64] Switch constant pools to separate rodata sections. - - - 0 0 0 2015-11-03 Ramana Radhakrishnan New
[AArch64] Sync merge libffi - fix call frame information in ffi_closure_SYSV - - - 0 0 0 2014-02-28 Yufeng Zhang New
[AArch64] Testcase fix for __ATOMIC_CONSUME - - - 0 0 0 2015-02-18 Alex Velenko New
[AArch64] Testcase fix for __ATOMIC_CONSUME - - - 0 0 0 2015-01-27 Alex Velenko New
[AArch64] Testcase fix for __ATOMIC_CONSUME - - - 0 0 0 2015-01-21 Alex Velenko New
[AArch64] Testcases for ANDS instruction - - - 0 0 0 2013-05-01 Ian Bolton New
[AArch64] Testcases for ANDS instruction - - - 0 0 0 2013-04-26 Ian Bolton New
[AArch64] Testcases for TST instruction - - - 0 0 0 2013-05-02 Ian Bolton New
[AArch64] Tidy up aarch64_simd_expand_args - - - 0 0 0 2014-11-17 Alan Lawrence New
[AArch64] Tidy: remove unused qualifier_const_pointer - - - 0 0 0 2014-08-20 Alan Lawrence New
[AArch64] Tie operand 1 to operand 0 in AESMC pattern when AES/AESMC fusion is enabled - - - 0 0 0 2016-05-27 Kyrill Tkachov New
[AArch64] Tie operand 1 to operand 0 in AESMC pattern when AES/AESMC fusion is enabled - - - 0 0 0 2016-05-20 Kyrill Tkachov New
[AArch64] Tighten direct call pattern to repair -fno-plt - - - 0 0 0 2015-07-16 Jiong Wang New
[AArch64] Tighten predicate for CMP pattern. - - - 0 0 0 2012-09-26 Marcus Shawcroft New
[AArch64] Tighten predicate for CMP pattern. - - - 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Tighten predicates on SIMD shift intrinsics - - - 0 0 0 2014-09-25 James Greenhalgh New
[AArch64] Tighten predicates on SIMD shift intrinsics - - - 0 0 0 2014-09-11 James Greenhalgh New
[AArch64] Update comments on the usage of X30 in FIXED_REGISTERS and CALL_USED_REGISTERS - - - 0 0 0 2015-10-16 Jiong Wang New
[AArch64] Update definitions of _FP_W_TYPE and _FP_WS_TYPE in libgcc to be based on 'long long' - - - 0 0 0 2013-04-18 Yufeng Zhang New
[AArch64] Update insv_1.c test for Big Endian - - - 0 0 0 2013-06-24 Ian Bolton New
[AArch64] Update patterns to support FP zero - - - 0 0 0 2015-10-08 Wilco New
[AArch64] Update target testcases for gnu11 - - - 0 0 0 2014-10-21 Jiong Wang New
[AArch64] Use "multiple" for type, where more than one instruction is used for a move - - - 0 0 0 2013-09-06 James Greenhalgh New
[AArch64] Use CC_Z and CC_NZ with csinc and similar instructions - - - 0 0 0 2014-09-02 Kyrylo Tkachov New
[AArch64] Use CC_Z and CC_NZ with csinc and similar instructions - - - 0 0 0 2014-08-19 Kyrylo Tkachov New
[AArch64] Use CC_Z and CC_NZ with csinc and similar instructions - - - 0 0 0 2014-08-19 Kyrylo Tkachov New
[AArch64] Use CC_Z and CC_NZ with csinc and similar instructions - - - 0 0 0 2014-08-18 Kyrylo Tkachov New
[AArch64] Use CSINC instead of CSEL to return 1 - - - 0 0 0 2012-11-06 Ian Bolton New
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