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Patch A/R/T Date Submitter Delegate State
[AArch64/GCC,7/N] Hoist calculation of register rtx 0 0 0 2014-07-22 Jiong Wang New
[AArch64/GCC,8/N] Refactor code out into 'aarch64_next_callee_save' 0 0 0 2014-07-22 Jiong Wang New
[AArch64/GCC,9/N] Use helper functions to handle multiple mode 0 0 0 2014-07-22 Jiong Wang New
[AArch64/GCC] PR64304, miscompilation with -mgeneral-regs-only 0 0 0 2015-01-14 Jiong Wang New
[AArch64/testsuite] Add more TLS local executable testcases 0 0 0 2015-08-26 Jiong Wang New
[AArch64/testsuite] Restrict pic-small.c by a new directive "check_effective_target_aarch64_small_fpic" 0 0 0 2015-06-30 Jiong Wang New
[AArch64/wwwdoc] Document -fpic support for small memory model 0 0 0 2015-07-23 Jiong Wang New
[AArch64/wwwdoc] Document -fpic support for small memory model 0 0 0 2015-06-26 Jiong Wang New
[AArch64] -mcmodel=tiny -fPIC GOT support. 0 0 0 2013-07-15 Marcus Shawcroft New
[AArch64] -mcmodel=tiny -fPIC use tiny absolute for non binds local. 0 0 0 2013-05-31 Marcus Shawcroft New
[AArch64] 64-bit float vreinterpret implemention 0 0 0 2014-02-28 Alex Velenko New
[AArch64] 64-bit float vreinterpret implemention 0 0 0 2014-02-25 Alex Velenko New
[AArch64] : Add constraint letter for stack_protect_test pattern) 0 0 0 2014-09-18 James Greenhalgh New
[AArch64] : Add constraint letter for stack_protect_test pattern) 0 0 0 2014-09-17 James Greenhalgh New
[AArch64] : Add constraint letter for stack_protect_test pattern. 0 0 0 2014-09-04 Venkataramanan Kumar New
[AArch64] : Fix format of <su>mull<q> instruction. 0 0 0 2013-01-08 Tejas Belagod New
[AArch64] : Fix rtl type in aarch64.md. 0 0 0 2015-02-26 Xingxing Pan New
[AArch64] : Fix test harness to for unaligned vector mem access. 0 0 0 2012-12-19 Tejas Belagod New
[AArch64] AArch64 SIMD Builtins Better Type Correctness. 0 0 0 2013-11-18 James Greenhalgh New
[AArch64] AND operation should use CC_NZ mode 0 0 0 2013-02-01 Ian Bolton New
[AArch64] Add --enable-fix-cortex-a53-835769 configure-time option 0 0 0 2014-10-10 Kyrylo Tkachov New
[AArch64] Add Cortex-A53 erratum 843419 configure-time option 0 0 0 2015-05-04 Yvan Roux New
[AArch64] Add Cortex-A53 erratum 843419 configure-time option 0 0 0 2015-05-01 Yvan Roux New
[AArch64] Add Cortex-A53 erratum 843419 configure-time option 0 0 0 2015-05-01 Yvan Roux New
[AArch64] Add TARGET_MIN_DIVISIONS_FOR_RECIP_MUL 0 0 0 2014-12-12 Wilco New
[AArch64] Add __extension__ and __always_inline__ to crypto intrinsics 0 0 0 2015-05-21 Kyrill Tkachov New
[AArch64] Add a big-endian lane flip at expand-time in saturating math patterns 0 0 0 2014-06-10 Kyrylo Tkachov New
[AArch64] Add a builtin for rbit(q?)_p8; add intrinsics and tests. 0 0 0 2014-08-19 Alan Lawrence New
[AArch64] Add a new scheduling description for the ARM Cortex-A57 processor 0 0 0 2015-01-19 James Greenhalgh New
[AArch64] Add a new scheduling description for the ARM Cortex-A57 processor 0 0 0 2015-01-16 James Greenhalgh New
[AArch64] Add a new scheduling description for the ARM Cortex-A57 processor 0 0 0 2015-01-15 James Greenhalgh New
[AArch64] Add alternative 'extr' pattern, calculate rtx cost properly 0 0 0 2015-04-27 Kyrylo Tkachov New
[AArch64] Add basic recognition for cpu cortex-a53 and cortex-a57 0 0 0 2012-12-14 Yufeng Zhang New
[AArch64] Add bounds checking to vqdm*_lane intrinsics via a qualifier that also flips endianness 0 0 0 2014-11-06 Alan Lawrence New
[AArch64] Add branch-cost to cpu tuning information. 0 0 0 2015-05-05 Matthew Wahab New
[AArch64] Add branch-cost to cpu tuning information. 0 0 0 2015-04-21 Matthew Wahab New
[AArch64] Add combiner patterns for FAC instructions 0 0 0 2013-04-30 James Greenhalgh New
[AArch64] Add constrain to address offset in storewb_pair/loadwb_pair insns 0 0 0 2014-07-29 Jiong Wang New
[AArch64] Add cpu_defines.h for AArch64. 0 0 0 2015-05-19 Ramana Radhakrishnan New
[AArch64] Add doloop_end pattern for -fmodulo-sched 0 0 0 2014-11-10 Yangfei (Felix) New
[AArch64] Add handling of bswap operations in rtx costs 0 0 0 2014-03-19 Kyrylo Tkachov New
[AArch64] Add missing copyright and build dependency for aarch64-simd-builtins.def 0 0 0 2013-02-22 James Greenhalgh New
[AArch64] Add predicate for storewb_pair/loadwb_pair 0 0 0 2014-06-12 Jiong Wang New
[AArch64] Add range-check for Symbol + offset addressing. 0 0 0 2014-11-14 tejas belagod New
[AArch64] Add secondary reload for immediates into FP_REGS 0 0 0 2013-07-30 Ian Bolton New
[AArch64] Add special case when expanding vcond with arms {-1, -1}, {0, 0}. 0 0 0 2013-04-30 James Greenhalgh New
[AArch64] Add support for "wsp" register 0 0 0 2013-07-04 Yufeng Zhang New
[AArch64] Add support for -mcpu=cortex-a72 0 0 0 2015-02-04 Matthew Wahab New
[AArch64] Add support for TARGET_BUILTIN_DECL 0 0 0 2012-11-21 James Greenhalgh New
[AArch64] Add support for TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES hook. 0 0 0 2012-12-06 James Greenhalgh New
[AArch64] Add support for crtfastmath.c 0 0 0 2014-09-05 Ramana Radhakrishnan New
[AArch64] Add support for floating-point vcond. 0 0 0 2013-01-08 James Greenhalgh New
[AArch64] Add support for vectorizable standard math patterns. 0 0 0 2012-11-27 James Greenhalgh New
[AArch64] Add testcases for FAC, FCM changes. 0 0 0 2013-04-30 James Greenhalgh New
[AArch64] Add testcases to cover various pro/epi stack layout 0 0 0 2014-06-10 Jiong Wang New
[AArch64] Add vabs_s64 intrinsic 0 0 0 2013-07-19 Ian Bolton New
[AArch64] Add vabs_s64 intrinsic 0 0 0 2013-07-12 Ian Bolton New
[AArch64] Add vcond, vcondu support. 0 0 0 2012-10-09 James Greenhalgh New
[AArch64] Add vec_shr pattern for 64-bit vectors using ush{l,r}; enable tests. 0 0 0 2014-11-14 Alan Lawrence New
[AArch64] Add vector fix, fixuns, fix_trunc, fixuns_trunc standard patterns 0 0 0 2013-04-26 James Greenhalgh New
[AArch64] Add vector int to float conversions. 0 0 0 2013-04-26 James Greenhalgh New
[AArch64] Add vector pattern for __builtin_ctz 0 0 0 2014-11-14 Jiong Wang New
[AArch64] Add w -> w constraint to vec_set. 0 0 0 2013-11-05 Tejas Belagod New
[AArch64] Add zero_extend variants of logical+not ops 0 0 0 2015-04-21 Kyrylo Tkachov New
[AArch64] Add zip{1, 2}, uzp{1, 2}, trn{1, 2} support for vector permute. 0 0 0 2012-12-04 James Greenhalgh New
[AArch64] Add/Sub and set flags instructions in extend and shift_extend mode 0 0 0 2013-04-15 Hurugalawadi, Naveen New
[AArch64] Add/Sub and set flags instructions in extend and shift_extend mode 0 0 0 2013-04-12 Hurugalawadi, Naveen New
[AArch64] Adjust gcc.dg/torture/stackalign/builtin-apply-2.c 0 0 0 2013-06-17 Yufeng Zhang New
[AArch64] Adjust generic move costs 0 0 0 2014-11-19 Wilco New
[AArch64] Adjust generic move costs 0 0 0 2014-11-14 Wilco New
[AArch64] Adjust preferred_reload_class of SP+C 0 0 0 2013-10-17 Marcus Shawcroft New
[AArch64] Allow insv_imm to handle bigger immediates via masking to 16-bits 0 0 0 2013-05-17 Ian Bolton New
[AArch64] Allow stack pointer as first input to a subtraction 0 0 0 2015-01-13 Richard Sandiford New
[AArch64] Allow symbol+offset as symbolic constant expression 0 0 0 2012-07-06 Ian Bolton New
[AArch64] Allow symbol+offset even if not being used for memory access 0 0 0 2012-09-10 Richard Henderson New
[AArch64] Allow symbol+offset even if not being used for memory access 0 0 0 2012-08-31 Ian Bolton New
[AArch64] Always register fma_steering pass but gate it on the target option instead 0 0 0 2015-06-03 Kyrylo Tkachov New
[AArch64] Auto-generate the "BUILTIN_" macros for aarch64-builtins.c 0 0 0 2014-09-22 James Greenhalgh New
[AArch64] Auto-generate the "BUILTIN_" macros for aarch64-builtins.c 0 0 0 2014-09-18 James Greenhalgh New
[AArch64] Backport PR62308 to 4.9 0 0 0 2015-06-18 Christophe Lyon New
[AArch64] Bitwise adds and subs instructions with shift 0 0 0 2013-04-02 Hurugalawadi, Naveen New
[AArch64] Bitwise adds and subs instructions with shift 0 0 0 2013-03-26 Hurugalawadi, Naveen New
[AArch64] Break -mcpu tie between the compiler and assembler 0 0 0 2015-08-20 James Greenhalgh New
[AArch64] Break -mcpu tie between the compiler and assembler 0 0 0 2015-08-19 James Greenhalgh New
[AArch64] Change aarch64 vector cost to match vectorizer 0 0 0 2015-08-04 Pawel Kupidura New
[AArch64] Change aarch64 vector cost to match vectorizer 0 0 0 2015-08-04 Pawel Kupidura New
[AArch64] Change aarch64 vector cost to match vectorizer 0 0 0 2015-07-27 Pawel Kupidura New
[AArch64] Change iterator for neg<mode>2 from VDQM to VDQ. 0 0 0 2013-04-25 James Greenhalgh New
[AArch64] Change to pass -mabi=* directly to the assembler 0 0 0 2013-07-19 Yufeng Zhang New
[AArch64] Cheap fix for argument types of vmull_high_lane_{us}{16,32} 0 0 0 2014-09-11 James Greenhalgh New
[AArch64] Classify FRAME_POINTER_REGNUM and ARG_POINTER_REGNUM as POINTER_REGS. 0 0 0 2013-10-16 Marcus Shawcroft New
[AArch64] Cleanup logic around aarch64_final_prescan 0 0 0 2014-10-22 Kyrylo Tkachov New
[AArch64] Compare Negative instruction in shift and extend mode 0 0 0 2013-04-10 Hurugalawadi, Naveen New
[AArch64] Compare instruction in shift_extend mode 0 0 0 2013-04-17 Hurugalawadi, Naveen New
[AArch64] Compare instruction in shift_extend mode 0 0 0 2013-04-15 Hurugalawadi, Naveen New
[AArch64] Compare instruction in shift_extend mode 0 0 0 2013-04-12 Hurugalawadi, Naveen New
[AArch64] Convert NEON frint implementations to use builtins. 0 0 0 2013-04-26 James Greenhalgh New
[AArch64] Convert ld1, st1 arm_neon.h intrinsics to RTL builtins. 0 0 0 2013-07-04 James Greenhalgh New
[AArch64] Convert ld1, st1 arm_neon.h intrinsics to RTL builtins. 0 0 0 2013-07-02 James Greenhalgh New
[AArch64] Correct cache line size calculation 0 0 0 2012-09-03 Marcus Shawcroft New