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Patch A/R/T Date Submitter Delegate State
[AArch64] Fall back to -fPIC if no support of -fpic relocation modifer in assembler 0 0 0 2015-06-29 Jiong Wang New
[AArch64] Fix Cortex-A53 shift costs 0 0 0 2015-05-01 Wilco New
[AArch64] Fix Cortex-A53 shift costs 0 0 0 2015-03-05 Wilco New
[AArch64] Fix ICE at -O0 on vld1_lane intrinsics 0 0 0 2014-11-25 Alan Lawrence New
[AArch64] Fix LINUX_TARGET_LINK_SPEC to be consistent with ARM 0 0 0 2015-07-22 Szabolcs Nagy New
[AArch64] Fix Narrowing high shifts. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Fix PR 63724 - Improve immediate generation 0 0 0 2014-11-12 Ramana Radhakrishnan New
[AArch64] Fix PR 63724 - Improve immediate generation 0 0 0 2014-11-07 Ramana Radhakrishnan New
[AArch64] Fix PR 64263: Do not try to split constants when destination is SIMD reg 0 0 0 2014-12-12 Kyrylo Tkachov New
[AArch64] Fix PR 65624 (ICE in aarch64-linux-gnueabi crosscompiler on i686 host). 0 0 0 2015-04-01 max New
[AArch64] Fix PR/65770 vstN_lane on bigendian 0 0 0 2015-04-16 Alan Lawrence New
[AArch64] Fix PR63293 0 0 0 2014-09-25 Jiong Wang New
[AArch64] Fix PR63293 0 0 0 2014-09-19 Jiong Wang New
[AArch64] Fix REG_CFA_RESTORE mode. 0 0 0 2014-06-10 Marcus Shawcroft New
[AArch64] Fix __builtin_aarch64_absdi, must not fold to ABS_EXPR 0 0 0 2014-11-17 Alan Lawrence New
[AArch64] Fix aarch64_rtx_costs of PLUS/MINUS 0 0 0 2015-03-04 Wilco New
[AArch64] Fix aarch64_simd_valid_immediate for Bigendian 0 0 0 2014-03-21 Alan Lawrence New
[AArch64] Fix abitest for ilp32 0 0 0 2015-01-14 Hurugalawadi, Naveen New
[AArch64] Fix argument types for some high_lane* intrinsics implemented in assembly 0 0 0 2014-07-09 Kyrylo Tkachov New
[AArch64] Fix behaviour of -mcpu option to match ARM. 0 0 0 2014-01-16 James Greenhalgh New
[AArch64] Fix categorisation of the frecp* insns. 0 0 0 2013-09-03 James Greenhalgh New
[AArch64] Fix configure test for AArch64 dwarf2 debug_line 0 0 0 2013-08-22 Paolo Carlini New
[AArch64] Fix configure test for AArch64 dwarf2 debug_line 0 0 0 2013-08-22 Julian Brown New
[AArch64] Fix default CPU configurations 0 0 0 2014-02-25 Kyrylo Tkachov New
[AArch64] Fix duplication in test case. 0 0 0 2013-04-03 Tejas Belagod New
[AArch64] Fix early-clobber operands to vtbx[1,3] 0 0 0 2013-10-12 James Greenhalgh New
[AArch64] Fix early-clobber operands to vtbx[1,3] 0 0 0 2013-10-11 James Greenhalgh New
[AArch64] Fix faulty commit of testsuite/gcc.target/aarch64/csinc-2.c 0 0 0 2012-11-16 Ian Bolton New
[AArch64] Fix for LDR/STR to/from S and D registers 0 0 0 2013-05-01 Ian Bolton New
[AArch64] Fix for PR62040 0 0 0 2014-09-04 Carrot Wei New
[AArch64] Fix for PR62040 0 0 0 2014-08-20 Carrot Wei New
[AArch64] Fix geniterators.sh to use standard BRE syntax in sed 0 0 0 2015-03-23 Szabolcs Nagy New
[AArch64] Fix illegal assembly 'eon v1, v2, v3' 0 0 0 2015-02-11 Alan Lawrence New
[AArch64] Fix illegal assembly 'eon v1, v2, v3' 0 0 0 2015-01-28 Alan Lawrence New
[AArch64] Fix integer vabs intrinsics 0 0 0 2014-05-02 James Greenhalgh New
[AArch64] Fix invalid assembler in scalar_intrinsics.c test 0 0 0 2013-05-22 Ian Bolton New
[AArch64] Fix macro in vdup_lane_2 test case 0 0 0 2014-05-08 Ian Bolton New
[AArch64] Fix name of macros called in the vdup_lane Neon intrinsics 0 0 0 2013-08-12 James Greenhalgh New
[AArch64] Fix offset glitch in load reg pair pattern 0 0 0 2014-07-29 Jiong Wang New
[AArch64] Fix operand costing logic for MINUS 0 0 0 2015-04-27 Kyrylo Tkachov New
[AArch64] Fix order of modes to lroundmn2 standard names. 0 0 0 2013-04-26 James Greenhalgh New
[AArch64] Fix output template for Scalar Neon->Neon register move. 0 0 0 2013-10-16 James Greenhalgh New
[AArch64] Fix over length lines around aarch64_save_or_restore_fprs 0 0 0 2013-11-20 Marcus Shawcroft New
[AArch64] Fix parameters to vcvtx_high 0 0 0 2013-09-06 James Greenhalgh New
[AArch64] Fix possible wrong code generation when comparing DImode values. 0 0 0 2014-02-24 James Greenhalgh New
[AArch64] Fix possible wrong code generation when comparing DImode values. 0 0 0 2013-05-23 James Greenhalgh New
[AArch64] Fix predicate and constraint mismatch in logical atomic operations 0 0 0 2014-09-25 Michael Collison New
[AArch64] Fix preferred_reload_class for regclass STACK_REG. 0 0 0 2013-10-16 Marcus Shawcroft New
[AArch64] Fix printf format warning in aarch64_print_operand 0 0 0 2013-04-22 James Greenhalgh New
[AArch64] Fix register constraints for lane intrinsics. 0 0 0 2013-09-06 James Greenhalgh New
[AArch64] Fix shuffle for big-endian. 0 0 0 2014-04-02 Tejas Belagod New
[AArch64] Fix shuffle for big-endian. 0 0 0 2014-02-21 Tejas Belagod New
[AArch64] Fix size of memory store for the vst<n>_lane intrinsics 0 0 0 2013-10-29 James Greenhalgh New
[AArch64] Fix some reg-to-reg move scheduler types 0 0 0 2014-06-10 Kyrylo Tkachov New
[AArch64] Fix some saturating math NEON intrinsics types 0 0 0 2014-06-30 Kyrylo Tkachov New
[AArch64] Fix some saturating math NEON intrinsics types 0 0 0 2014-06-16 Kyrylo Tkachov New
[AArch64] Fix some warnings about unused variables. 0 0 0 2012-12-18 James Greenhalgh New
[AArch64] Fix the description of simd_fabd 0 0 0 2013-05-02 Vidya Praveen New
[AArch64] Fix the generation of .arch and .cpu assembly directives 0 0 0 2013-04-10 Yufeng Zhang New
[AArch64] Fix the pointer-typed function argument expansion in aarch64_simd_expand_args 0 0 0 2013-09-10 Yufeng Zhang New
[AArch64] Fix the pointer-typed function argument expansion in aarch64_simd_expand_args 0 0 0 2013-09-10 Yufeng Zhang New
[AArch64] Fix type of *<LOGICAL:optab>_one_cmpl_<SHIFT:optab><mode>3 pattern 0 0 0 2015-06-01 Kyrylo Tkachov New
[AArch64] Fix type of add_losym_<mode> 0 0 0 2014-07-14 Richard Earnshaw New
[AArch64] Fix types for some multiply instructions. 0 0 0 2013-09-06 James Greenhalgh New
[AArch64] Fix types for vcvt<sd>_n intrinsics. 0 0 0 2013-10-17 James Greenhalgh New
[AArch64] Fix types for vqdmlals_lane_s32 and vqdmlsls_lane_s32 intrinsics 0 0 0 2014-08-04 Kyrylo Tkachov New
[AArch64] Fix types of second parameter to qtbl/qtbx intrinsics 0 0 0 2013-09-06 James Greenhalgh New
[AArch64] Fix unordered comparisons to floating-point vcond. 0 0 0 2013-01-18 James Greenhalgh New
[AArch64] Fix up BSL expander for floating point types 0 0 0 2014-11-11 James Greenhalgh New
[AArch64] Fix usage of +no in error message for aarch64_parse_extension 0 0 0 2014-12-10 Kyrylo Tkachov New
[AArch64] Fix vcond where comparison and result have different types. 0 0 0 2013-05-14 James Greenhalgh New
[AArch64] Fix vdup<bhsd>_lane<q>_* intrinsics' lane parameter. 0 0 0 2013-09-05 Tejas Belagod New
[AArch64] Fix vfmaq_lane_f64. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Fix vld1<q>_* asm constraints in arm_neon.h 0 0 0 2013-04-24 James Greenhalgh New
[AArch64] Fix vmovn_high_*, vqmovn_high_* and vqmovun_high_* intrinsics. 0 0 0 2013-01-03 Tejas Belagod New
[AArch64] Fix whitespace around aarch64_movdi_<mode>low 0 0 0 2013-11-19 Marcus Shawcroft New
[AArch64] Fix wrong ".cfi_def_cfa_offset" in epilogue 0 0 0 2014-08-20 Jiong Wang New
[AArch64] Fix wrong-code bug in right-shift SISD patterns 0 0 0 2015-02-18 Kyrylo Tkachov New
[AArch64] Fix/revert fallout from machine_mode change 0 0 0 2014-10-29 Kyrylo Tkachov New
[AArch64] Fixup the vget_lane RTL patterns and intrinsics 0 0 0 2013-08-05 James Greenhalgh New
[AArch64] Fold max and min reduction builtins to tree. 0 0 0 2013-04-30 James Greenhalgh New
[AArch64] Fully support rotate on logical operations 0 0 0 2014-03-26 Richard Earnshaw New
[AArch64] Generalize code alignment 0 0 0 2014-12-12 Wilco New
[AArch64] Get %c output template tests to pass for -fPIC 0 0 0 2013-10-21 Kyrylo Tkachov New
[AArch64] Handle -|x| case using a single csneg 0 0 0 2015-07-13 Kyrylo Tkachov New
[AArch64] Handle FLOAT and UNSIGNED_FLOAT in rtx costs 0 0 0 2015-05-01 Kyrylo Tkachov New
[AArch64] Handle SYMBOL_SMALL_TPREL appropriately 0 0 0 2015-02-02 Hurugalawadi, Naveen New
[AArch64] Handle fcvta[su] and frint in RTX cost function 0 0 0 2014-07-10 Kyrylo Tkachov New
[AArch64] Handle symbol + offset more effectively 0 0 0 2012-09-25 Ian Bolton New
[AArch64] Handle wrong cost for addition of minus immediate in aarch64_rtx_costs. 0 0 0 2015-06-26 Bin Cheng New
[AArch64] Implement %c output template 0 0 0 2013-10-17 Kyrylo Tkachov New
[AArch64] Implement -fpic for -mcmodel=small 0 0 0 2015-05-20 Jiong Wang New
[AArch64] Implement -m{cpu,tune,arch}=native using only /proc/cpuinfo 0 0 0 2015-04-22 Kyrylo Tkachov New
[AArch64] Implement -m{cpu,tune,arch}=native using only /proc/cpuinfo 0 0 0 2015-04-22 Kyrylo Tkachov New
[AArch64] Implement -m{cpu,tune,arch}=native using only /proc/cpuinfo 0 0 0 2015-04-20 Kyrylo Tkachov New
[AArch64] Implement ADD in vector registers for 32-bit scalar values. 0 0 0 2014-06-23 James Greenhalgh New
[AArch64] Implement ADD in vector registers for 32-bit scalar values. 0 0 0 2014-05-16 James Greenhalgh New
[AArch64] Implement ADD in vector registers for 32-bit scalar values. 0 0 0 2014-03-28 James Greenhalgh New
[AArch64] Implement Bitwise AND and Set Flags 0 0 0 2013-01-29 Hurugalawadi, Naveen New
[AArch64] Implement HARD_REGNO_CALLER_SAVE_MODE 0 0 0 2014-05-12 Ian Bolton New