Patchwork GNU Compiler Collection

login
register
mail settings

Incoming patches

« Previous 1 2 ... 207 208 209 210 211 212 213 214 215 ... 478 479 Next »
Filters: State = Action Required remove filter    |    Archived = No remove filter
Patch A/R/T Date Submitter Delegate State
[AArch64] Add TARGET_MIN_DIVISIONS_FOR_RECIP_MUL 0 0 0 2014-12-12 Wilco New
[AArch64] Add __extension__ and __always_inline__ to crypto intrinsics 0 0 0 2015-05-21 Kyrill Tkachov New
[AArch64] Add a big-endian lane flip at expand-time in saturating math patterns 0 0 0 2014-06-10 Kyrylo Tkachov New
[AArch64] Add a builtin for rbit(q?)_p8; add intrinsics and tests. 0 0 0 2014-08-19 Alan Lawrence New
[AArch64] Add a new scheduling description for the ARM Cortex-A57 processor 0 0 0 2015-01-19 James Greenhalgh New
[AArch64] Add a new scheduling description for the ARM Cortex-A57 processor 0 0 0 2015-01-16 James Greenhalgh New
[AArch64] Add a new scheduling description for the ARM Cortex-A57 processor 0 0 0 2015-01-15 James Greenhalgh New
[AArch64] Add alternative 'extr' pattern, calculate rtx cost properly 0 0 0 2015-04-27 Kyrylo Tkachov New
[AArch64] Add basic recognition for cpu cortex-a53 and cortex-a57 0 0 0 2012-12-14 Yufeng Zhang New
[AArch64] Add bounds checking to vqdm*_lane intrinsics via a qualifier that also flips endianness 0 0 0 2014-11-06 Alan Lawrence New
[AArch64] Add branch-cost to cpu tuning information. 0 0 0 2015-05-05 Matthew Wahab New
[AArch64] Add branch-cost to cpu tuning information. 0 0 0 2015-04-21 Matthew Wahab New
[AArch64] Add combiner patterns for FAC instructions 0 0 0 2013-04-30 James Greenhalgh New
[AArch64] Add constrain to address offset in storewb_pair/loadwb_pair insns 0 0 0 2014-07-29 Jiong Wang New
[AArch64] Add cpu_defines.h for AArch64. 0 0 0 2015-05-19 Ramana Radhakrishnan New
[AArch64] Add doloop_end pattern for -fmodulo-sched 0 0 0 2014-11-10 Yangfei (Felix) New
[AArch64] Add handling of bswap operations in rtx costs 0 0 0 2014-03-19 Kyrylo Tkachov New
[AArch64] Add missing copyright and build dependency for aarch64-simd-builtins.def 0 0 0 2013-02-22 James Greenhalgh New
[AArch64] Add predicate for storewb_pair/loadwb_pair 0 0 0 2014-06-12 Jiong Wang New
[AArch64] Add range-check for Symbol + offset addressing. 0 0 0 2014-11-14 tejas belagod New
[AArch64] Add secondary reload for immediates into FP_REGS 0 0 0 2013-07-30 Ian Bolton New
[AArch64] Add special case when expanding vcond with arms {-1, -1}, {0, 0}. 0 0 0 2013-04-30 James Greenhalgh New
[AArch64] Add support for "wsp" register 0 0 0 2013-07-04 Yufeng Zhang New
[AArch64] Add support for -mcpu=cortex-a72 0 0 0 2015-02-04 Matthew Wahab New
[AArch64] Add support for TARGET_BUILTIN_DECL 0 0 0 2012-11-21 James Greenhalgh New
[AArch64] Add support for TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES hook. 0 0 0 2012-12-06 James Greenhalgh New
[AArch64] Add support for crtfastmath.c 0 0 0 2014-09-05 Ramana Radhakrishnan New
[AArch64] Add support for floating-point vcond. 0 0 0 2013-01-08 James Greenhalgh New
[AArch64] Add support for vectorizable standard math patterns. 0 0 0 2012-11-27 James Greenhalgh New
[AArch64] Add testcases for FAC, FCM changes. 0 0 0 2013-04-30 James Greenhalgh New
[AArch64] Add testcases to cover various pro/epi stack layout 0 0 0 2014-06-10 Jiong Wang New
[AArch64] Add vabs_s64 intrinsic 0 0 0 2013-07-19 Ian Bolton New
[AArch64] Add vabs_s64 intrinsic 0 0 0 2013-07-12 Ian Bolton New
[AArch64] Add vcond, vcondu support. 0 0 0 2012-10-09 James Greenhalgh New
[AArch64] Add vec_shr pattern for 64-bit vectors using ush{l,r}; enable tests. 0 0 0 2014-11-14 Alan Lawrence New
[AArch64] Add vector fix, fixuns, fix_trunc, fixuns_trunc standard patterns 0 0 0 2013-04-26 James Greenhalgh New
[AArch64] Add vector int to float conversions. 0 0 0 2013-04-26 James Greenhalgh New
[AArch64] Add vector pattern for __builtin_ctz 0 0 0 2014-11-14 Jiong Wang New
[AArch64] Add w -> w constraint to vec_set. 0 0 0 2013-11-05 Tejas Belagod New
[AArch64] Add zero_extend variants of logical+not ops 0 0 0 2015-04-21 Kyrylo Tkachov New
[AArch64] Add zip{1, 2}, uzp{1, 2}, trn{1, 2} support for vector permute. 0 0 0 2012-12-04 James Greenhalgh New
[AArch64] Add/Sub and set flags instructions in extend and shift_extend mode 0 0 0 2013-04-15 Hurugalawadi, Naveen New
[AArch64] Add/Sub and set flags instructions in extend and shift_extend mode 0 0 0 2013-04-12 Hurugalawadi, Naveen New
[AArch64] Adjust gcc.dg/torture/stackalign/builtin-apply-2.c 0 0 0 2013-06-17 Yufeng Zhang New
[AArch64] Adjust generic move costs 0 0 0 2014-11-19 Wilco New
[AArch64] Adjust generic move costs 0 0 0 2014-11-14 Wilco New
[AArch64] Adjust preferred_reload_class of SP+C 0 0 0 2013-10-17 Marcus Shawcroft New
[AArch64] Allow insv_imm to handle bigger immediates via masking to 16-bits 0 0 0 2013-05-17 Ian Bolton New
[AArch64] Allow stack pointer as first input to a subtraction 0 0 0 2015-01-13 Richard Sandiford New
[AArch64] Allow symbol+offset as symbolic constant expression 0 0 0 2012-07-06 Ian Bolton New
[AArch64] Allow symbol+offset even if not being used for memory access 0 0 0 2012-09-10 Richard Henderson New
[AArch64] Allow symbol+offset even if not being used for memory access 0 0 0 2012-08-31 Ian Bolton New
[AArch64] Always register fma_steering pass but gate it on the target option instead 0 0 0 2015-06-03 Kyrylo Tkachov New
[AArch64] Auto-generate the "BUILTIN_" macros for aarch64-builtins.c 0 0 0 2014-09-22 James Greenhalgh New
[AArch64] Auto-generate the "BUILTIN_" macros for aarch64-builtins.c 0 0 0 2014-09-18 James Greenhalgh New
[AArch64] Backport PR62308 to 4.9 0 0 0 2015-06-18 Christophe Lyon New
[AArch64] Bitwise adds and subs instructions with shift 0 0 0 2013-04-02 Hurugalawadi, Naveen New
[AArch64] Bitwise adds and subs instructions with shift 0 0 0 2013-03-26 Hurugalawadi, Naveen New
[AArch64] Change aarch64 vector cost to match vectorizer 0 0 0 2015-07-27 Pawel Kupidura New
[AArch64] Change iterator for neg<mode>2 from VDQM to VDQ. 0 0 0 2013-04-25 James Greenhalgh New
[AArch64] Change to pass -mabi=* directly to the assembler 0 0 0 2013-07-19 Yufeng Zhang New
[AArch64] Cheap fix for argument types of vmull_high_lane_{us}{16,32} 0 0 0 2014-09-11 James Greenhalgh New
[AArch64] Classify FRAME_POINTER_REGNUM and ARG_POINTER_REGNUM as POINTER_REGS. 0 0 0 2013-10-16 Marcus Shawcroft New
[AArch64] Cleanup logic around aarch64_final_prescan 0 0 0 2014-10-22 Kyrylo Tkachov New
[AArch64] Compare Negative instruction in shift and extend mode 0 0 0 2013-04-10 Hurugalawadi, Naveen New
[AArch64] Compare instruction in shift_extend mode 0 0 0 2013-04-17 Hurugalawadi, Naveen New
[AArch64] Compare instruction in shift_extend mode 0 0 0 2013-04-15 Hurugalawadi, Naveen New
[AArch64] Compare instruction in shift_extend mode 0 0 0 2013-04-12 Hurugalawadi, Naveen New
[AArch64] Convert NEON frint implementations to use builtins. 0 0 0 2013-04-26 James Greenhalgh New
[AArch64] Convert ld1, st1 arm_neon.h intrinsics to RTL builtins. 0 0 0 2013-07-04 James Greenhalgh New
[AArch64] Convert ld1, st1 arm_neon.h intrinsics to RTL builtins. 0 0 0 2013-07-02 James Greenhalgh New
[AArch64] Correct cache line size calculation 0 0 0 2012-09-03 Marcus Shawcroft New
[AArch64] Define BE loader name. 0 0 0 2014-01-06 Marcus Shawcroft New
[AArch64] Define TARGET_FLAGS_REGNUM 0 0 0 2014-02-28 Ramana Radhakrishnan New
[AArch64] Define __ARM_NEON by default 0 0 0 2014-02-24 Ian Bolton New
[AArch64] Define vec_extract. 0 0 0 2013-11-05 Tejas Belagod New
[AArch64] Describe the 'BSL' RTL pattern more accurately. 0 0 0 2013-04-25 James Greenhalgh New
[AArch64] Do not overwrite cost in bswap case 0 0 0 2015-05-01 Kyrylo Tkachov New
[AArch64] Enable Address sanitizer and UB sanitizer 0 0 0 2014-09-26 Andreas Schwab New
[AArch64] Enable Address sanitizer and UB sanitizer 0 0 0 2014-09-05 Christophe Lyon New
[AArch64] Enable Redundant Extension Elimination by default at 02 or higher 0 0 0 2013-04-24 Ian Bolton New
[AArch64] Enable shrink wrap 0 0 0 2014-09-04 Jiong Wang New
[AArch64] Enable shuffle on big-endian and turn on the testsuite 0 0 0 2014-04-11 Alan Lawrence New
[AArch64] Error out of arm_neon.h if nofp/nosimd 0 0 0 2015-01-14 Kyrylo Tkachov New
[AArch64] Expand binary operations' constant operands for neon intrinsics. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] FP vdiv tescase made big-endian safe 0 0 0 2013-11-19 Alex Velenko New
[AArch64] Fall back to -fPIC if no support of -fpic relocation modifer in assembler 0 0 0 2015-06-29 Jiong Wang New
[AArch64] Fix Cortex-A53 shift costs 0 0 0 2015-05-01 Wilco New
[AArch64] Fix Cortex-A53 shift costs 0 0 0 2015-03-05 Wilco New
[AArch64] Fix ICE at -O0 on vld1_lane intrinsics 0 0 0 2014-11-25 Alan Lawrence New
[AArch64] Fix LINUX_TARGET_LINK_SPEC to be consistent with ARM 0 0 0 2015-07-22 Szabolcs Nagy New
[AArch64] Fix Narrowing high shifts. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Fix PR 63724 - Improve immediate generation 0 0 0 2014-11-12 Ramana Radhakrishnan New
[AArch64] Fix PR 63724 - Improve immediate generation 0 0 0 2014-11-07 Ramana Radhakrishnan New
[AArch64] Fix PR 64263: Do not try to split constants when destination is SIMD reg 0 0 0 2014-12-12 Kyrylo Tkachov New
[AArch64] Fix PR 65624 (ICE in aarch64-linux-gnueabi crosscompiler on i686 host). 0 0 0 2015-04-01 max New
[AArch64] Fix PR/65770 vstN_lane on bigendian 0 0 0 2015-04-16 Alan Lawrence New
[AArch64] Fix PR63293 0 0 0 2014-09-25 Jiong Wang New
[AArch64] Fix PR63293 0 0 0 2014-09-19 Jiong Wang New
[AArch64] Fix REG_CFA_RESTORE mode. 0 0 0 2014-06-10 Marcus Shawcroft New