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Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[v1] RISC-V: Support FP rint auto-vectorization
[v1] RISC-V: Support FP rint auto-vectorization
- - - -
-
-
-
2023-09-26
Li, Pan2
New
[v1] RISC-V: Support FP round auto-vectorization
[v1] RISC-V: Support FP round auto-vectorization
- - - -
-
-
-
2023-09-26
Li, Pan2
New
[v1] RISC-V: Support FP trunc auto-vectorization
[v1] RISC-V: Support FP trunc auto-vectorization
- - - -
-
-
-
2023-09-27
Li, Pan2
New
[v1] RISC-V: Support FP roundeven auto-vectorization
[v1] RISC-V: Support FP roundeven auto-vectorization
- - - -
-
-
-
2023-09-27
Li, Pan2
New
[v1] RISC-V: Support {U}INT64 to FP16 auto-vectorization
[v1] RISC-V: Support {U}INT64 to FP16 auto-vectorization
- - - -
-
-
-
2023-09-28
Li, Pan2
New
[v2] RISC-V: Support {U}INT64 to FP16 auto-vectorization
[v2] RISC-V: Support {U}INT64 to FP16 auto-vectorization
- - - -
-
-
-
2023-09-28
Li, Pan2
New
[v1] RISC-V: Update comments for FP rounding related autovec
[v1] RISC-V: Update comments for FP rounding related autovec
- - - -
-
-
-
2023-10-06
Li, Pan2
New
[v1] RISC-V: Bugfix for legitimize address PR/111634
[v1] RISC-V: Bugfix for legitimize address PR/111634
- - - -
-
-
-
2023-10-07
Li, Pan2
New
[v1] RISC-V: Add more run test for FP rounding autovec
[v1] RISC-V: Add more run test for FP rounding autovec
- - - -
-
-
-
2023-10-07
Li, Pan2
New
[v1] RISC-V: Refine bswap16 auto vectorization code gen
[v1] RISC-V: Refine bswap16 auto vectorization code gen
- - - -
-
-
-
2023-10-09
Li, Pan2
New
[v2] RISC-V: Refine bswap16 auto vectorization code gen
[v2] RISC-V: Refine bswap16 auto vectorization code gen
- - - -
-
-
-
2023-10-09
Li, Pan2
New
[v1] RISC-V: Support FP lrint/lrintf auto vectorization
[v1] RISC-V: Support FP lrint/lrintf auto vectorization
- - - -
-
-
-
2023-10-11
Li, Pan2
New
[v1] RISC-V: Support FP irintf auto vectorization
[v1] RISC-V: Support FP irintf auto vectorization
- - - -
-
-
-
2023-10-12
Li, Pan2
New
[v1] RISC-V: Support FP llrint auto vectorization
[v1] RISC-V: Support FP llrint auto vectorization
- - - -
-
-
-
2023-10-12
Li, Pan2
New
[v1] RISC-V: Support FP lround/lroundf auto vectorization
[v1] RISC-V: Support FP lround/lroundf auto vectorization
- - - -
-
-
-
2023-10-12
Li, Pan2
New
[v1] RISC-V: Support FP lceil/lceilf auto vectorization
[v1] RISC-V: Support FP lceil/lceilf auto vectorization
- - - -
-
-
-
2023-10-12
Li, Pan2
New
[v1] RISC-V: Support FP lfloor/lfloorf auto vectorization
[v1] RISC-V: Support FP lfloor/lfloorf auto vectorization
- - - -
-
-
-
2023-10-13
Li, Pan2
New
[v1] RISC-V: Leverage stdint-gcc.h for RVV test cases
[v1] RISC-V: Leverage stdint-gcc.h for RVV test cases
- - - -
-
-
-
2023-10-13
Li, Pan2
New
[v1] RISC-V: Add test for FP iroundf auto vectorization
[v1] RISC-V: Add test for FP iroundf auto vectorization
- - - -
-
-
-
2023-10-13
Li, Pan2
New
[v1] RISC-V: Add test for FP llround auto vectorization
[v1] RISC-V: Add test for FP llround auto vectorization
- - - -
-
-
-
2023-10-13
Li, Pan2
New
[v1] RISC-V: Add test for FP llceil auto vectorization
[v1] RISC-V: Add test for FP llceil auto vectorization
- - - -
-
-
-
2023-10-13
Li, Pan2
New
[v1] RISC-V: Add test for FP iceil auto vectorization
[v1] RISC-V: Add test for FP iceil auto vectorization
- - - -
-
-
-
2023-10-13
Li, Pan2
New
[v1] RISC-V: Add test for FP ifloor auto vectorization
[v1] RISC-V: Add test for FP ifloor auto vectorization
- - - -
-
-
-
2023-10-13
Li, Pan2
New
[v1] RISC-V: Add test for FP llfloor auto vectorization
[v1] RISC-V: Add test for FP llfloor auto vectorization
- - - -
-
-
-
2023-10-13
Li, Pan2
New
[v1] RISC-V: Refine run test cases of math autovec
[v1] RISC-V: Refine run test cases of math autovec
- - - -
-
-
-
2023-10-13
Li, Pan2
New
[v1] RISC-V: Remove the type size restriction of vectorizer
[v1] RISC-V: Remove the type size restriction of vectorizer
- - - -
-
-
-
2023-10-18
Li, Pan2
New
[v1] RISC-V: Support partial VLS mode when preference fixed-vlmax
[v1] RISC-V: Support partial VLS mode when preference fixed-vlmax
- - - -
-
-
-
2023-10-20
Li, Pan2
New
[v2] RISC-V: Support partial VLS mode when preference fixed-vlmax [PR111857]
[v2] RISC-V: Support partial VLS mode when preference fixed-vlmax [PR111857]
- - - -
-
-
-
2023-10-20
Li, Pan2
New
[v1] RISC-V: Bugfix for merging undefined tmp register in math
[v1] RISC-V: Bugfix for merging undefined tmp register in math
- - - -
-
-
-
2023-10-23
Li, Pan2
New
[v1] RISC-V: Remove unnecessary asm check for rounding autovec
[v1] RISC-V: Remove unnecessary asm check for rounding autovec
- - - -
-
-
-
2023-10-23
Li, Pan2
New
[v1] RISC-V: Remove unnecessary asm check for binop constraint
[v1] RISC-V: Remove unnecessary asm check for binop constraint
- - - -
-
-
-
2023-10-23
Li, Pan2
New
[v1] RISC-V: Bugfix for merging undef tmp register for trunc
[v1] RISC-V: Bugfix for merging undef tmp register for trunc
- - - -
-
-
-
2023-10-23
Li, Pan2
New
[v1] RISC-V: Remove unnecessary asm check for vec cvt
[v1] RISC-V: Remove unnecessary asm check for vec cvt
- - - -
-
-
-
2023-10-23
Li, Pan2
New
[v2] VECT: Remove the type size restriction of vectorizer
[v2] VECT: Remove the type size restriction of vectorizer
- - - -
-
-
-
2023-10-26
Li, Pan2
New
[v1] RISC-V: Fix one range-loop-construct warning of avlprop
[v1] RISC-V: Fix one range-loop-construct warning of avlprop
- - - -
-
-
-
2023-10-28
Li, Pan2
New
[v3] VECT: Refine the type size restriction of call vectorizer
[v3] VECT: Refine the type size restriction of call vectorizer
- - - -
-
-
-
2023-10-30
Li, Pan2
New
[v4] VECT: Refine the type size restriction of call vectorizer
[v4] VECT: Refine the type size restriction of call vectorizer
- - - -
-
-
-
2023-10-31
Li, Pan2
New
[v1] EXPMED: Allow vector mode for DSE extract_low_bits [PR111720]
[v1] EXPMED: Allow vector mode for DSE extract_low_bits [PR111720]
- - - -
-
-
-
2023-11-02
Li, Pan2
New
[v1] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator
[v1] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator
- - - -
-
-
-
2023-11-02
Li, Pan2
New
[v2] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator
[v2] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator
- - - -
-
-
-
2023-11-03
Li, Pan2
New
[v1] RISC-V: Remove HF modes of FP to INT rounding autovec
[v1] RISC-V: Remove HF modes of FP to INT rounding autovec
- - - -
-
-
-
2023-11-04
Li, Pan2
New
[v1] RISC-V: Support FP rint to i/l/ll diff size autovec
[v1] RISC-V: Support FP rint to i/l/ll diff size autovec
- - - -
-
-
-
2023-11-05
Li, Pan2
New
[v1] RISC-V: Adjust FP rint round tests for RV32
[v1] RISC-V: Adjust FP rint round tests for RV32
- - - -
-
-
-
2023-11-06
Li, Pan2
New
[v1] RISC-V: Support FP round to i/l/ll diff size autovec
[v1] RISC-V: Support FP round to i/l/ll diff size autovec
- - - -
-
-
-
2023-11-06
Li, Pan2
New
[v1] RISC-V: Support FP ceil to i/l/ll diff size autovec
[v1] RISC-V: Support FP ceil to i/l/ll diff size autovec
- - - -
-
-
-
2023-11-07
Li, Pan2
New
[v1] ISC-V: Support FP floor to i/l/ll diff size autovec
[v1] ISC-V: Support FP floor to i/l/ll diff size autovec
- - - -
-
-
-
2023-11-07
Li, Pan2
New
[v2] DSE: Allow vector type for get_stored_val when read < store
[v2] DSE: Allow vector type for get_stored_val when read < store
- - - -
-
-
-
2023-11-09
Li, Pan2
New
[v1] RISC-V: Refine frm emit after bb end in succ edges
[v1] RISC-V: Refine frm emit after bb end in succ edges
- - - -
-
-
-
2023-11-09
Li, Pan2
New
[v1] Internal-fn: Add FLOATN support for l/ll round and rint [PR/112432]
[v1] Internal-fn: Add FLOATN support for l/ll round and rint [PR/112432]
- - - -
-
-
-
2023-11-09
Li, Pan2
New
[v1] RISC-V: Support vec_init for trailing same element
[v1] RISC-V: Support vec_init for trailing same element
- - - -
-
-
-
2023-11-10
Li, Pan2
New
[v1] RISC-V: Add HFmode for l/ll round and rint autovec
[v1] RISC-V: Add HFmode for l/ll round and rint autovec
- - - -
-
-
-
2023-11-10
Li, Pan2
New
[v3] DSE: Allow vector type for get_stored_val when read < store
[v3] DSE: Allow vector type for get_stored_val when read < store
- - - -
-
-
-
2023-11-12
Li, Pan2
New
[v1] RISC-V: Support FP l/ll round and rint HF mode autovec
[v1] RISC-V: Support FP l/ll round and rint HF mode autovec
- - - -
-
-
-
2023-11-12
Li, Pan2
New
[v1] RISC-V: Fix RVV dynamic frm tests failure
[v1] RISC-V: Fix RVV dynamic frm tests failure
- - - -
-
-
-
2023-11-13
Li, Pan2
New
[v4] DSE: Allow vector type for get_stored_val when read < store
[v4] DSE: Allow vector type for get_stored_val when read < store
- - - -
-
-
-
2023-11-13
Li, Pan2
New
[v1] RISC-V: Refine the mask generation for vec_init case 2
[v1] RISC-V: Refine the mask generation for vec_init case 2
- - - -
-
-
-
2023-11-15
Li, Pan2
New
[v2] RISC-V: Refine the mask generation for vec_init case 2
[v2] RISC-V: Refine the mask generation for vec_init case 2
- - - -
-
-
-
2023-11-15
Li, Pan2
New
[v1] RISC-V: Bugfix for ICE in block move when zve32f
[v1] RISC-V: Bugfix for ICE in block move when zve32f
- - - -
-
-
-
2023-11-29
Li, Pan2
New
[v1] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
[v1] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
- - - -
-
-
-
2023-11-30
Li, Pan2
New
[v2] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
[v2] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
- - - -
-
-
-
2023-12-01
Li, Pan2
New
[v3] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
[v3] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
- - - -
-
-
-
2023-12-01
Li, Pan2
New
[v4] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
[v4] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
- - - -
-
-
-
2023-12-02
Li, Pan2
New
[v1] RISC-V: Add test case for bug PR112813
[v1] RISC-V: Add test case for bug PR112813
- - - -
-
-
-
2023-12-04
Li, Pan2
New
[v1] RISC-V: Fix ICE for incorrect mode attr in V_F2DI_CONVERT_BRIDGE
[v1] RISC-V: Fix ICE for incorrect mode attr in V_F2DI_CONVERT_BRIDGE
- - - -
-
-
-
2023-12-08
Li, Pan2
New
[v1] RISC-V: Disable RVV VCOMPRESS avl propagation
[v1] RISC-V: Disable RVV VCOMPRESS avl propagation
- - - -
-
-
-
2023-12-12
Li, Pan2
New
[v1] RISC-V: Refine test cases for both PR112929 and PR112988
[v1] RISC-V: Refine test cases for both PR112929 and PR112988
- - - -
-
-
-
2023-12-13
Li, Pan2
New
[v1] RISC-V: Fix POLY INT handle bug
[v1] RISC-V: Fix POLY INT handle bug
- - - -
-
-
-
2023-12-18
Li, Pan2
New
[v1] RISC-V: Bugfix for the RVV const vector
[v1] RISC-V: Bugfix for the RVV const vector
- - - -
-
-
-
2023-12-18
Li, Pan2
New
[v2] RISC-V: Bugfix for the RVV const vector
[v2] RISC-V: Bugfix for the RVV const vector
- - - -
-
-
-
2023-12-18
Li, Pan2
New
[v1] RISC-V: Bugfix for the const vector in single steps
[v1] RISC-V: Bugfix for the const vector in single steps
- - - -
-
-
-
2023-12-20
Li, Pan2
New
[v2] RISC-V: Bugfix for the const vector in single steps
[v2] RISC-V: Bugfix for the const vector in single steps
- - - -
-
-
-
2023-12-20
Li, Pan2
New
[v3] RISC-V: Bugfix for the const vector in single steps
[v3] RISC-V: Bugfix for the const vector in single steps
- - - -
-
-
-
2023-12-20
Li, Pan2
New
[v1] RISC-V: XFail the signbit-5 run test for RVV
[v1] RISC-V: XFail the signbit-5 run test for RVV
- - - -
-
-
-
2023-12-21
Li, Pan2
New
[v1] RISC-V: XFAIL pr30957-1.c when loop vectorized with variable factor
[v1] RISC-V: XFAIL pr30957-1.c when loop vectorized with variable factor
- - - -
-
-
-
2023-12-23
Li, Pan2
New
[v2] RISC-V: XFail the signbit-5 run test for RVV
[v2] RISC-V: XFail the signbit-5 run test for RVV
- - - -
-
-
-
2023-12-23
Li, Pan2
New
[v2] RISC-V: XFAIL pr30957-1.c when loop vectorized with variable factor
[v2] RISC-V: XFAIL pr30957-1.c when loop vectorized with variable factor
- - - -
-
-
-
2023-12-26
Li, Pan2
New
[v3] RISC-V: Bugfix for doesn't honor no-signed-zeros option
[v3] RISC-V: Bugfix for doesn't honor no-signed-zeros option
- - - -
-
-
-
2024-01-02
Li, Pan2
New
[v4] LOOP-UNROLL: Leverage HAS_SIGNED_ZERO for var expansion
[v4] LOOP-UNROLL: Leverage HAS_SIGNED_ZERO for var expansion
- - - -
-
-
-
2024-01-11
Li, Pan2
New
[v5] LOOP-UNROLL: Leverage HAS_SIGNED_ZERO for var expansion
[v5] LOOP-UNROLL: Leverage HAS_SIGNED_ZERO for var expansion
- - - -
-
-
-
2024-01-11
Li, Pan2
New
[v1] RISC-V: Update the comments of riscv_v_ext_mode_p [NFC]
[v1] RISC-V: Update the comments of riscv_v_ext_mode_p [NFC]
- - - -
-
-
-
2024-01-12
Li, Pan2
New
[v1] RISC-V: Fix asm checks regression due to recent middle-end change
[v1] RISC-V: Fix asm checks regression due to recent middle-end change
- - - -
-
-
-
2024-01-17
Li, Pan2
New
[v1] RISC-V: Bugfix for vls integer mode calling convention
[v1] RISC-V: Bugfix for vls integer mode calling convention
- - - -
-
-
-
2024-01-24
Li, Pan2
New
[v2] RISC-V: Bugfix for vls mode aggregated in GPR calling convention
[v2] RISC-V: Bugfix for vls mode aggregated in GPR calling convention
- - - -
-
-
-
2024-01-30
Li, Pan2
New
[v1] RISC-V: Cleanup the comments for the psabi
[v1] RISC-V: Cleanup the comments for the psabi
- - - -
-
-
-
2024-01-31
Li, Pan2
New
[v1] RISC-V: Bugfix for RVV overloaded intrinisc ICE when empty args
[v1] RISC-V: Bugfix for RVV overloaded intrinisc ICE when empty args
- - - -
-
-
-
2024-02-06
Li, Pan2
New
[v1] RISC-V: Bugfix for RVV overloaded intrinsic ICE in function checker
[v1] RISC-V: Bugfix for RVV overloaded intrinsic ICE in function checker
- - - -
-
-
-
2024-02-07
Li, Pan2
New
[v1] RISC-V: Fix misspelled term args in error_at message
[v1] RISC-V: Fix misspelled term args in error_at message
- - - -
-
-
-
2024-02-10
Li, Pan2
New
[v1] Internal-fn: Add new internal function SAT_ADDU
[v1] Internal-fn: Add new internal function SAT_ADDU
- - - -
-
-
-
2024-02-17
Li, Pan2
New
[v1] RISC-V: Upgrade RVV intrinsic version to 0.12
[v1] RISC-V: Upgrade RVV intrinsic version to 0.12
- - - -
-
-
-
2024-02-21
Li, Pan2
New
[v1] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
[v1] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
- - - -
-
-
-
2024-02-23
Li, Pan2
New
[v2] Draft|Internal-fn: Introduce internal fn saturation US_PLUS
[v2] Draft|Internal-fn: Introduce internal fn saturation US_PLUS
- - - -
-
-
-
2024-02-24
Li, Pan2
New
[v1] RTL: Bugfix ICE after allow vector type in DSE
[v1] RTL: Bugfix ICE after allow vector type in DSE
- - - -
-
-
-
2024-02-26
Li, Pan2
New
[v2] DSE: Bugfix ICE after allow vector type in get_stored_val
[v2] DSE: Bugfix ICE after allow vector type in get_stored_val
- - - -
-
-
-
2024-02-26
Li, Pan2
New
[v2] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
[v2] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
- - - -
-
-
-
2024-02-28
Li, Pan2
New
[v3] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
[v3] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
- - - -
-
-
-
2024-02-28
Li, Pan2
New
[v3] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
[v3] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
- - - -
-
-
-
2024-02-28
Li, Pan2
New
[v4] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
[v4] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
- - - -
-
-
-
2024-03-01
Li, Pan2
New
[v1] RISC-V: Cleanup unused code in riscv_v_adjust_bytesize [NFC]
[v1] RISC-V: Cleanup unused code in riscv_v_adjust_bytesize [NFC]
- - - -
-
-
-
2024-03-05
Li, Pan2
New
[v1] RISC-V: Introduce gcc attribute riscv_rvv_vector_bits for RVV
[v1] RISC-V: Introduce gcc attribute riscv_rvv_vector_bits for RVV
- - - -
-
-
-
2024-03-06
Li, Pan2
New
[v2] RISC-V: Introduce gcc attribute riscv_rvv_vector_bits for RVV
[v2] RISC-V: Introduce gcc attribute riscv_rvv_vector_bits for RVV
- - - -
-
-
-
2024-03-06
Li, Pan2
New
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