Show patches with: State = Action Required       |    Archived = No       |   126614 patches
« 1 2 ... 440 441 442 … 1266 1267 »
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[committed] Reduce vector comparison of uniform vectors to a scalar comparison [committed] Reduce vector comparison of uniform vectors to a scalar comparison - - - - --- 2021-08-27 Jeff Law New
[committed] Reduce size of insn_data - - - - --- 2015-08-05 Richard Sandiford New
[committed] Reduce maximum PCREL17F branch offsets for PIC code - - - - --- 2012-06-03 John David Anglin New
[committed] Recognize more SIMD lane access patterns [committed] Recognize more SIMD lane access patterns - - - - --- 2019-06-21 Jakub Jelinek New
[committed] Recognize #pragma omp ordered simd with -fopenmp-simd (PR c/81887) [committed] Recognize #pragma omp ordered simd with -fopenmp-simd (PR c/81887) - - - - --- 2017-09-01 Jakub Jelinek New
[committed] Reasonably handle SUBREGs in risc-v cost modeling [committed] Reasonably handle SUBREGs in risc-v cost modeling - - - - --- 2024-02-04 Jeff Law New
[committed] Readd __tls_get_addr and __interceptor___tls_get_addr to libtsan for ABI compatibility … - - - - --- 2016-01-19 Jakub Jelinek New
[committed] Read-only DWARF2 frame tables on AIX - - - - --- 2015-09-18 David Edelsohn New
[committed] Re: [patch] 'omp scan' struct block seq update for OpenMP 5.x [committed] Re: [patch] 'omp scan' struct block seq update for OpenMP 5.x - - - - --- 2023-04-25 Tobias Burnus New
[committed] Re: [Patch,v4] Fortran/OpenMP: Fix mapping of array descriptors and deferred-length str… [committed] Re: [Patch,v4] Fortran/OpenMP: Fix mapping of array descriptors and deferred-length str… - - - - --- 2023-05-17 Tobias Burnus New
[committed] Re: [PATCHv2] openmp: Add support for 'present' modifier [committed] Re: [PATCHv2] openmp: Add support for 'present' modifier - - - - --- 2023-06-06 Tobias Burnus New
[committed] Re: [PATCH] openmp: Add support for the 'indirect' clause in C/C++ [committed] Re: [PATCH] openmp: Add support for the 'indirect' clause in C/C++ - - - - --- 2024-01-03 Kwok Cheung Yeung New
[committed] Re: [PATCH] openmp: Add support for the 'indirect' clause in C/C++ [committed] Re: [PATCH] openmp: Add support for the 'indirect' clause in C/C++ - - - - --- 2024-01-03 Kwok Cheung Yeung New
[committed] Re: [PATCH] libstdc++: Add missing constexpr to simd [committed] Re: [PATCH] libstdc++: Add missing constexpr to simd - - - - --- 2023-05-23 Matthias Kretz New
[committed] Re: [PATCH, Fortran] Fix compare logic for anonymous structure types - - - - --- 2016-08-29 Fritz Reese New
[committed] Re: C PATCH to kill c_save_expr or towards delayed folding for the C FE - - - - --- 2017-05-22 Jakub Jelinek New
[committed] Re: Bug in DEC UNION/STRUCT patch - - - - --- 2016-08-23 Fritz Reese New
[committed] Re: A gfortran silent "wrong code" bug in the transition from 4.9.0 -> 4.9.1, using Ope… - - - - --- 2016-07-01 Jakub Jelinek New
[committed] RISCV: Inline subword atomic ops [committed] RISCV: Inline subword atomic ops - - - - --- 2023-04-26 Patrick O'Neill New
[committed] RISC-V:Add crypto vector implied ISA info. [committed] RISC-V:Add crypto vector implied ISA info. - - - - --- 2023-12-13 Feng Wang New
[committed] RISC-V: prefetch.* only take base register with zero-offset for the address [committed] RISC-V: prefetch.* only take base register with zero-offset for the address - - - - --- 2023-02-20 Kito Cheng New
[committed] RISC-V: Use splitter to generate zicond in another case [committed] RISC-V: Use splitter to generate zicond in another case - - - - --- 2023-08-29 Jeff Law New
[committed] RISC-V: Use get_typenode_from_name to get fixed-width integer type nodes [committed] RISC-V: Use get_typenode_from_name to get fixed-width integer type nodes - - - - --- 2023-01-26 Kito Cheng New
[committed] RISC-V: Use a tab rather than space with FSFLAGS [committed] RISC-V: Use a tab rather than space with FSFLAGS - - - - --- 2022-06-09 Maciej W. Rozycki New
[committed] RISC-V: Update testcase due to message update [committed] RISC-V: Update testcase due to message update - - - - --- 2024-01-19 Kito Cheng New
[committed] RISC-V: Update RVV integer compare simplification comments [committed] RISC-V: Update RVV integer compare simplification comments - - - - --- 2023-05-11 Li, Pan2 New
[committed] RISC-V: Sync arch-canonicalize and riscv-common.cc [committed] RISC-V: Sync arch-canonicalize and riscv-common.cc - - - - --- 2022-04-11 Kito Cheng New
[committed] RISC-V: Suppress warning for signed and unsigned integer comparison. [committed] RISC-V: Suppress warning for signed and unsigned integer comparison. - - - - --- 2020-06-15 Kito Cheng New
[committed] RISC-V: Suppress unused parameter warning in riscv-common.cc [committed] RISC-V: Suppress unused parameter warning in riscv-common.cc - - - - --- 2023-05-12 Kito Cheng New
[committed] RISC-V: Suppress build warnings [committed] RISC-V: Suppress build warnings - - - - --- 2022-09-09 Kito Cheng New
[committed] RISC-V: Suppress -Wclass-memaccess warning [committed] RISC-V: Suppress -Wclass-memaccess warning - - - - --- 2022-08-29 Kito Cheng New
[committed] RISC-V: Support -misa-spec for arch-canonicalize and multilib-generator. [PR104853] [committed] RISC-V: Support -misa-spec for arch-canonicalize and multilib-generator. [PR104853] - - - - --- 2022-04-11 Kito Cheng New
[committed] RISC-V: Simplify testcase condition for RVV tests [NFC] [committed] RISC-V: Simplify testcase condition for RVV tests [NFC] - - - - --- 2023-01-31 Kito Cheng New
[committed] RISC-V: Reorganize binary autovec testcases [committed] RISC-V: Reorganize binary autovec testcases - - - - --- 2023-05-12 Li, Pan2 New
[committed] RISC-V: Remove redundant ABI test [committed] RISC-V: Remove redundant ABI test - - - - --- 2023-09-13 juzhe.zhong@rivai.ai New
[committed] RISC-V: Refine riscv_subset_list::parse [NFC] [committed] RISC-V: Refine riscv_subset_list::parse [NFC] - - - - --- 2023-12-04 Kito Cheng New
[committed] RISC-V: Refine riscv_parse_arch_string [committed] RISC-V: Refine riscv_parse_arch_string - - - - --- 2020-10-27 Kito Cheng New
[committed] RISC-V: Refactor riscv_implied_info_t to make it able to handle conditional implication… [committed] RISC-V: Refactor riscv_implied_info_t to make it able to handle conditional implication… - - - - --- 2023-12-04 Kito Cheng New
[committed] RISC-V: Pull out function call with side effect from gcc_assert. [committed] RISC-V: Pull out function call with side effect from gcc_assert. - - - - --- 2023-05-13 Kito Cheng New
[committed] RISC-V: Pass -mno-relax to assembler [committed] RISC-V: Pass -mno-relax to assembler - - - - --- 2021-05-25 Kito Cheng New
[committed] RISC-V: NFC: Move scalar block move expansion code into riscv-string.cc [committed] RISC-V: NFC: Move scalar block move expansion code into riscv-string.cc - - - - --- 2023-10-16 Jeff Law New
[committed] RISC-V: Modify copyright year of vector-crypto.md [committed] RISC-V: Modify copyright year of vector-crypto.md - - - - --- 2024-01-02 Feng Wang New
[committed] RISC-V: Mark non-export symbol static and const in riscv-common.c [committed] RISC-V: Mark non-export symbol static and const in riscv-common.c - - - - --- 2020-11-06 Kito Cheng New
[committed] RISC-V: Make the test condition more strict for gcc.target/riscv/_Float16-zhinxmin-1.c [committed] RISC-V: Make the test condition more strict for gcc.target/riscv/_Float16-zhinxmin-1.c - - - - --- 2023-02-22 Kito Cheng New
[committed] RISC-V: Make stack_save_restore tests more robust [committed] RISC-V: Make stack_save_restore tests more robust - - - - --- 2023-08-25 Jeff Law New
[committed] RISC-V: Infrastructure for instruction fusion [committed] RISC-V: Infrastructure for instruction fusion - - - - --- 2023-11-19 Jeff Law New
[committed] RISC-V: Improve portability of testcases [committed] RISC-V: Improve portability of testcases - - - - --- 2023-05-08 Kito Cheng New
[committed] RISC-V: Improve caller-save code generation. [committed] RISC-V: Improve caller-save code generation. - - - - --- 2020-02-08 Jim Wilson New
[committed] RISC-V: Implement misc macro for vector extensions. [committed] RISC-V: Implement misc macro for vector extensions. - - - - --- 2022-03-21 Kito Cheng New
[committed] RISC-V: Handle zi* extension correctly for arch-canonicalize script [committed] RISC-V: Handle zi* extension correctly for arch-canonicalize script - - - - --- 2021-10-28 Kito Cheng New
[committed] RISC-V: Handle implied extension in multilib-generator [committed] RISC-V: Handle implied extension in multilib-generator - - - - --- 2020-10-16 Kito Cheng New
[committed] RISC-V: Fix xtheadcondmov-indirect.c [committed] RISC-V: Fix xtheadcondmov-indirect.c - - - - --- 2023-08-27 Jeff Law New
[committed] RISC-V: Fix wrong zifencei handling in riscv_subset_list::to_string [committed] RISC-V: Fix wrong zifencei handling in riscv_subset_list::to_string - - - - --- 2021-11-11 Kito Cheng New
[committed] RISC-V: Fix wrong select_kind in riscv_compute_multilib [committed] RISC-V: Fix wrong select_kind in riscv_compute_multilib - - - - --- 2023-05-16 Kito Cheng New
[committed] RISC-V: Fix wrong predicator for zero_extendsidi2_internal pattern [committed] RISC-V: Fix wrong predicator for zero_extendsidi2_internal pattern - - - - --- 2021-10-28 Kito Cheng New
[committed] RISC-V: Fix testsuite regression due to recent IRA changes. [committed] RISC-V: Fix testsuite regression due to recent IRA changes. - - - - --- 2020-03-06 Kito Cheng New
[committed] RISC-V: Fix testsuite regression due to recent IRA changes. [committed] RISC-V: Fix testsuite regression due to recent IRA changes. - - - - --- 2020-03-11 Kito Cheng New
[committed] RISC-V: Fix testsuite fail on RV32 [committed] RISC-V: Fix testsuite fail on RV32 - - - - --- 2023-04-17 Kito Cheng New
[committed] RISC-V: Fix testsuite [committed] RISC-V: Fix testsuite - - - - --- 2024-01-08 Kito Cheng New
[committed] RISC-V: Fix testcase after bump isa spec version [committed] RISC-V: Fix testcase after bump isa spec version - - - - --- 2022-01-24 Kito Cheng New
[committed] RISC-V: Fix spill-12 test [committed] RISC-V: Fix spill-12 test - - - - --- 2023-08-27 Jeff Law New
[committed] RISC-V: Fix spill-11.c testsuite failure [committed] RISC-V: Fix spill-11.c testsuite failure - - - - --- 2023-08-27 Jeff Law New
[committed] RISC-V: Fix simplify_ior_optimization.c on rv32 [committed] RISC-V: Fix simplify_ior_optimization.c on rv32 - - - - --- 2023-04-20 Kito Cheng New
[committed] RISC-V: Fix riscv/arch-19.c with different ISA spec version [committed] RISC-V: Fix riscv/arch-19.c with different ISA spec version - - - - --- 2023-04-20 Kito Cheng New
[committed] RISC-V: Fix redundant variable declaration. [committed] RISC-V: Fix redundant variable declaration. - - - - --- 2023-07-21 juzhe.zhong@rivai.ai New
[committed] RISC-V: Fix python3 compatibility for multilib-generator [committed] RISC-V: Fix python3 compatibility for multilib-generator - - - - --- 2020-12-24 Kito Cheng New
[committed] RISC-V: Fix missing file dependency in RISC-V back-end [PR109328] [committed] RISC-V: Fix missing file dependency in RISC-V back-end [PR109328] - - - - --- 2023-03-31 Kito Cheng New
[committed] RISC-V: Fix mismatched new delete for unique_ptr [committed] RISC-V: Fix mismatched new delete for unique_ptr - - - - --- 2023-11-18 Kito Cheng New
[committed] RISC-V: Fix minor testsuite problem with zicond [committed] RISC-V: Fix minor testsuite problem with zicond - - - - --- 2023-08-25 Jeff Law New
[committed] RISC-V: Fix indentation of "length" attribute for branches and jumps [committed] RISC-V: Fix indentation of "length" attribute for branches and jumps - - - - --- 2023-11-10 Maciej W. Rozycki New
[committed] RISC-V: Fix detection of zifencei support for binutils [committed] RISC-V: Fix detection of zifencei support for binutils - - - - --- 2022-02-05 Kito Cheng New
[committed] RISC-V: Fix bug of get_mask_mode [committed] RISC-V: Fix bug of get_mask_mode - - - - --- 2023-07-31 juzhe.zhong@rivai.ai New
[committed] RISC-V: Fix avl-type operand index error for ZVBC [committed] RISC-V: Fix avl-type operand index error for ZVBC - - - - --- 2024-01-08 Feng Wang New
[committed] RISC-V: Fix Werror=sign-compare in riscv_validate_vector_type [committed] RISC-V: Fix Werror=sign-compare in riscv_validate_vector_type - - - - --- 2024-04-12 Li, Pan2 New
[committed] RISC-V: Fix RVV binary auto-vectorizaiton test fails [committed] RISC-V: Fix RVV binary auto-vectorizaiton test fails - - - - --- 2023-05-12 Li, Pan2 New
[committed] RISC-V: Fix INSN costing and more zicond tests [committed] RISC-V: Fix INSN costing and more zicond tests - - - - --- 2023-09-29 Jeff Law New
[committed] RISC-V: Fix *sge<u>_<X:mode><GPR:mode> pattern [committed] RISC-V: Fix *sge<u>_<X:mode><GPR:mode> pattern - - - - --- 2024-02-16 Kito Cheng New
[committed] RISC-V: Factor out vector manager code in vsetvli insertion pass. [NFC] [committed] RISC-V: Factor out vector manager code in vsetvli insertion pass. [NFC] - - - - --- 2023-05-08 Kito Cheng New
[committed] RISC-V: Expose bswapsi for TARGET_64BIT [committed] RISC-V: Expose bswapsi for TARGET_64BIT - - - - --- 2023-09-05 Jeff Law New
[committed] RISC-V: Ensure vector args and return use function stack to pass [PR110119] [committed] RISC-V: Ensure vector args and return use function stack to pass [PR110119] - - - - --- 2023-06-15 Li, Pan2 via Gcc-patches New
[committed] RISC-V: Drop some commited accidentally code. [committed] RISC-V: Drop some commited accidentally code. - - - - --- 2020-12-01 Kito Cheng New
[committed] RISC-V: Do not emit zcisr and zifencei if i-ext is 2.0 [committed] RISC-V: Do not emit zcisr and zifencei if i-ext is 2.0 - - - - --- 2022-01-24 Kito Cheng New
[committed] RISC-V: Detect python and pick best one for calling multilib-generator [committed] RISC-V: Detect python and pick best one for calling multilib-generator - - - - --- 2021-07-20 Kito Cheng New
[committed] RISC-V: Clean up unused variable [NFC] [committed] RISC-V: Clean up unused variable [NFC] - - - - --- 2024-01-05 Kito Cheng New
[committed] RISC-V: Clean up testsuite for multi-lib testing [NFC] [committed] RISC-V: Clean up testsuite for multi-lib testing [NFC] - - - - --- 2024-01-05 Kito Cheng New
[committed] RISC-V: Check multiletter extension has more than 1 letter [committed] RISC-V: Check multiletter extension has more than 1 letter - - - - --- 2020-11-02 Kito Cheng New
[committed] RISC-V: Adjust testcase for rvv/base/user-1.c [committed] RISC-V: Adjust testcase for rvv/base/user-1.c - - 2 2 --- 2022-10-10 Kito Cheng New
[committed] RISC-V: Adjust long unconditional branch sequence [committed] RISC-V: Adjust long unconditional branch sequence - - - - --- 2023-10-11 Jeff Law New
[committed] RISC-V: Add sifive-x280 to -mcpu [committed] RISC-V: Add sifive-x280 to -mcpu - - - - --- 2023-12-04 Kito Cheng New
[committed] RISC-V: Add riscv_vector.h wrapper in testsuite to prevent pull in stdint.h from C libr… [committed] RISC-V: Add riscv_vector.h wrapper in testsuite to prevent pull in stdint.h from C libr… - - 2 2 --- 2022-10-10 Kito Cheng New
[committed] RISC-V: Add riscv_vector.h wrapper [committed] RISC-V: Add riscv_vector.h wrapper - - - - --- 2022-12-27 Kito Cheng New
[committed] RISC-V: Add required_extensions in function_group [committed] RISC-V: Add required_extensions in function_group - - - - --- 2023-12-19 Feng Wang New
[committed] RISC-V: Add newline to the end of file [NFC] [committed] RISC-V: Add newline to the end of file [NFC] - - - - --- 2022-10-10 Kito Cheng New
[committed] RISC-V: Add multiarch support on riscv-linux-gnu [committed] RISC-V: Add multiarch support on riscv-linux-gnu - - - - --- 2023-08-22 Jeff Law New
[committed] RISC-V: Add missing insn types to XiangShan Nanhu scheduler model [committed] RISC-V: Add missing insn types to XiangShan Nanhu scheduler model - - - - --- 2024-03-31 Jeff Law New
[committed] RISC-V: Add crypto vector builtin function. [committed] RISC-V: Add crypto vector builtin function. - - - - --- 2024-01-05 Feng Wang New
[committed] RISC-V: Add crypto vector api-testing cases. [committed] RISC-V: Add crypto vector api-testing cases. - - - - --- 2024-01-05 Feng Wang New
[committed] RISC-V: Add crypto machine descriptions [committed] RISC-V: Add crypto machine descriptions - - - - --- 2024-01-02 Feng Wang New
[committed] RISC-V: Add avail interface into function_group_info [committed] RISC-V: Add avail interface into function_group_info - - - - --- 2023-12-12 Feng Wang New
[committed] RISC-V: Add TARGET_MIN_VLEN_OPTS to fix the build [committed] RISC-V: Add TARGET_MIN_VLEN_OPTS to fix the build - - - - --- 2023-10-11 Kito Cheng New
« 1 2 ... 440 441 442 … 1266 1267 »