Patchwork GNU Compiler Collection

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Patch A/R/T Date Submitter Delegate State
[AArch64,2/2] PR/60825 Make {int,uint}64x1_t in arm_neon.h a proper vector type 0 0 0 2014-06-24 Alan Lawrence New
[AArch64,2/2] Do not double-copy bytes in volatile struct operations 0 0 0 2014-08-21 James Greenhalgh New
[AArch64,2/2] Correct signedness of builtins, remove casts from arm_neon.h 0 0 0 2014-05-29 Alan Lawrence New
[AArch64,2/2] Add rtx cost function handling of clz, clrsb, rbit 0 0 0 2014-07-22 Kyrylo Tkachov New
[AArch64,2/2] Add CRC32 ACLE intrinsics testsuite 0 0 0 2014-06-10 Kyrylo Tkachov New
[AArch64,14/14] Add cost-model for XGene-1. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,13/14] Initial tuning description for XGene-1 core. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,12/14] Generate 'bics', when only interested in CC_NZ. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,11/14] Optimize and(s) patterns for HI/QI operands. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,10/14] Add mov<mode>cc definition for GPF case. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,1/6] aarch64: Add addti3 and subti3 patterns 0 0 0 2014-01-08 Richard Henderson New
[AArch64,1/6] Implement support for Crypto -- Define TARGET_CRYPTO. 0 0 0 2013-12-06 Tejas Belagod New
[AArch64,1/5] Improve MOVI handling (Change interface of aarch64_simd_valid_immediate) 0 0 0 2013-06-03 Ian Bolton New
[AArch64,1/5] Implement TARGET_SCHED_MACRO_FUSION_PAIR_P 0 0 0 2014-11-18 Kyrylo Tkachov New
[AArch64,1/4,Fix,vtbx1] Allow signed and unsigned versions of intrinsics to coexist. 0 0 0 2013-11-22 James Greenhalgh New
[AArch64,1/3] Don't disparage add/sub in SIMD registers 0 0 0 2014-08-12 Alan Lawrence New
[AArch64,1/3,big.LITTLE] Driver rewriting of big.LITTLE names. 0 0 0 2013-12-18 James Greenhalgh New
[AArch64,1/2] Remove UNSPEC_CLS and use clrsb RTL code in its' place 0 0 0 2014-07-22 Kyrylo Tkachov New
[AArch64,1/2] PR/60825 Make float64x1_t in arm_neon.h a proper vector type 0 0 0 2014-06-19 Alan Lawrence New
[AArch64,1/2] Improve codegen of vector compares inc. tst instruction 0 0 0 2014-08-19 Alan Lawrence New
[AArch64,1/2] Implement CRC32 ACLE intrinsics 0 0 0 2014-06-10 Kyrylo Tkachov New
[AArch64,1/2] Correct signedness of builtins, remove casts from arm_neon.h 0 0 0 2014-05-29 Alan Lawrence New
[AArch64,1/2] Add execution tests of vget_low and vget_high 0 0 0 2014-08-12 Alan Lawrence New
[AArch64,09/14] Add special cases of zero-extend w/ compare operations. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,08/14] Define a variant of cmp for the CC_NZ case. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,07/14] Define additional patterns for adds/subs. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,06/14] Extend '*tb<optab><mode>1'. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,05/14] Add AArch64 'prefetch'-pattern. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,05/14] Add AArch64 'prefetch'-pattern. 0 0 0 2014-02-28 Gopalasubramanian, Ganesh New
[AArch64,04/14] Correct the maximum shift amount for shifted operands. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,03/14] Retrieve BRANCH_COST from tuning structure. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,02/14] Add "xgene1" core identifier. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,01/14] Use "generic" target, if no other default. 0 0 0 2014-02-18 Philipp Tomsich New
[AArch64,/,testsuite] Add V1DFmode, fixes PR/59843 0 0 0 2014-05-15 Alan Lawrence New
[AArch64,-mtune,cleanup,5/5] Update invoke.texi 0 0 0 2013-11-13 James Greenhalgh New
[AArch64,-mtune,cleanup,4/5] Remove "example-1", "example-2" tuning options. 0 0 0 2013-11-13 James Greenhalgh New
[AArch64,-mtune,cleanup,3/5,Temporary] When asked to tune for Cortex-A57, tune for Cortex-A15 0 0 0 2013-11-13 James Greenhalgh New
[AArch64,-mtune,cleanup,2/5] Tune for Cortex-A53 by default. 0 0 0 2013-11-13 James Greenhalgh New
[AArch64,-mtune,cleanup,1/5] Remove -march=generic. 0 0 0 2013-11-13 James Greenhalgh New
[AARch64,COMMITTED] Move saved_varargs_size. 0 0 0 2014-06-05 Marcus Shawcroft New
[AARCH64] mov<mode>cc for fcsel 0 0 0 2014-03-18 Zhenqiang Chen New
[AARCH64] load store pair optimization using sched_fusion pass. 0 0 0 2014-11-18 Bin Cheng New
[AARCH64] load store pair optimization using sched_fusion pass. 0 0 0 2014-12-07 Andrew Pinski New
[AARCH64] fix and enable non-const shuffle for bigendian using TBL instruction 0 0 0 2014-04-23 Alan Lawrence New
[AARCH64] fix and enable non-const shuffle for bigendian using TBL instruction 0 0 0 2014-06-25 Alan Lawrence New
[AARCH64] combine "ubfiz" and "orr" with bfi when certain condition meets. 0 0 0 2014-02-25 Renlin Li New
[AARCH64] combine "ubfiz" and "orr" with bfi when certain condition meets. 0 0 0 2014-03-16 Renlin Li New
[AARCH64] Vdiv NEON intrinsic 0 0 0 2013-10-08 Alex Velenko New
[AARCH64] Use selected cpu's tuning when no tuning parameter is specified. 0 0 0 2014-11-27 Renlin Li New
[AARCH64] Use AARCH64_FL_FPSIMD flags for all cores in aarch64-cores.def 0 0 0 2014-12-10 Renlin Li New
[AARCH64] Update maintainers file 0 0 0 2012-10-23 Richard Earnshaw New
[AARCH64] Update maintainers file 0 0 0 2012-11-20 Richard Earnshaw New
[AARCH64] Support tail indirect function call 0 0 0 2014-03-18 Jiong Wang New
[AARCH64] Support tail indirect function call 0 0 0 2014-05-22 Jiong Wang New
[AARCH64] Support full addressing modes for ldr/str in vectorization scenarios 0 0 0 2014-05-28 Bin.Cheng New
[AARCH64] Resolves testsuite/gcc.target/aarch64/aapcs64/ret-func-1.c regression 0 0 0 2014-02-02 Renlin Li New
[AARCH64] Resolves testsuite/gcc.target/aarch64/aapcs64/ret-func-1.c regression 0 0 0 2014-02-03 Renlin Li New
[AARCH64] Replace gen_rtx_PLUS with plus_constant 0 0 0 2013-09-20 Renlin Li New
[AARCH64] Replace gen_rtx_PLUS with plus_constant 0 0 0 2013-09-30 Renlin Li New
[AARCH64] Remove unused variable and marco 0 0 0 2014-10-13 Renlin Li New
[AARCH64] Remove t-aarch64 from libgcc 0 0 0 2012-05-29 Jim MacArthur New
[AARCH64] Remove hardwired multiarch. 0 0 0 2012-09-18 Marcus Shawcroft New
[AARCH64] Remove REGISTER_PREFIX 0 0 0 2013-01-08 Hurugalawadi, Naveen New
[AARCH64] Remove %r from asm_printf 0 0 0 2013-01-08 Hurugalawadi, Naveen New
[AARCH64] PR60034 0 0 0 2014-02-21 Kugan New
[AARCH64] PR60034 0 0 0 2014-03-03 Kugan New
[AARCH64] PR60034 0 0 0 2014-03-25 Kugan New
[AARCH64] PR59695 0 0 0 2014-01-11 Kugan New
[AARCH64] Optimize cmp in some cases 0 0 0 2013-01-03 Andrew Pinski New
[AARCH64] One-line tidy of bit-twiddle expression in aarch64.c 0 0 0 2014-04-23 Alan Lawrence New
[AARCH64] Make ldp/stp case less vulnerable 0 0 0 2014-12-11 Bin Cheng New
[AARCH64] MULTIARCH_DIRNAME breaks multiarch build 0 0 0 2014-01-10 Zhenqiang Chen New
[AARCH64] MULTIARCH_DIRNAME breaks multiarch build 0 0 0 2014-01-10 Matthias Klose New
[AARCH64] Implement vector alignment target hooks. 0 0 0 2012-11-28 Tejas Belagod New
[AARCH64] Fix warning: "TARGET_FIXED_CONDITION_CODE_REGS" redefined 0 0 0 2013-01-25 Hurugalawadi, Naveen New
[AARCH64] Fix warning in aarch64.md 0 0 0 2012-12-18 James Greenhalgh New
[AARCH64] Fix unrecognizable insn issue 0 0 0 2013-04-10 Zhenqiang Chen New
[AARCH64] Fix unrecognizable insn issue 0 0 0 2013-04-10 James Greenhalgh New
[AARCH64] Fix unrecognizable insn issue 0 0 0 2013-04-11 James Greenhalgh New
[AARCH64] Fix the name mangling of va_list 0 0 0 2012-11-21 Yufeng Zhang New
[AARCH64] Fix the name mangling of va_list 0 0 0 2012-11-29 Yufeng Zhang New
[AARCH64] Fix the name mangling of AdvSIMD vector types 0 0 0 2012-11-22 Yufeng Zhang New
[AARCH64] Fix support for vectorization over sqrt (), sqrtf (). 0 0 0 2013-01-08 James Greenhalgh New
[AARCH64] Fix legitimate address checking for TImode and TFmode 0 0 0 2012-06-11 Marcus Shawcroft New
[AARCH64] Fix PR63424 by adding <su><maxmin>v2di3 pattern 0 0 0 2014-10-31 Renlin Li New
[AARCH64] Fix ICE in aarch64_split_doubleword_move 0 0 0 2012-10-16 Marcus Shawcroft New
[AARCH64] Fix ICE in aarch64_float_const_representable_p 0 0 0 2014-05-30 Tom de Vries New
[AARCH64] Fix ICE in CCMP (PR64015) 0 0 0 2014-11-24 Zhenqiang Chen New
[AARCH64] Fix AArch64 CLZ_DEFINED_AT_ZERO and CTZ_DEFINED_AT_ZERO definition. 0 0 0 2014-12-10 Renlin Li New
[AARCH64] Enable fuse-caller-save for AARCH64 0 0 0 2014-06-01 Tom de Vries New
[AARCH64] Enable fuse-caller-save for AARCH64 0 0 0 2014-06-19 Tom de Vries New
[AARCH64] Enable fuse-caller-save for AARCH64 0 0 0 2014-06-19 Tom de Vries New
[AARCH64] Enable fuse-caller-save for AARCH64 0 0 0 2014-06-19 Tom de Vries New
[AARCH64] Enable fuse-caller-save for AARCH64 0 0 0 2014-06-20 Tom de Vries New
[AARCH64] Define REVERSIBLE_CC_MODE 0 0 0 2013-01-08 Hurugalawadi, Naveen New
[AARCH64] Define REVERSIBLE_CC_MODE 0 0 0 2013-01-09 Hurugalawadi, Naveen New
[AARCH64] Clarify the usage of SCHED in AARCH64_CORE macro 0 0 0 2014-12-03 Renlin Li New
[AARCH64] Amend AArch64 frame layout comment. 0 0 0 2014-03-16 Renlin Li New
[AARCH64] Adjust address with offset assembler format 0 0 0 2014-02-12 Renlin Li New
[AARCH64] Added predefines for AArch64 code models 0 0 0 2012-09-11 Chris Schlumberger-Socha New