Patchwork GNU Compiler Collection

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Patch A/R/T Date Submitter Delegate State
[AArch64] Use CSINC instead of CSEL to return 1 0 0 0 2012-11-06 Ian Bolton New
[AArch64] Use CC_Z and CC_NZ with csinc and similar instructions 0 0 0 2014-08-18 Kyrylo Tkachov New
[AArch64] Use CC_Z and CC_NZ with csinc and similar instructions 0 0 0 2014-08-19 Kyrylo Tkachov New
[AArch64] Use CC_Z and CC_NZ with csinc and similar instructions 0 0 0 2014-08-19 Kyrylo Tkachov New
[AArch64] Use CC_Z and CC_NZ with csinc and similar instructions 0 0 0 2014-09-02 Kyrylo Tkachov New
[AArch64] Use "multiple" for type, where more than one instruction is used for a move 0 0 0 2013-09-06 James Greenhalgh New
[AArch64] Update target testcases for gnu11 0 0 0 2014-10-21 Jiong Wang New
[AArch64] Update insv_1.c test for Big Endian 0 0 0 2013-06-24 Ian Bolton New
[AArch64] Update definitions of _FP_W_TYPE and _FP_WS_TYPE in libgcc to be based on 'long long' 0 0 0 2013-04-18 Yufeng Zhang New
[AArch64] Tighten predicates on SIMD shift intrinsics 0 0 0 2014-09-11 James Greenhalgh New
[AArch64] Tighten predicates on SIMD shift intrinsics 0 0 0 2014-09-25 James Greenhalgh New
[AArch64] Tighten predicate for CMP pattern. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Tighten predicate for CMP pattern. 0 0 0 2012-09-26 Marcus Shawcroft New
[AArch64] Tidy: remove unused qualifier_const_pointer 0 0 0 2014-08-20 Alan Lawrence New
[AArch64] Tidy up aarch64_simd_expand_args 0 0 0 2014-11-17 Alan Lawrence New
[AArch64] Testcases for TST instruction 0 0 0 2013-05-02 Ian Bolton New
[AArch64] Testcases for ANDS instruction 0 0 0 2013-04-26 Ian Bolton New
[AArch64] Testcases for ANDS instruction 0 0 0 2013-05-01 Ian Bolton New
[AArch64] Sync merge libffi - fix call frame information in ffi_closure_SYSV 0 0 0 2014-02-28 Yufeng Zhang New
[AArch64] Support vrecp<esx> neon intrinsics in RTL. 0 0 0 2013-04-22 James Greenhalgh New
[AArch64] Support scalar form of FABD 0 0 0 2013-05-02 Vidya Praveen New
[AArch64] Support for SMLAL/SMLSL/UMLAL/UMLSL 0 0 0 2013-06-14 Vidya Praveen New
[AArch64] Support for CLZ 0 0 0 2013-05-22 Vidya Praveen New
[AArch64] Support float->int conversions in vector registers. 0 0 0 2013-05-01 James Greenhalgh New
[AArch64] Support abs standard pattern for DI mode 0 0 0 2013-06-25 Ian Bolton New
[AArch64] Support SISD variants of SCVTF,UCVTF 0 0 0 2014-01-13 Vidya Praveen New
[AArch64] Support SISD Shifts (SHL/USHR/SSHL/USHL/SSHR) 0 0 0 2013-08-20 Vidya Praveen New
[AArch64] Support SBC in the backend 0 0 0 2013-03-14 Ian Bolton New
[AArch64] Support SADDL/SSUBL/UADDL/USUBL 0 0 0 2013-09-30 Vidya Praveen New
[AArch64] Support ROR in backend 0 0 0 2013-03-14 Ian Bolton New
[AArch64] Support NEG in vector registers for DI and SI mode 0 0 0 2013-07-23 Ian Bolton New
[AArch64] Support LDR/STR to/from S and D registers 0 0 0 2013-04-26 Ian Bolton New
[AArch64] Support EXTR in backend 0 0 0 2013-03-14 Ian Bolton New
[AArch64] Support BICS instruction in the backend 0 0 0 2013-04-26 Ian Bolton New
[AArch64] Support BICS instruction in the backend 0 0 0 2013-05-01 Ian Bolton New
[AArch64] Support BFXIL in the backend 0 0 0 2013-06-27 Ian Bolton New
[AArch64] Support BFI instruction and insv standard pattern 0 0 0 2013-05-08 Ian Bolton New
[AArch64] Support BFI instruction and insv standard pattern 0 0 0 2013-05-20 Ian Bolton New
[AArch64] Support BFI instruction and insv standard pattern 0 0 0 2013-05-30 Ian Bolton New
[AArch64] Support AdvSIMD MOVI / MVNI shifting ones variant. 0 0 0 2013-07-12 Tejas Belagod New
[AArch64] Support --mcmodel=tiny. 0 0 0 2013-05-29 Marcus Shawcroft New
[AArch64] Split a move of Q-reg vectors contained in general regs. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Specify CRC and Crypto support for Cortex-A53, A57 0 0 0 2014-01-16 Kyrylo Tkachov New
[AArch64] Some aarch64-builtins.c cleanup. 0 0 0 2014-08-04 James Greenhalgh New
[AArch64] Skip aarch64*-*-* for g++.dg/cpp0x/alias-decl-debug-0.C 0 0 0 2013-05-28 Yufeng Zhang New
[AArch64] Simplify vreinterpret for float64x1_t using casts. 0 0 0 2014-09-08 Alan Lawrence New
[AArch64] Shift right pattern fix 0 0 0 2014-01-30 Alex Velenko New
[AArch64] Set libgloss_dir for aarch64*-*-* targets 0 0 0 2013-01-10 Yufeng Zhang New
[AArch64] Rewrite vca<ge, gt, le, lt> Neon patterns in C. 0 0 0 2013-04-30 James Greenhalgh New
[AArch64] Rewrite vabs<q>_s<8,16,32,64> AdvSIMD intrinsics to fold to tree. 0 0 0 2013-07-19 James Greenhalgh New
[AArch64] Rewrite vabs<q>_s<8,16,32,64> AdvSIMD intrinsics to fold to tree. 0 0 0 2013-07-19 James Greenhalgh New
[AArch64] Rewrite v<max,min><nm><q><v>_<sfu><8, 16, 32, 64> intrinsics using builtins. 0 0 0 2013-05-01 James Greenhalgh New
[AArch64] Rewrite the vdup_lane intrinsics in C 0 0 0 2013-08-09 James Greenhalgh New
[AArch64] Restructure arm_neon.h vector types's implementation(Take 2). 0 0 0 2014-10-01 tejas belagod New
[AArch64] Restructure arm_neon.h vector types's implementation(Take 2). 0 0 0 2014-11-05 tejas belagod New
[AArch64] Restructure arm_neon.h vector types' implementation. 0 0 0 2014-06-23 Tejas Belagod New
[AArch64] Restructure arm_neon.h vector types' implementation. 0 0 0 2014-06-27 Tejas Belagod New
[AArch64] Restrict usage of SBFIZ to valid range only 0 0 0 2012-10-15 Ian Bolton New
[AArch64] Restrict usage of SBFIZ to valid range only 0 0 0 2012-10-16 Ian Bolton New
[AArch64] Restrict usage of FP/SIMD registers for TImode reload and absdi2 patterns for non-float/simd targets 0 0 0 2014-08-07 Kyrylo Tkachov New
[AArch64] Restrict the shift value in compare extended shift operation 0 0 0 2013-05-07 Hurugalawadi, Naveen New
[AArch64] Restore recog state after finding pre-madd instruction 0 0 0 2014-10-29 Kyrylo Tkachov New
[AArch64] Rename [u]int32x1_t to [u]int32_t (resp 16x1, 8x1) in arm_neon.h 0 0 0 2014-07-24 Alan Lawrence New
[AArch64] Removed unused get_lane and dup_lane builtins. 0 0 0 2014-08-01 Alan Lawrence New
[AArch64] Remove/merge redundant iterators 0 0 0 2014-11-13 Alan Lawrence New
[AArch64] Remove varargs from aarch64_simd_expand_args 0 0 0 2014-08-20 Alan Lawrence New
[AArch64] Remove v8type attribute. 0 0 0 2013-11-14 James Greenhalgh New
[AArch64] Remove unused types and variables for abi types 0 0 0 2013-07-02 Yufeng Zhang New
[AArch64] Remove unnecesssary definition of MEMORY_MOVE_COST 0 0 0 2014-03-18 Ramana Radhakrishnan New
[AArch64] Remove simd_type 0 0 0 2013-11-14 James Greenhalgh New
[AArch64] Remove from arm_neon.h functions not in the spec 0 0 0 2014-05-27 Alan Lawrence New
[AArch64] Remove from arm_neon.h functions not in the spec 0 0 0 2014-05-29 Alan Lawrence New
[AArch64] Remove excessive braces.. 0 0 0 2013-05-31 Marcus Shawcroft New
[AArch64] Remove crypto extension from default for cortex-a53, cortex-a57 0 0 0 2014-11-17 Kyrylo Tkachov New
[AArch64] Remove crypto extension from default for cortex-a53, cortex-a57 0 0 0 2014-11-18 Kyrylo Tkachov New
[AArch64] Remove crypto extension from default for cortex-a53, cortex-a57 0 0 0 2014-11-25 Gerald Pfeifer New
[AArch64] Remove crypto extension from default for cortex-a53, cortex-a57 0 0 0 2014-11-25 Kyrylo Tkachov New
[AArch64] Remove arm_neon.h's dependency on stdint's macros. 0 0 0 2013-08-30 Tejas Belagod New
[AArch64] Remove Usa constraint. 0 0 0 2013-05-23 Marcus Shawcroft New
[AArch64] Remove "mode", "mode2" attributes 0 0 0 2013-11-19 James Greenhalgh New
[AArch64] Remap neon vcmp functions to C/TREE 0 0 0 2013-04-30 James Greenhalgh New
[AArch64] Relax modes_tieable_p and cannot_change_mode_class 0 0 0 2014-02-18 James Greenhalgh New
[AArch64] Relax CANNOT_CHANGE_MODE_CLASS. 0 0 0 2013-11-28 Tejas Belagod New
[AArch64] Relax CANNOT_CHANGE_MODE_CLASS. 0 0 0 2014-01-16 Tejas Belagod New
[AArch64] Refactor vector max and min RTL and builtins. 0 0 0 2013-04-30 James Greenhalgh New
[AArch64] Refactor thunks code generation 0 0 0 2012-11-16 James Greenhalgh New
[AArch64] Refactor reduc_<su>plus patterns. 0 0 0 2013-04-30 James Greenhalgh New
[AArch64] Refactor acquire/release determination into output template 0 0 0 2014-06-04 Jones, Joel New
[AArch64] Refactor aarch64_mov_operand predicate. 0 0 0 2013-05-23 Marcus Shawcroft New
[AArch64] Refactor Advanced SIMD builtin initialisation. 0 0 0 2012-10-05 James Greenhalgh New
[AArch64] Refactor Advanced SIMD builtin initialisation. 0 0 0 2012-11-12 James Greenhalgh New
[AArch64] Re-organize aarch64_classify_symbol 0 0 0 2013-05-30 Marcus Shawcroft New
[AArch64] RFA: Use new rtl iterators in arm_cannot_copy_insn 0 0 0 2014-11-05 Richard Sandiford New
[AArch64] Properly guard CUMULATIVE_ARGS definition and remove 'enum' from machine_mode in aarch64.h 0 0 0 2014-10-31 Kyrylo Tkachov New
[AArch64] Prevent generic pipeline description from dominating other pipeline descriptions. 0 0 0 2013-09-10 James Greenhalgh New
[AArch64] Prefer dup to zip for vec_perm_const; enable dup for bigendian; add testcase. 0 0 0 2014-08-04 Alan Lawrence New
[AArch64] Peepholes to generate ldp and stp instructions 0 0 0 2013-03-26 Hurugalawadi, Naveen New
[AArch64] PR 61749: Do not ICE in lane intrinsics when passed non-constant lane number 0 0 0 2014-09-05 Kyrylo Tkachov New
[AArch64] Optimized implementation of vget_low_* in arm_neon.h. 0 0 0 2013-08-20 Tejas Belagod New
[AArch64] Optimise comparison where intermediate result not used 0 0 0 2012-11-06 Ian Bolton New