Patchwork GNU Compiler Collection

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Patch A/R/T Date Submitter Delegate State
[AArch64] Map frint intrinsics to standard pattern names directly. 0 0 0 2013-04-26 James Greenhalgh New
[AArch64] Map fcvt intrinsics to builtin name directly. 0 0 0 2013-04-26 James Greenhalgh New
[AArch64] Make zero_extends explicit for some SImode patterns 0 0 0 2013-01-15 Ian Bolton New
[AArch64] Make zero_extends explicit for common SImode patterns 0 0 0 2012-12-13 Ian Bolton New
[AArch64] Make zero_extends explicit for common SImode patterns 0 0 0 2012-12-14 Ian Bolton New
[AArch64] Make vabs<q>_f<32, 64> a tree/gimple intrinsic. 0 0 0 2013-04-25 James Greenhalgh New
[AArch64] Make sure start callee-save offset for D registers aligned 0 0 0 2014-06-05 Jiong Wang New
[AArch64] Make reduc_* operations bigendian-safe. 0 0 0 2013-11-15 Tejas Belagod New
[AArch64] Make omit-frame-pointer work correctly 0 0 0 2013-03-28 Ian Bolton New
[AArch64] Make gentune.sh also generate "generic_sched" attribute 0 0 0 2014-09-25 James Greenhalgh New
[AArch64] Make argument of ld1 intrinsics const. 0 0 0 2013-01-07 James Greenhalgh New
[AArch64] Make MOVK output operand 2 in hex 0 0 0 2013-03-20 Ian Bolton New
[AArch64] Make <su>mull<q> target tests more robust. 0 0 0 2013-01-08 Tejas Belagod New
[AArch64] Make -mcpu, -march and -mtune case-insensitive. 0 0 0 2014-01-17 Alan Lawrence New
[AArch64] Logical vector shift right conformance 0 0 0 2014-02-25 Alex Velenko New
[AArch64] LR register not used in leaf functions 0 0 0 2014-09-22 Kugan New
[AArch64] LR register not used in leaf functions 0 0 0 2014-09-30 Jiong Wang New
[AArch64] LINK_SPEC changes for Cortex-A53 erratum 835769 workaround 0 0 0 2014-10-22 Kyrylo Tkachov New
[AArch64] Improve vst4_lane intrinsics 0 0 0 2014-02-13 James Greenhalgh New
[AArch64] Improve handling of constants destined for FP_REGS 0 0 0 2013-09-04 Ian Bolton New
[AArch64] Improve description of <F>CM instructions in RTL 0 0 0 2013-04-30 James Greenhalgh New
[AArch64] Improve arm_neon.h vml<as>_lane handling. 0 0 0 2013-09-13 James Greenhalgh New
[AArch64] Improve TARGET_LEGITIMIZE_ADDRESS_P hook 0 0 0 2014-08-01 Jiong Wang New
[AArch64] Improve TARGET_LEGITIMIZE_ADDRESS_P hook 0 0 0 2014-08-01 Jiong Wang New
[AArch64] Implementent sync gen and atomic builtins. 0 0 0 2012-11-16 James Greenhalgh New
[AArch64] Implement workaround for ARM Cortex-A53 erratum 835769 0 0 0 2014-10-10 Kyrylo Tkachov New
[AArch64] Implement vsqrt_f64 intrinsic 0 0 0 2014-11-17 Kyrylo Tkachov New
[AArch64] Implement vset_lane intrinsics in C 0 0 0 2013-09-13 James Greenhalgh New
[AArch64] Implement vmul<q>_lane<q>_<fsu><16,32,64> intrinsics in C 0 0 0 2013-09-13 James Greenhalgh New
[AArch64] Implement vmovq_n_f64. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Implement vfma_f64, vmla_f64, vfms_f64, vmls_f64 intrinsics 0 0 0 2014-06-20 Kyrylo Tkachov New
[AArch64] Implement vector float->double widening and double->float narrowing. 0 0 0 2013-04-26 James Greenhalgh New
[AArch64] Implement vec_init. 0 0 0 2013-01-07 Tejas Belagod New
[AArch64] Implement vcopy intrinsics. 0 0 0 2013-09-13 James Greenhalgh New
[AArch64] Implement vbsl_f64 arm_neon.h intrinsic 0 0 0 2014-07-16 Kyrylo Tkachov New
[AArch64] Implement support for LD{1,2,3,4}/ST{1,2,3,4}. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Implement support for LD1R. 0 0 0 2013-01-09 Tejas Belagod New
[AArch64] Implement some vmul*_lane*_f* intrinsics in arm_neon.h 0 0 0 2014-08-04 Kyrylo Tkachov New
[AArch64] Implement some vca*_f[32,64] intrinsics 0 0 0 2014-06-23 Kyrylo Tkachov New
[AArch64] Implement some vca*_f[32,64] intrinsics 0 0 0 2014-07-10 Kyrylo Tkachov New
[AArch64] Implement some saturating math NEON intrinsics 0 0 0 2014-08-04 Kyrylo Tkachov New
[AArch64] Implement section anchors 0 0 0 2012-09-06 James Greenhalgh New
[AArch64] Implement movmem for the benefit of inline memcpy 0 0 0 2014-06-06 James Greenhalgh New
[AArch64] Implement movmem for the benefit of inline memcpy 0 0 0 2014-08-05 Andrew Pinski New
[AArch64] Implement framework for Tree/Gimple Implementation of NEON intrinsics. 0 0 0 2013-03-14 Tejas Belagod New
[AArch64] Implement framework for Tree/Gimple Implementation of NEON intrinsics. 0 0 0 2013-03-14 Tejas Belagod New
[AArch64] Implement fnma, fms and fnms standard patterns 0 0 0 2012-09-14 Ian Bolton New
[AArch64] Implement ffs standard pattern 0 0 0 2012-09-14 Ian Bolton New
[AArch64] Implement ctz and clrsb standard patterns 0 0 0 2012-09-18 Ian Bolton New
[AArch64] Implement ctz and clrsb standard patterns 0 0 0 2012-09-18 Ian Bolton New
[AArch64] Implement ctz and clrsb standard patterns 0 0 0 2012-09-18 Ian Bolton New
[AArch64] Implement bswaphi2 with rev16 0 0 0 2012-11-16 Ian Bolton New
[AArch64] Implement adrp+add fusion 0 0 0 2014-11-12 Kyrylo Tkachov New
[AArch64] Implement Vector Permute Support 0 0 0 2012-12-04 James Greenhalgh New
[AArch64] Implement Vector Permute Support 0 0 0 2014-01-14 Alex Velenko New
[AArch64] Implement Vector Permute Support 0 0 0 2014-01-16 Alex Velenko New
[AArch64] Implement TARGET_SHIFT_TRUNCATION_MASK. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Implement TARGET_SCHED_MACRO_FUSION_PAIR_P 0 0 0 2014-11-11 Kyrylo Tkachov New
[AArch64] Implement TARGET_SCHED_MACRO_FUSION_PAIR_P 0 0 0 2014-11-13 Kyrylo Tkachov New
[AArch64] Implement TARGET_GIMPLE_FOLD_BUILTIN for aarch64 backend. 0 0 0 2013-04-25 James Greenhalgh New
[AArch64] Implement SIMD Absolute Difference Instructions 0 0 0 2013-01-30 Hurugalawadi, Naveen New
[AArch64] Implement SIMD Absolute Difference Instructions 0 0 0 2013-02-27 Hurugalawadi, Naveen New
[AArch64] Implement SIMD Absolute Difference Instructions 0 0 0 2013-02-27 Hurugalawadi, Naveen New
[AArch64] Implement SIMD Absolute Difference Instructions 0 0 0 2013-02-27 Hurugalawadi, Naveen New
[AArch64] Implement HARD_REGNO_CALLER_SAVE_MODE 0 0 0 2014-05-12 Ian Bolton New
[AArch64] Implement Bitwise AND and Set Flags 0 0 0 2013-01-29 Hurugalawadi, Naveen New
[AArch64] Implement ADD in vector registers for 32-bit scalar values. 0 0 0 2014-03-28 James Greenhalgh New
[AArch64] Implement ADD in vector registers for 32-bit scalar values. 0 0 0 2014-05-16 James Greenhalgh New
[AArch64] Implement ADD in vector registers for 32-bit scalar values. 0 0 0 2014-06-23 James Greenhalgh New
[AArch64] Implement %c output template 0 0 0 2013-10-17 Kyrylo Tkachov New
[AArch64] Handle symbol + offset more effectively 0 0 0 2012-09-25 Ian Bolton New
[AArch64] Handle fcvta[su] and frint in RTX cost function 0 0 0 2014-07-10 Kyrylo Tkachov New
[AArch64] Get %c output template tests to pass for -fPIC 0 0 0 2013-10-21 Kyrylo Tkachov New
[AArch64] Fully support rotate on logical operations 0 0 0 2014-03-26 Richard Earnshaw New
[AArch64] Fold max and min reduction builtins to tree. 0 0 0 2013-04-30 James Greenhalgh New
[AArch64] Fixup the vget_lane RTL patterns and intrinsics 0 0 0 2013-08-05 James Greenhalgh New
[AArch64] Fix/revert fallout from machine_mode change 0 0 0 2014-10-29 Kyrylo Tkachov New
[AArch64] Fix wrong ".cfi_def_cfa_offset" in epilogue 0 0 0 2014-08-20 Jiong Wang New
[AArch64] Fix whitespace around aarch64_movdi_<mode>low 0 0 0 2013-11-19 Marcus Shawcroft New
[AArch64] Fix vmovn_high_*, vqmovn_high_* and vqmovun_high_* intrinsics. 0 0 0 2013-01-03 Tejas Belagod New
[AArch64] Fix vld1<q>_* asm constraints in arm_neon.h 0 0 0 2013-04-24 James Greenhalgh New
[AArch64] Fix vfmaq_lane_f64. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Fix vdup<bhsd>_lane<q>_* intrinsics' lane parameter. 0 0 0 2013-09-05 Tejas Belagod New
[AArch64] Fix vcond where comparison and result have different types. 0 0 0 2013-05-14 James Greenhalgh New
[AArch64] Fix up BSL expander for floating point types 0 0 0 2014-11-11 James Greenhalgh New
[AArch64] Fix unordered comparisons to floating-point vcond. 0 0 0 2013-01-18 James Greenhalgh New
[AArch64] Fix types of second parameter to qtbl/qtbx intrinsics 0 0 0 2013-09-06 James Greenhalgh New
[AArch64] Fix types for vqdmlals_lane_s32 and vqdmlsls_lane_s32 intrinsics 0 0 0 2014-08-04 Kyrylo Tkachov New
[AArch64] Fix types for vcvt<sd>_n intrinsics. 0 0 0 2013-10-17 James Greenhalgh New
[AArch64] Fix types for some multiply instructions. 0 0 0 2013-09-06 James Greenhalgh New
[AArch64] Fix type of add_losym_<mode> 0 0 0 2014-07-14 Richard Earnshaw New
[AArch64] Fix the pointer-typed function argument expansion in aarch64_simd_expand_args 0 0 0 2013-09-10 Yufeng Zhang New
[AArch64] Fix the pointer-typed function argument expansion in aarch64_simd_expand_args 0 0 0 2013-09-10 Yufeng Zhang New
[AArch64] Fix the generation of .arch and .cpu assembly directives 0 0 0 2013-04-10 Yufeng Zhang New
[AArch64] Fix the description of simd_fabd 0 0 0 2013-05-02 Vidya Praveen New
[AArch64] Fix some warnings about unused variables. 0 0 0 2012-12-18 James Greenhalgh New
[AArch64] Fix some saturating math NEON intrinsics types 0 0 0 2014-06-16 Kyrylo Tkachov New
[AArch64] Fix some saturating math NEON intrinsics types 0 0 0 2014-06-30 Kyrylo Tkachov New
[AArch64] Fix some reg-to-reg move scheduler types 0 0 0 2014-06-10 Kyrylo Tkachov New
[AArch64] Fix size of memory store for the vst<n>_lane intrinsics 0 0 0 2013-10-29 James Greenhalgh New