Show patches with: State = Action Required       |   126596 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[v2] RISC-V: bitmanip: improve constant-loading for (1ULL << 31) in DImode [v2] RISC-V: bitmanip: improve constant-loading for (1ULL << 31) in DImode - - - - --- 2022-05-29 Philipp Tomsich New
[v2] RISC-V: XFail the signbit-5 run test for RVV [v2] RISC-V: XFail the signbit-5 run test for RVV - - - - --- 2023-12-23 Li, Pan2 New
[v2] RISC-V: XFAIL pr30957-1.c when loop vectorized with variable factor [v2] RISC-V: XFAIL pr30957-1.c when loop vectorized with variable factor - - - - --- 2023-12-26 Li, Pan2 New
[v2] RISC-V: Use stdint-gcc.h in rvv testsuite [v2] RISC-V: Use stdint-gcc.h in rvv testsuite - - - - --- 2023-10-05 Patrick O'Neill New
[v2] RISC-V: Use riscv_subword_address for atomic_test_and_set [v2] RISC-V: Use riscv_subword_address for atomic_test_and_set - - - - --- 2023-11-01 Patrick O'Neill New
[v2] RISC-V: Use merge approach to optimize vector permutation [v2] RISC-V: Use merge approach to optimize vector permutation - - - - --- 2023-06-15 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Update crypto vector ISA info with latest spec [v2] RISC-V: Update crypto vector ISA info with latest spec - - - - --- 2023-12-04 Feng Wang New
[v2] RISC-V: Test memcpy inlined on riscv_v [v2] RISC-V: Test memcpy inlined on riscv_v - - - - --- 2023-10-04 Patrick O'Neill New
[v2] RISC-V: THEAD: Fix improper immediate value for MODIFY_DISP instruction on 32-bit systems. [v2] RISC-V: THEAD: Fix improper immediate value for MODIFY_DISP instruction on 32-bit systems. - - - - --- 2024-01-29 Jin Ma New
[v2] RISC-V: T-HEAD: Add support for the XTheadInt ISA extension [v2] RISC-V: T-HEAD: Add support for the XTheadInt ISA extension - - - - --- 2023-11-17 Jin Ma New
[v2] RISC-V: Suppress the vsetvl fusion for conflict successors [v2] RISC-V: Suppress the vsetvl fusion for conflict successors - - - - --- 2024-02-01 钟居哲 New
[v2] RISC-V: Supports RISC-V Profiles in '-march' option. [v2] RISC-V: Supports RISC-V Profiles in '-march' option. - - - - --- 2023-12-12 Jiawei New
[v2] RISC-V: Support {U}INT64 to FP16 auto-vectorization [v2] RISC-V: Support {U}INT64 to FP16 auto-vectorization - - - - --- 2023-09-28 Li, Pan2 New
[v2] RISC-V: Support scheduling for sifive p600 series [v2] RISC-V: Support scheduling for sifive p600 series - - - - --- 2024-02-01 Monk Chiang New
[v2] RISC-V: Support partial VLS mode when preference fixed-vlmax [PR111857] [v2] RISC-V: Support partial VLS mode when preference fixed-vlmax [PR111857] - - - - --- 2023-10-20 Li, Pan2 New
[v2] RISC-V: Support for FreeBSD [v2] RISC-V: Support for FreeBSD - - - - --- 2018-02-18 Kito Cheng New
[v2] RISC-V: Support ceil and ceilf auto-vectorization [v2] RISC-V: Support ceil and ceilf auto-vectorization - - - - --- 2023-09-21 Li, Pan2 New
[v2] RISC-V: Support RVV VREINTERPRET from vbool*_t to vint*m1_t [v2] RISC-V: Support RVV VREINTERPRET from vbool*_t to vint*m1_t - - - - --- 2023-05-18 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Support RVV VFWCVT.XU.F.V rounding mode intrinsic API [v2] RISC-V: Support RVV VFWCVT.XU.F.V rounding mode intrinsic API - - - - --- 2023-08-16 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Support RVV VFWCVT.X.F.V rounding mode intrinsic API [v2] RISC-V: Support RVV VFWCVT.X.F.V rounding mode intrinsic API - - - - --- 2023-08-16 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Support RVV VFWADD rounding mode intrinsic API [v2] RISC-V: Support RVV VFWADD rounding mode intrinsic API - - - - --- 2023-08-02 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Support RVV VFREC7 rounding mode intrinsic API [v2] RISC-V: Support RVV VFREC7 rounding mode intrinsic API - - - - --- 2023-08-14 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Support RVV VFMUL rounding mode intrinsic API [v2] RISC-V: Support RVV VFMUL rounding mode intrinsic API - - - - --- 2023-08-03 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Support RVV VFCVT.XU.F.V rounding mode intrinsic API [v2] RISC-V: Support RVV VFCVT.XU.F.V rounding mode intrinsic API - - - - --- 2023-08-16 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Support RVV VFCVT.X.F.V rounding mode intrinsic API [v2] RISC-V: Support RVV VFCVT.X.F.V rounding mode intrinsic API - - - - --- 2023-08-16 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Support RVV VFCVT.F.X.V and VFCVT.F.XU.V rounding mode intrinsic API [v2] RISC-V: Support RVV VFCVT.F.X.V and VFCVT.F.XU.V rounding mode intrinsic API - - - - --- 2023-08-16 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Support RVV FP16 ZVFH floating-point intrinsic API [v2] RISC-V: Support RVV FP16 ZVFH floating-point intrinsic API - - - - --- 2023-06-05 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Support FP nearbyint auto-vectorization [v2] RISC-V: Support FP nearbyint auto-vectorization - - - - --- 2023-09-26 Li, Pan2 New
[v2] RISC-V: Support CALL for RVV floating-point dynamic rounding [v2] RISC-V: Support CALL for RVV floating-point dynamic rounding - - - - --- 2023-07-19 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Suport FP floor auto-vectorization [v2] RISC-V: Suport FP floor auto-vectorization - - - - --- 2023-09-23 Li, Pan2 New
[v2] RISC-V: Split unordered FP comparisons into individual RTL insns [v2] RISC-V: Split unordered FP comparisons into individual RTL insns - - - - --- 2022-07-04 Maciej W. Rozycki New
[v2] RISC-V: Split off shift patterns for autovectorization. [v2] RISC-V: Split off shift patterns for autovectorization. - - - - --- 2023-05-11 Robin Dapp New
[v2] RISC-V: Set the natural size of constant vector mask modes to one RVV data vector. [v2] RISC-V: Set the natural size of constant vector mask modes to one RVV data vector. - - - - --- 2023-06-20 Li Xu New
[v2] RISC-V: Save and restore FCSR in interrupt functions to avoid program errors. [v2] RISC-V: Save and restore FCSR in interrupt functions to avoid program errors. - - - - --- 2023-06-14 Jin Ma New
[v2] RISC-V: Remove masking third operand of rotate instructions [v2] RISC-V: Remove masking third operand of rotate instructions - - - - --- 2023-05-17 Jivan Hakobyan New
[v2] RISC-V: Refine the mask generation for vec_init case 2 [v2] RISC-V: Refine the mask generation for vec_init case 2 - - - - --- 2023-11-15 Li, Pan2 New
[v2] RISC-V: Refine the condition for add additional vars in RVV cost model [v2] RISC-V: Refine the condition for add additional vars in RVV cost model - - - - --- 2024-04-02 demin.han New
[v2] RISC-V: Refine the code gen for ceil auto vectorization. [v2] RISC-V: Refine the code gen for ceil auto vectorization. - - - - --- 2023-09-22 Li, Pan2 New
[v2] RISC-V: Refine bswap16 auto vectorization code gen [v2] RISC-V: Refine bswap16 auto vectorization code gen - - - - --- 2023-10-09 Li, Pan2 New
[v2] RISC-V: Refactor riscv mode after for VXRM and FRM [v2] RISC-V: Refactor riscv mode after for VXRM and FRM - - - - --- 2023-07-12 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Refactor requirement of ZVFH and ZVFHMIN. [v2] RISC-V: Refactor requirement of ZVFH and ZVFHMIN. - - - - --- 2023-06-06 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator [v2] RISC-V: Refactor prefix [I/L/LL] rounding API autovec iterator - - - - --- 2023-11-03 Li, Pan2 New
[v2] RISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic [v2] RISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic - - - - --- 2023-08-08 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Refactor RVV class by frm_op_type template arg [v2] RISC-V: Refactor RVV class by frm_op_type template arg - - - - --- 2023-08-22 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Raise error on unexpected ISA string at end. [v2] RISC-V: Raise error on unexpected ISA string at end. - - - - --- 2019-07-31 Maxim Blinov New
[v2] RISC-V: RVV: add toggle to control vsetvl pass behavior [v2] RISC-V: RVV: add toggle to control vsetvl pass behavior - - - - --- 2024-01-16 Vineet Gupta New
[v2] RISC-V: Promote type correctly for libcalls [v2] RISC-V: Promote type correctly for libcalls - - - - --- 2019-08-02 Kito Cheng New
[v2] RISC-V: Produce better code with complex constants [PR95632] [PR106602] [v2] RISC-V: Produce better code with complex constants [PR95632] [PR106602] - - - - --- 2022-12-09 Raphael Moreira Zinsly New
[v2] RISC-V: Optimize vsetvl AVL for VLS VLMAX auto-vectorization [v2] RISC-V: Optimize vsetvl AVL for VLS VLMAX auto-vectorization - - - - --- 2023-05-15 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Optimize the MASK opt generation [v2] RISC-V: Optimize the MASK opt generation - - - - --- 2023-08-31 Feng Wang New
[v2] RISC-V: No extensions for SImode min/max against safe constant [v2] RISC-V: No extensions for SImode min/max against safe constant - - - - --- 2022-11-09 Philipp Tomsich New
[v2] RISC-V: Make xtheadcondmov-indirect tests robust against instruction reordering [v2] RISC-V: Make xtheadcondmov-indirect tests robust against instruction reordering - 1 - - --- 2023-10-12 Christoph Müllner New
[v2] RISC-V: Make sure stack is always aligned during adjusting [v2] RISC-V: Make sure stack is always aligned during adjusting - - - - --- 2018-04-20 Kito Cheng New
[v2] RISC-V: Make PR 102957 tests more comprehensive [v2] RISC-V: Make PR 102957 tests more comprehensive - - - - --- 2023-08-29 Tsukasa OI New
[v2] RISC-V: Libitm add RISC-V support. [v2] RISC-V: Libitm add RISC-V support. 1 - 1 - --- 2022-10-27 Xiongchuan Tan New
[v2] RISC-V: Legitimise the const0_rtx for RVV indexed load/store [v2] RISC-V: Legitimise the const0_rtx for RVV indexed load/store - - - - --- 2023-05-04 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Introduce option -mrvv-max-lmul for RVV autovec [v2] RISC-V: Introduce option -mrvv-max-lmul for RVV autovec - - - - --- 2024-03-18 demin.han New
[v2] RISC-V: Introduce gcc option mrvv-vector-bits for RVV [v2] RISC-V: Introduce gcc option mrvv-vector-bits for RVV - - - - --- 2024-02-28 Li, Pan2 New
[v2] RISC-V: Introduce gcc attribute riscv_rvv_vector_bits for RVV [v2] RISC-V: Introduce gcc attribute riscv_rvv_vector_bits for RVV - - - - --- 2024-03-06 Li, Pan2 New
[v2] RISC-V: Implement vec_set and vec_extract. [v2] RISC-V: Implement vec_set and vec_extract. - - - - --- 2023-06-16 Robin Dapp New
[v2] RISC-V: Implement target attribute [v2] RISC-V: Implement target attribute - - 1 - --- 2023-11-14 Kito Cheng New
[v2] RISC-V: Implement autovec copysign. [v2] RISC-V: Implement autovec copysign. - - - - --- 2023-06-21 Robin Dapp New
[v2] RISC-V: Implement autovec abs, vneg, vnot. [v2] RISC-V: Implement autovec abs, vneg, vnot. - - - - --- 2023-05-25 Robin Dapp New
[v2] RISC-V: Implement __clear_cache via __builtin___clear_cache [v2] RISC-V: Implement __clear_cache via __builtin___clear_cache - - - - --- 2022-10-14 Palmer Dabbelt New
[v2] RISC-V: Implement TLS Descriptors. [v2] RISC-V: Implement TLS Descriptors. - - - - --- 2023-09-08 Tatsuyuki Ishi New
[v2] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic [v2] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic - - - - --- 2023-09-12 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Implement C[LT]Z_DEFINED_VALUE_AT_ZERO [v2] RISC-V: Implement C[LT]Z_DEFINED_VALUE_AT_ZERO 1 - 1 - --- 2022-05-12 Philipp Tomsich New
[v2] RISC-V: ICE for vlmul_ext_v intrinsic API [v2] RISC-V: ICE for vlmul_ext_v intrinsic API - - - - --- 2023-04-26 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Handle multi-lib path correclty for linux [v2] RISC-V: Handle multi-lib path correclty for linux - - - - --- 2023-05-04 Kito Cheng New
[v2] RISC-V: Handle multi-letter extension for multilib-generator [v2] RISC-V: Handle multi-letter extension for multilib-generator - - - - --- 2020-07-01 Kito Cheng New
[v2] RISC-V: Fixbug for that XTheadMemPair causes interrupt to fail. [v2] RISC-V: Fixbug for that XTheadMemPair causes interrupt to fail. - - - - --- 2023-11-10 Jin Ma New
[v2] RISC-V: Fixbug for fsflags instruction error using immediate. [v2] RISC-V: Fixbug for fsflags instruction error using immediate. - - - - --- 2023-07-25 Jin Ma New
[v2] RISC-V: Fix vector tuple intrinsic [v2] RISC-V: Fix vector tuple intrinsic - - - - --- 2023-07-26 Li Xu New
[v2] RISC-V: Fix the riscv_legitimize_poly_move issue on targets where the minimal VLEN exceeds 512. [v2] RISC-V: Fix the riscv_legitimize_poly_move issue on targets where the minimal VLEN exceeds 512. - - - - --- 2023-10-12 Kito Cheng New
[v2] RISC-V: Fix sync.md and riscv.cc whitespace errors [v2] RISC-V: Fix sync.md and riscv.cc whitespace errors - - - - --- 2023-04-26 Patrick O'Neill New
[v2] RISC-V: Fix regression of -fzero-call-used-regs=all [v2] RISC-V: Fix regression of -fzero-call-used-regs=all - - - - --- 2023-04-07 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Fix one typo in autovec.md pattern comment [v2] RISC-V: Fix one typo in autovec.md pattern comment - - - - --- 2023-08-24 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Fix one bug for floating-point static frm [v2] RISC-V: Fix one bug for floating-point static frm - - - - --- 2023-07-04 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Fix fortran ICE/PR111546 when RV32 vec_init [v2] RISC-V: Fix fortran ICE/PR111546 when RV32 vec_init - - - - --- 2023-09-24 Li, Pan2 New
[v2] RISC-V: Fix dynamic lmul tests depended on abi [v2] RISC-V: Fix dynamic lmul tests depended on abi - - - - --- 2023-12-13 demin.han New
[v2] RISC-V: Fix Zicond ICE on large constants [v2] RISC-V: Fix Zicond ICE on large constants - - - - --- 2023-09-05 Tsukasa OI New
[v2] RISC-V: Fix VWEXTF iterator requirement [v2] RISC-V: Fix VWEXTF iterator requirement - - - - --- 2023-06-19 Li Xu New
[v2] RISC-V: Fix RVV frm run test failure on RV32 [v2] RISC-V: Fix RVV frm run test failure on RV32 - - - - --- 2023-07-18 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Fix ICE of RVV vget/vset intrinsic[PR111935] [v2] RISC-V: Fix ICE of RVV vget/vset intrinsic[PR111935] - - - - --- 2023-10-24 Li Xu New
[v2] RISC-V: Fix ICE in riscv vector costs [v2] RISC-V: Fix ICE in riscv vector costs - - - - --- 2024-03-07 demin.han New
[v2] RISC-V: Fix CTZ unnecessary sign extension [PR #106888] [v2] RISC-V: Fix CTZ unnecessary sign extension [PR #106888] - - - - --- 2023-05-08 Raphael Moreira Zinsly New
[v2] RISC-V: FAIL:g++.dg/torture/vshuf-v[2|4]di.C -Os (execution test) on RV32 [v2] RISC-V: FAIL:g++.dg/torture/vshuf-v[2|4]di.C -Os (execution test) on RV32 - - - - --- 2023-12-05 Li Xu New
[v2] RISC-V: Enable ztso tests on rv32 [v2] RISC-V: Enable ztso tests on rv32 - - - - --- 2023-10-31 Patrick O'Neill New
[v2] RISC-V: Enable overlap-by-pieces in case of fast unaliged access [v2] RISC-V: Enable overlap-by-pieces in case of fast unaliged access - - - - --- 2021-07-22 Christoph Müllner New
[v2] RISC-V: Enable Hoist to GCSE simple constants [v2] RISC-V: Enable Hoist to GCSE simple constants - - - - --- 2023-08-25 Vineet Gupta New
[v2] RISC-V: Elimilate warning in class vcreate [v2] RISC-V: Elimilate warning in class vcreate - - - - --- 2023-09-12 Li Xu New
[v2] RISC-V: Documnet the list of supported extensions [v2] RISC-V: Documnet the list of supported extensions - - - - --- 2024-01-19 Kito Cheng New
[v2] RISC-V: Document optimization parameter riscv-strcmp-inline-limit [v2] RISC-V: Document optimization parameter riscv-strcmp-inline-limit - - - - --- 2023-12-04 Christoph Müllner New
[v2] RISC-V: Clarify vlmax and length handling. [v2] RISC-V: Clarify vlmax and length handling. - - - - --- 2023-05-11 Robin Dapp New
[v2] RISC-V: Bugfix for vls mode aggregated in GPR calling convention [v2] RISC-V: Bugfix for vls mode aggregated in GPR calling convention - - - - --- 2024-01-30 Li, Pan2 New
[v2] RISC-V: Bugfix for vec_init repeating auto vectorization in RV32 [v2] RISC-V: Bugfix for vec_init repeating auto vectorization in RV32 - - - - --- 2023-06-14 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Bugfix for the const vector in single steps [v2] RISC-V: Bugfix for the const vector in single steps - - - - --- 2023-12-20 Li, Pan2 New
[v2] RISC-V: Bugfix for the RVV const vector [v2] RISC-V: Bugfix for the RVV const vector - - - - --- 2023-12-18 Li, Pan2 New
[v2] RISC-V: Bugfix for rvv bool mode precision adjustment [v2] RISC-V: Bugfix for rvv bool mode precision adjustment - - - - --- 2023-03-02 Li, Pan2 via Gcc-patches New
[v2] RISC-V: Bugfix for resolve_overloaded_builtin[PR113420] [v2] RISC-V: Bugfix for resolve_overloaded_builtin[PR113420] - - - - --- 2024-01-22 Li Xu New
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