Patchwork GNU Compiler Collection

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Patch A/R/T Date Submitter Delegate State
[ARM,1/4] New RTL patterns for LDRD/STRD in Thumb mode 0 0 0 2012-10-19 Greta Yorsh New
[ARM,1/4] New RTL patterns for LDRD/STRD in Thumb mode 0 0 0 2012-10-19 Greta Yorsh New
[ARM,1/3] Refactor NEON builtin code 0 0 0 2010-10-11 Jie Zhang New
[ARM,1/3] Prologue using STRD in ARM mode 0 0 0 2012-10-10 Greta Yorsh New
[ARM,1/3] PR53189: optimizations of 64bit logic operation with constant 0 0 0 2012-07-03 Carrot Wei New
[ARM,1/3] PR53189: optimizations of 64bit logic operation with constant 0 0 0 2012-07-18 Carrot Wei New
[ARM,1/3] Neon intrinsics TLC : Replace intrinsics with GNU C implementations where possible. 0 0 0 2014-04-28 Ramana Radhakrishnan New
[ARM,1/3] Implement crypto intrinsics in AArch32 ARMv8-A - add functionality 0 0 0 2013-12-04 Kyrylo Tkachov New
[ARM,1/3] Add vectorization support for rounding functions 0 0 0 2012-12-18 Kyrylo Tkachov New
[ARM,1/3] Add rev field to rtx cost tables 0 0 0 2014-03-19 Kyrylo Tkachov New
[ARM,1/3] AArch32 NEON vrint builtins and intrinsics 0 0 0 2012-11-29 Kyrylo Tkachov New
[ARM,1/2] add ldm_stm_operation_p 0 0 0 2012-04-24 Greta Yorsh New
[ARM,1/2] Make ARM_LEGITIMIZE_RELOAD_ADDRESS be a function 0 0 0 2010-12-22 Jie Zhang New
[ARM,1/2] Make ARM_LEGITIMIZE_RELOAD_ADDRESS be a function 0 0 0 2011-01-28 Jie Zhang New
[ARM,1/2] Make ARM_LEGITIMIZE_RELOAD_ADDRESS be a function 0 0 0 2011-01-30 Jie Zhang New
[ARM,1/2] Load-acquire, store-release atomics in AArch32 ARMv8 0 0 0 2013-01-30 Kyrylo Tkachov New
[ARM,1/2] Implement lceil, lfloor, lround optabs with new ARMv8-A instructions 0 0 0 2014-09-02 Kyrylo Tkachov New
[ARM,1/2] Add support for vcvt_f16_f32 and vcvt_f32_f16 NEON intrinsics 0 0 0 2013-04-12 Julian Brown New
[ARM,1/2] Add support for vcvt_f16_f32 and vcvt_f32_f16 NEON intrinsics 0 0 0 2013-04-13 Julian Brown New
[ARM,1/2] Add prefer_ldrd_strd field to tune 0 0 0 2012-07-20 Greta Yorsh New
[ARM,1/2] ARMv8 aarch32 round to integral instructions 0 0 0 2012-11-14 Kyrylo Tkachov New
[ARM,1/10] Add new types to describe Neon insns. 0 0 0 2013-10-15 James Greenhalgh New
[APPROVED] c-pragma: adding a data field to pragma_handler 0 0 0 2011-06-17 Pierre Vittet New
[APPROVED] c-pragma: adding a data field to pragma_handler 0 0 0 2011-06-20 Basile Starynkevitch New
[AIX] Add missing macros PR39950 0 0 0 2011-10-06 David Edelsohn New
[AArch64_be] Fix vec_select hi/lo mask confusions. 0 0 0 2014-07-30 James Greenhalgh New
[AArch64_be] Fix some vec_concat big-endian confusions 0 0 0 2014-06-24 James Greenhalgh New
[AArch64_be] Don't fold reduction intrinsics. 0 0 0 2014-07-30 James Greenhalgh New
[AArch64_BE,4/4] Big-Endian lane numbering fix 0 0 0 2014-01-16 Alex Velenko New
[AArch64_BE,3/4] Big-Endian lane numbering fix 0 0 0 2014-01-16 Alex Velenko New
[AArch64_BE,2/4] Big-Endian lane numbering fix 0 0 0 2014-01-16 Alex Velenko New
[AArch64_BE,1/4] Big-Endian lane numbering fix 0 0 0 2014-01-16 Alex Velenko New
[AArch64] vrnd<*>_f64 patch for stage-1 0 0 0 2014-02-13 Alex Velenko New
[AArch64] vrnd<*>_f64 patch for stage-1 0 0 0 2014-02-21 Alex Velenko New
[AArch64] vqneg and vqabs intrinsics implementation 0 0 0 2014-02-12 Alex Velenko New
[AArch64] vneg testcase made big-endian safe 0 0 0 2013-11-19 Alex Velenko New
[AArch64] vneg floating point testcase BE fixed 0 0 0 2014-01-16 Alex Velenko New
[AArch64] vmov_n changes 0 0 0 2013-11-21 Alex Velenko New
[AArch64] support long double exceptions and rounding mode 0 0 0 2012-09-06 Marcus Shawcroft New
[AArch64] support extension option 'crc' in -march and -mcpu 0 0 0 2013-09-04 Yufeng Zhang New
[AArch64] obvious - Fix parameter to vrsqrte_f64 0 0 0 2013-09-09 James Greenhalgh New
[AArch64] fix missing Dwarf call frame information in the epilogue 0 0 0 2012-09-12 Yufeng Zhang New
[AArch64] fix missing Dwarf call frame information in the epilogue 0 0 0 2012-11-06 Yufeng Zhang New
[AArch64] fix big.LITTLE spec rewriting 0 0 0 2014-01-21 James Greenhalgh New
[AArch64] fcvt instructions - arm_neon.h changes. 0 0 0 2013-04-26 James Greenhalgh New
[AArch64] cache CTR_EL0 in sync_cache_range() 0 0 0 2012-09-03 Marcus Shawcroft New
[AArch64] big.LITTLE option rewriting bug 0 0 0 2014-01-07 James Greenhalgh New
[AArch64] arm_neon.h - add vpaddd_f64, vpaddd_s64, vpaddd_u64 intrinsics 0 0 0 2014-07-31 James Greenhalgh New
[AArch64] allow 16 bytes constants in constant pool. 0 0 0 2012-09-06 Marcus Shawcroft New
[AArch64] Wire up vqdmullh_laneq_s16 and vqdmullh_laneq_s32 0 0 0 2014-09-24 James Greenhalgh New
[AArch64] Wire up TARGET_SIMD and TARGET_FLOAT properly 0 0 0 2014-04-07 Kyrylo Tkachov New
[AArch64] Wire up Cortex-A57 rtx costs 0 0 0 2014-01-30 Kyrylo Tkachov New
[AArch64] Whitespace fix. 0 0 0 2013-11-19 Marcus Shawcroft New
[AArch64] Vreinterpret re-implemention for stage-1 0 0 0 2014-02-13 Alex Velenko New
[AArch64] Vneg NEON intrinsics modified 0 0 0 2013-10-08 Alex Velenko New
[AArch64] Vectorize over more math.h functions. 0 0 0 2013-04-26 James Greenhalgh New
[AArch64] Vectorise bswap[16,32,64] 0 0 0 2014-04-15 Kyrylo Tkachov New
[AArch64] Vectorise bswap[16,32,64] 0 0 0 2014-04-16 Kyrylo Tkachov New
[AArch64] Vector shift by 64 fix 0 0 0 2014-01-06 Alex Velenko New
[AArch64] Vector cost model. 0 0 0 2013-06-25 Tejas Belagod New
[AArch64] VDUP Testcases 0 0 0 2014-03-14 Alex Velenko New
[AArch64] Use neon_<ldm,stm>_2 where appropriate as "type". 0 0 0 2013-09-06 James Greenhalgh New
[AArch64] Use llfloor and llceil for vcvtmd_s64_f64 and vcvtpd_s64_f64 in arm_neon.h 0 0 0 2014-01-06 Yufeng Zhang New
[AArch64] Use common rtx cost table structures with arm 0 0 0 2013-11-13 Kyrylo Tkachov New
[AArch64] Use __aarch64_vget_lane* macros for getting the lane in some lane multiply intrinsics 0 0 0 2014-09-08 Kyrylo Tkachov New
[AArch64] Use REG_P and CONST_INT_P instead of GET_CODE + comparison 0 0 0 2014-08-05 Kyrylo Tkachov New
[AArch64] Use MOVN to generate 64-bit negative immediates where sensible 0 0 0 2014-05-08 Ian Bolton New
[AArch64] Use MOVN to generate 64-bit negative immediates where sensible 0 0 0 2014-08-07 Kyrylo Tkachov New
[AArch64] Use MOVN to generate 64-bit negative immediates where sensible 0 0 0 2014-08-07 Kyrylo Tkachov New
[AArch64] Use MOVN to generate 64-bit negative immediates where sensible 0 0 0 2014-08-13 Kyrylo Tkachov New
[AArch64] Use GCC builtins to count leading/tailing zeros 0 0 0 2014-01-07 Yufeng Zhang New
[AArch64] Use Enums for code models option selection 0 0 0 2012-06-28 Tejas Belagod New
[AArch64] Use Cortex-A57 rtx costs for the generic CPU 0 0 0 2014-02-26 Kyrylo Tkachov New
[AArch64] Use Cortex A53 rtx costs table in aarch64 0 0 0 2013-11-25 Kyrylo Tkachov New
[AArch64] Use CSINC instead of CSEL to return 1 0 0 0 2012-11-06 Ian Bolton New
[AArch64] Use CC_Z and CC_NZ with csinc and similar instructions 0 0 0 2014-08-18 Kyrylo Tkachov New
[AArch64] Use CC_Z and CC_NZ with csinc and similar instructions 0 0 0 2014-08-19 Kyrylo Tkachov New
[AArch64] Use CC_Z and CC_NZ with csinc and similar instructions 0 0 0 2014-08-19 Kyrylo Tkachov New
[AArch64] Use CC_Z and CC_NZ with csinc and similar instructions 0 0 0 2014-09-02 Kyrylo Tkachov New
[AArch64] Use "multiple" for type, where more than one instruction is used for a move 0 0 0 2013-09-06 James Greenhalgh New
[AArch64] Update target testcases for gnu11 0 0 0 2014-10-21 Jiong Wang New
[AArch64] Update insv_1.c test for Big Endian 0 0 0 2013-06-24 Ian Bolton New
[AArch64] Update definitions of _FP_W_TYPE and _FP_WS_TYPE in libgcc to be based on 'long long' 0 0 0 2013-04-18 Yufeng Zhang New
[AArch64] Tighten predicates on SIMD shift intrinsics 0 0 0 2014-09-11 James Greenhalgh New
[AArch64] Tighten predicates on SIMD shift intrinsics 0 0 0 2014-09-25 James Greenhalgh New
[AArch64] Tighten predicate for CMP pattern. 0 0 0 2012-09-10 Tejas Belagod New
[AArch64] Tighten predicate for CMP pattern. 0 0 0 2012-09-26 Marcus Shawcroft New
[AArch64] Tidy: remove unused qualifier_const_pointer 0 0 0 2014-08-20 Alan Lawrence New
[AArch64] Testcases for TST instruction 0 0 0 2013-05-02 Ian Bolton New
[AArch64] Testcases for ANDS instruction 0 0 0 2013-04-26 Ian Bolton New
[AArch64] Testcases for ANDS instruction 0 0 0 2013-05-01 Ian Bolton New
[AArch64] Sync merge libffi - fix call frame information in ffi_closure_SYSV 0 0 0 2014-02-28 Yufeng Zhang New
[AArch64] Support vrecp<esx> neon intrinsics in RTL. 0 0 0 2013-04-22 James Greenhalgh New
[AArch64] Support scalar form of FABD 0 0 0 2013-05-02 Vidya Praveen New
[AArch64] Support for SMLAL/SMLSL/UMLAL/UMLSL 0 0 0 2013-06-14 Vidya Praveen New
[AArch64] Support for CLZ 0 0 0 2013-05-22 Vidya Praveen New
[AArch64] Support float->int conversions in vector registers. 0 0 0 2013-05-01 James Greenhalgh New
[AArch64] Support abs standard pattern for DI mode 0 0 0 2013-06-25 Ian Bolton New
[AArch64] Support SISD variants of SCVTF,UCVTF 0 0 0 2014-01-13 Vidya Praveen New
[AArch64] Support SISD Shifts (SHL/USHR/SSHL/USHL/SSHR) 0 0 0 2013-08-20 Vidya Praveen New