| Message ID | cover.1683871682.git.jie.mei@oss.cipunited.com |
|---|---|
| Headers | show |
| Series | MIPS: Add MIPS16e2 ASE instrucions. | expand |
Hi Jie, Thank you for your submission. Since I was a member of the team that developed this ASE in cooperation with the hardware group, I did the binutils part, and it was even myself who came up with the name for the ASE in an internal discussion, I feel somewhat responsible for this feature and therefore I'll review this patch series. I can't formally approve it as I'm not a nominated maintainer, but once you have addressed my concerns I expect this to be a formality. It may take a couple of days though as this patchset is moderately sized and I'm time-constrained. > The MIPS16e2 ASE is an enhancement to the MIPS16e ASE, > which includes all MIPS16e instructions, with some addition. > > This series of patches adds all instructions of MIPS16E2 ASE. NB please always document changes between revisions of patchsets sent, in the comment section of each patch submitted. Also you haven't mentioned how you verified your changes. Please always state that when submitting patches, e.g. in the cover letter. Maciej
The MIPS16e2 ASE is an enhancement to the MIPS16e ASE, which includes all MIPS16e instructions, with some addition. This series of patches adds all instructions of MIPS16E2 ASE. Jie Mei (9): MIPS: Add basic support for mips16e2 MIPS: Add MOVx instructions support for mips16e2 MIPS: Add instruction about global pointer register for mips16e2 MIPS: Add bitwise instructions for mips16e2 MIPS: Add LUI instruction for mips16e2 MIPS: Add load/store word left/right instructions for mips16e2 MIPS: Use ISA_HAS_9BIT_DISPLACEMENT for mips16e2 MIPS: Add CACHE instruction for mips16e2 MIPS: Make mips16e2 generating ZEB/ZEH instead of ANDI under certain conditions gcc/config/mips/constraints.md | 4 + gcc/config/mips/mips-protos.h | 4 + gcc/config/mips/mips.cc | 164 ++++++++++-- gcc/config/mips/mips.h | 32 ++- gcc/config/mips/mips.md | 200 ++++++++++++--- gcc/config/mips/mips.opt | 4 + gcc/config/mips/predicates.md | 21 +- gcc/doc/invoke.texi | 7 + gcc/testsuite/gcc.target/mips/mips.exp | 10 + .../gcc.target/mips/mips16e2-cache.c | 34 +++ gcc/testsuite/gcc.target/mips/mips16e2-cmov.c | 68 +++++ gcc/testsuite/gcc.target/mips/mips16e2-gp.c | 101 ++++++++ gcc/testsuite/gcc.target/mips/mips16e2.c | 240 ++++++++++++++++++ 13 files changed, 825 insertions(+), 64 deletions(-) create mode 100644 gcc/testsuite/gcc.target/mips/mips16e2-cache.c create mode 100644 gcc/testsuite/gcc.target/mips/mips16e2-cmov.c create mode 100644 gcc/testsuite/gcc.target/mips/mips16e2-gp.c create mode 100644 gcc/testsuite/gcc.target/mips/mips16e2.c