diff mbox series

acpi/fadt: checks X_GPE0/1 have byte access width

Message ID 20200805014847.201081-1-alex.hung@canonical.com
State Accepted
Headers show
Series acpi/fadt: checks X_GPE0/1 have byte access width | expand

Commit Message

Alex Hung Aug. 5, 2020, 1:48 a.m. UTC
According to ACPI spec 4.8.4.1 General-Purpose Event Register Blocks:
"Each register in the block is accessed as a byte"

Reported-by: Paul Menzel <pmenzel@molgen.mpg.de>
Signed-off-by: Alex Hung <alex.hung@canonical.com>
---
 src/acpi/fadt/fadt.c | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

Comments

Colin Ian King Aug. 5, 2020, 8:26 a.m. UTC | #1
On 05/08/2020 02:48, Alex Hung wrote:
> According to ACPI spec 4.8.4.1 General-Purpose Event Register Blocks:
> "Each register in the block is accessed as a byte"
> 
> Reported-by: Paul Menzel <pmenzel@molgen.mpg.de>
> Signed-off-by: Alex Hung <alex.hung@canonical.com>
> ---
>  src/acpi/fadt/fadt.c | 27 +++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
> 
> diff --git a/src/acpi/fadt/fadt.c b/src/acpi/fadt/fadt.c
> index af93a156..9d35db03 100644
> --- a/src/acpi/fadt/fadt.c
> +++ b/src/acpi/fadt/fadt.c
> @@ -1519,6 +1519,32 @@ static void acpi_table_check_fadt_p_lvl3_lat(fwts_framework *fw, uint64_t pblk)
>  	return;
>  }
>  
> +static void acpi_table_check_fadt_x_gpex_blk(fwts_framework *fw) {
> +
> +	if (fwts_acpi_is_reduced_hardware(fadt))
> +		return;
> +
> +	if (fadt->x_gpe0_blk.access_width == 1)
> +		fwts_passed(fw, "FADT X_GPE0_BLK has correct byte access width.");
> +	else {
> +		fwts_failed(fw, LOG_LEVEL_HIGH,
> +			"X_GPE0_BLKBadAccessWidth",
> +			"FADT X_GPE0_BLK Access width 0x%2.2" PRIx8
> +			" but it should be 1 (byte access).",
> +			fadt->x_gpe0_blk.access_width);
> +	}
> +
> +	if (fadt->x_gpe1_blk.access_width == 1)
> +		fwts_passed(fw, "FADT X_GPE1_BLK has correct byte access width.");
> +	else {
> +		fwts_failed(fw, LOG_LEVEL_HIGH,
> +			"X_GPE1_BLKBadAccessWidth",
> +			"FADT X_GPE1_BLK Access width 0x%2.2" PRIx8
> +			" but it should be 1 (byte access).",
> +			fadt->x_gpe1_blk.access_width);
> +	}
> +}
> +
>  static void acpi_table_check_fadt_sleep_control_reg(fwts_framework *fw)
>  {
>  	if (fwts_acpi_is_reduced_hardware(fadt)) {
> @@ -1643,6 +1669,7 @@ static int fadt_test1(fwts_framework *fw)
>  		fwts_log_info(fw, "FADT CENTURY is %" PRIu8, fadt->century);
>  	}
>  
> +	acpi_table_check_fadt_x_gpex_blk(fw);
>  	acpi_table_check_fadt_sleep_control_reg(fw);
>  	acpi_table_check_fadt_sleep_status_reg(fw);
>  
> 

Acked-by: Colin Ian King <colin.king@canonical.com>
Ivan Hu Aug. 10, 2020, 8:04 a.m. UTC | #2
On 8/5/20 9:48 AM, Alex Hung wrote:
> According to ACPI spec 4.8.4.1 General-Purpose Event Register Blocks:
> "Each register in the block is accessed as a byte"
> 
> Reported-by: Paul Menzel <pmenzel@molgen.mpg.de>
> Signed-off-by: Alex Hung <alex.hung@canonical.com>
> ---
>  src/acpi/fadt/fadt.c | 27 +++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
> 
> diff --git a/src/acpi/fadt/fadt.c b/src/acpi/fadt/fadt.c
> index af93a156..9d35db03 100644
> --- a/src/acpi/fadt/fadt.c
> +++ b/src/acpi/fadt/fadt.c
> @@ -1519,6 +1519,32 @@ static void acpi_table_check_fadt_p_lvl3_lat(fwts_framework *fw, uint64_t pblk)
>  	return;
>  }
>  
> +static void acpi_table_check_fadt_x_gpex_blk(fwts_framework *fw) {
> +
> +	if (fwts_acpi_is_reduced_hardware(fadt))
> +		return;
> +
> +	if (fadt->x_gpe0_blk.access_width == 1)
> +		fwts_passed(fw, "FADT X_GPE0_BLK has correct byte access width.");
> +	else {
> +		fwts_failed(fw, LOG_LEVEL_HIGH,
> +			"X_GPE0_BLKBadAccessWidth",
> +			"FADT X_GPE0_BLK Access width 0x%2.2" PRIx8
> +			" but it should be 1 (byte access).",
> +			fadt->x_gpe0_blk.access_width);
> +	}
> +
> +	if (fadt->x_gpe1_blk.access_width == 1)
> +		fwts_passed(fw, "FADT X_GPE1_BLK has correct byte access width.");
> +	else {
> +		fwts_failed(fw, LOG_LEVEL_HIGH,
> +			"X_GPE1_BLKBadAccessWidth",
> +			"FADT X_GPE1_BLK Access width 0x%2.2" PRIx8
> +			" but it should be 1 (byte access).",
> +			fadt->x_gpe1_blk.access_width);
> +	}
> +}
> +
>  static void acpi_table_check_fadt_sleep_control_reg(fwts_framework *fw)
>  {
>  	if (fwts_acpi_is_reduced_hardware(fadt)) {
> @@ -1643,6 +1669,7 @@ static int fadt_test1(fwts_framework *fw)
>  		fwts_log_info(fw, "FADT CENTURY is %" PRIu8, fadt->century);
>  	}
>  
> +	acpi_table_check_fadt_x_gpex_blk(fw);
>  	acpi_table_check_fadt_sleep_control_reg(fw);
>  	acpi_table_check_fadt_sleep_status_reg(fw);
>  
> 

Acked-by: Ivan Hu <ivan.hu@canonical.com>
diff mbox series

Patch

diff --git a/src/acpi/fadt/fadt.c b/src/acpi/fadt/fadt.c
index af93a156..9d35db03 100644
--- a/src/acpi/fadt/fadt.c
+++ b/src/acpi/fadt/fadt.c
@@ -1519,6 +1519,32 @@  static void acpi_table_check_fadt_p_lvl3_lat(fwts_framework *fw, uint64_t pblk)
 	return;
 }
 
+static void acpi_table_check_fadt_x_gpex_blk(fwts_framework *fw) {
+
+	if (fwts_acpi_is_reduced_hardware(fadt))
+		return;
+
+	if (fadt->x_gpe0_blk.access_width == 1)
+		fwts_passed(fw, "FADT X_GPE0_BLK has correct byte access width.");
+	else {
+		fwts_failed(fw, LOG_LEVEL_HIGH,
+			"X_GPE0_BLKBadAccessWidth",
+			"FADT X_GPE0_BLK Access width 0x%2.2" PRIx8
+			" but it should be 1 (byte access).",
+			fadt->x_gpe0_blk.access_width);
+	}
+
+	if (fadt->x_gpe1_blk.access_width == 1)
+		fwts_passed(fw, "FADT X_GPE1_BLK has correct byte access width.");
+	else {
+		fwts_failed(fw, LOG_LEVEL_HIGH,
+			"X_GPE1_BLKBadAccessWidth",
+			"FADT X_GPE1_BLK Access width 0x%2.2" PRIx8
+			" but it should be 1 (byte access).",
+			fadt->x_gpe1_blk.access_width);
+	}
+}
+
 static void acpi_table_check_fadt_sleep_control_reg(fwts_framework *fw)
 {
 	if (fwts_acpi_is_reduced_hardware(fadt)) {
@@ -1643,6 +1669,7 @@  static int fadt_test1(fwts_framework *fw)
 		fwts_log_info(fw, "FADT CENTURY is %" PRIu8, fadt->century);
 	}
 
+	acpi_table_check_fadt_x_gpex_blk(fw);
 	acpi_table_check_fadt_sleep_control_reg(fw);
 	acpi_table_check_fadt_sleep_status_reg(fw);