From patchwork Fri Nov 22 14:57:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Colin Ian King X-Patchwork-Id: 293479 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) by ozlabs.org (Postfix) with ESMTP id DD3ED2C0126 for ; Sat, 23 Nov 2013 01:57:25 +1100 (EST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.76) (envelope-from ) id 1VjsAe-0000C8-NG; Fri, 22 Nov 2013 14:57:24 +0000 Received: from youngberry.canonical.com ([91.189.89.112]) by huckleberry.canonical.com with esmtp (Exim 4.76) (envelope-from ) id 1VjsAR-0000Am-4N for fwts-devel@lists.ubuntu.com; Fri, 22 Nov 2013 14:57:11 +0000 Received: from cpc3-craw6-2-0-cust180.croy.cable.virginm.net ([77.100.248.181] helo=localhost) by youngberry.canonical.com with esmtpsa (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1VjsAQ-0004Lf-K0 for fwts-devel@lists.ubuntu.com; Fri, 22 Nov 2013 14:57:11 +0000 From: Colin King To: fwts-devel@lists.ubuntu.com Subject: [PATCH 2/2] cpu: msr: remove the need for shift in tables, tidy up tables Date: Fri, 22 Nov 2013 14:57:09 +0000 Message-Id: <1385132229-29773-3-git-send-email-colin.king@canonical.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1385132229-29773-1-git-send-email-colin.king@canonical.com> References: <1385132229-29773-1-git-send-email-colin.king@canonical.com> X-BeenThere: fwts-devel@lists.ubuntu.com X-Mailman-Version: 2.1.14 Precedence: list List-Id: Firmware Test Suite Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: fwts-devel-bounces@lists.ubuntu.com Sender: fwts-devel-bounces@lists.ubuntu.com From: Colin Ian King The shift is never used in the tables, so remove it, it saves some space. While we are at it, re-align the formatting of some of the tables and convert all masks to 64 bit hex values to make it look pretty. Signed-off-by: Colin Ian King Acked-by: Alex Hung Acked-by: Ivan Hu --- src/cpu/msr/msr.c | 794 +++++++++++++++++++++++++++--------------------------- 1 file changed, 395 insertions(+), 399 deletions(-) diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c index 3358f12..0b9a307 100644 --- a/src/cpu/msr/msr.c +++ b/src/cpu/msr/msr.c @@ -245,437 +245,433 @@ static int msr_smrr(fwts_framework *fw) typedef struct { const char *const name; const uint32_t msr; - const int shift; const uint64_t mask; const msr_callback_check callback; } msr_info; /* From AMD Architecture Programmer's Manual, Volume 2: System Programming, Appending A */ static const msr_info AMD_MSRs[] = { - { "MTRRCAP", 0x000000fe, 0, 0xfffULL, NULL }, - { "SYSENTER_CS", 0x00000174, 0, 0xffffULL, NULL }, - { "SYSENTER_ESP", 0x00000175, 0, ~0, NULL }, - { "SYSENTER_EIP", 0x00000176, 0, ~0, NULL }, - { "MCG_CAP", 0x00000179, 0, 0x1ff0fffULL, NULL }, - { "MCG_STATUS", 0x0000017a, 0, ~0, NULL }, - { "MCG_CTL", 0x0000017b, 0, ~0, NULL }, - { "MTRR_PHYSBASE0", 0x00000200, 0, ~0, NULL }, - { "MTRR_PHYSMASK0", 0x00000201, 0, ~0, NULL }, - { "MTRR_PHYSBASE1", 0x00000202, 0, ~0, NULL }, - { "MTRR_PHYSMASK1", 0x00000203, 0, ~0, NULL }, - { "MTRR_PHYSBASE2", 0x00000204, 0, ~0, NULL }, - { "MTRR_PHYSMASK2", 0x00000205, 0, ~0, NULL }, - { "MTRR_PHYSBASE3", 0x00000206, 0, ~0, NULL }, - { "MTRR_PHYSMASK3", 0x00000207, 0, ~0, NULL }, - { "MTRR_PHYSBASE4", 0x00000208, 0, ~0, NULL }, - { "MTRR_PHYSMASK4", 0x00000209, 0, ~0, NULL }, - { "MTRR_PHYSBASE5", 0x0000020a, 0, ~0, NULL }, - { "MTRR_PHYSMASK5", 0x0000020b, 0, ~0, NULL }, - { "MTRR_PHYSBASE6", 0x0000020c, 0, ~0, NULL }, - { "MTRR_PHYSMASK6", 0x0000020d, 0, ~0, NULL }, - { "MTRR_PHYSBASE7", 0x0000020e, 0, ~0, NULL }, - { "MTRR_PHYSMASK7", 0x0000020f, 0, ~0, NULL }, - { "MTRR_FIX64K_000", 0x00000250, 0, ~0, NULL }, - { "MTRR_FIX16K_800", 0x00000258, 0, ~0, NULL }, - { "MTRR_FIX16K_a00", 0x00000259, 0, ~0, NULL }, - { "MTRR_FIX4K_C000", 0x00000268, 0, ~0, NULL }, - { "MTRR_FIX4K_C800", 0x00000269, 0, ~0, NULL }, - { "MTRR_FIX4K_D000", 0x0000026a, 0, ~0, NULL }, - { "MTRR_FIX4K_D800", 0x0000026b, 0, ~0, NULL }, - { "MTRR_FIX4K_E000", 0x0000026c, 0, ~0, NULL }, - { "MTRR_FIX4K_E800", 0x0000026d, 0, ~0, NULL }, - { "MTRR_FIX4K_F000", 0x0000026e, 0, ~0, NULL }, - { "MTRR_FIX4K_F800", 0x0000026f, 0, ~0, NULL }, - { "PAT", 0x00000277, 0, 0x707070707070703ULL, NULL }, - { "MTRR_DEF_TYPE", 0x000002ff, 0, 0xc0fULL, NULL }, - { "EFER", 0xc0000080, 0, 0xd01ULL, NULL }, - { "STAR", 0xc0000081, 0, ~0, NULL }, - { "LSTAR", 0xc0000082, 0, ~0, NULL }, - { "FMASK", 0xc0000084, 0, ~0, NULL }, - //{ "FS_BASE", 0xc0000100, 0, ~0, NULL }, - //{ "GS_BASE", 0xc0000101, 0, ~0, NULL }, - { "KERNEL_GS_BASE", 0xc0000102, 0, ~0, NULL }, - //{ "TSC_AUX", 0xc0000103, 0, 0xffffffffULL, NULL }, - { "SYSCFG", 0xc0010010, 0, ~0, NULL }, - { "IORRBase0", 0xc0010016, 0, ~0, NULL }, - { "IORRMask0", 0xc0010017, 0, ~0, NULL }, - { "IORRBase1", 0xc0010018, 0, ~0, NULL }, - { "IORRMask1", 0xc0010019, 0, ~0, NULL }, - { "TOP_MEM", 0xc001001a, 0, ~0, NULL }, - { "TOP_MEM2", 0xc001001d, 0, ~0, NULL }, - { "Processor_Name_String", 0xc0010030, 0, ~0, NULL }, - { "Processor_Name_String", 0xc0010031, 0, ~0, NULL }, - { "Processor_Name_String", 0xc0010032, 0, ~0, NULL }, - { "Processor_Name_String", 0xc0010033, 0, ~0, NULL }, - { "Processor_Name_String", 0xc0010034, 0, ~0, NULL }, - { "Processor_Name_String", 0xc0010035, 0, ~0, NULL }, - { "TSC Ratio", 0xc0010104, 0, ~0, NULL }, - //{ "SMBASE", 0xc0010111, 0, ~0, NULL }, - { "SMM_ADDR", 0xc0010112, 0, ~0, NULL }, - { "SMM_MASK", 0xc0010113, 0, ~0, NULL }, - { "VM_CR", 0xc0010114, 0, ~0, NULL }, - { "IGNNE", 0xc0010115, 0, ~0, NULL }, - { "SMM_CTL", 0xc0010116, 0, ~0, NULL }, - { "VM_HSAVE_PA", 0xc0010117, 0, ~0, NULL }, - { "SVM_KEY_MSR", 0xc0010118, 0, ~0, NULL }, - { "OSVW_ID_Length", 0xc0010140, 0, ~0, NULL }, - { NULL, 0x00000000, 0, 0 , NULL } + { "MTRRCAP", 0x000000fe, 0x0000000000000fffULL, NULL }, + { "SYSENTER_CS", 0x00000174, 0x000000000000ffffULL, NULL }, + { "SYSENTER_ESP", 0x00000175, 0xffffffffffffffffULL, NULL }, + { "SYSENTER_EIP", 0x00000176, 0xffffffffffffffffULL, NULL }, + { "MCG_CAP", 0x00000179, 0x0000000001ff0fffULL, NULL }, + { "MCG_STATUS", 0x0000017a, 0xffffffffffffffffULL, NULL }, + { "MCG_CTL", 0x0000017b, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSBASE0", 0x00000200, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK0", 0x00000201, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSBASE1", 0x00000202, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK1", 0x00000203, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSBASE2", 0x00000204, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK2", 0x00000205, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSBASE3", 0x00000206, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK3", 0x00000207, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSBASE4", 0x00000208, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK4", 0x00000209, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSBASE5", 0x0000020a, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK5", 0x0000020b, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSBASE6", 0x0000020c, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK6", 0x0000020d, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSBASE7", 0x0000020e, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK7", 0x0000020f, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX64K_000", 0x00000250, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX16K_800", 0x00000258, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX16K_a00", 0x00000259, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX4K_C000", 0x00000268, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX4K_C800", 0x00000269, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX4K_D000", 0x0000026a, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX4K_D800", 0x0000026b, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX4K_E000", 0x0000026c, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX4K_E800", 0x0000026d, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX4K_F000", 0x0000026e, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX4K_F800", 0x0000026f, 0xffffffffffffffffULL, NULL }, + { "PAT", 0x00000277, 0x0707070707070703ULL, NULL }, + { "MTRR_DEF_TYPE", 0x000002ff, 0x0000000000000c0fULL, NULL }, + { "EFER", 0xc0000080, 0x0000000000000d01ULL, NULL }, + { "STAR", 0xc0000081, 0xffffffffffffffffULL, NULL }, + { "LSTAR", 0xc0000082, 0xffffffffffffffffULL, NULL }, + { "FMASK", 0xc0000084, 0xffffffffffffffffULL, NULL }, + //{ "FS_BASE", 0xc0000100, 0xffffffffffffffffULL, NULL }, + //{ "GS_BASE", 0xc0000101, 0xffffffffffffffffULL, NULL }, + { "KERNEL_GS_BASE", 0xc0000102, 0xffffffffffffffffULL, NULL }, + //{ "TSC_AUX", 0xc0000103, 0x00000000ffffffffULL, NULL }, + { "SYSCFG", 0xc0010010, 0xffffffffffffffffULL, NULL }, + { "IORRBase0", 0xc0010016, 0xffffffffffffffffULL, NULL }, + { "IORRMask0", 0xc0010017, 0xffffffffffffffffULL, NULL }, + { "IORRBase1", 0xc0010018, 0xffffffffffffffffULL, NULL }, + { "IORRMask1", 0xc0010019, 0xffffffffffffffffULL, NULL }, + { "TOP_MEM", 0xc001001a, 0xffffffffffffffffULL, NULL }, + { "TOP_MEM2", 0xc001001d, 0xffffffffffffffffULL, NULL }, + { "Processor_Name_String", 0xc0010030, 0xffffffffffffffffULL, NULL }, + { "Processor_Name_String", 0xc0010031, 0xffffffffffffffffULL, NULL }, + { "Processor_Name_String", 0xc0010032, 0xffffffffffffffffULL, NULL }, + { "Processor_Name_String", 0xc0010033, 0xffffffffffffffffULL, NULL }, + { "Processor_Name_String", 0xc0010034, 0xffffffffffffffffULL, NULL }, + { "Processor_Name_String", 0xc0010035, 0xffffffffffffffffULL, NULL }, + { "TSC Ratio", 0xc0010104, 0xffffffffffffffffULL, NULL }, + //{ "SMBASE", 0xc0010111, 0xffffffffffffffffULL, NULL }, + { "SMM_ADDR", 0xc0010112, 0xffffffffffffffffULL, NULL }, + { "SMM_MASK", 0xc0010113, 0xffffffffffffffffULL, NULL }, + { "VM_CR", 0xc0010114, 0xffffffffffffffffULL, NULL }, + { "IGNNE", 0xc0010115, 0xffffffffffffffffULL, NULL }, + { "SMM_CTL", 0xc0010116, 0xffffffffffffffffULL, NULL }, + { "VM_HSAVE_PA", 0xc0010117, 0xffffffffffffffffULL, NULL }, + { "SVM_KEY_MSR", 0xc0010118, 0xffffffffffffffffULL, NULL }, + { "OSVW_ID_Length", 0xc0010140, 0xffffffffffffffffULL, NULL }, + { NULL, 0x00000000, 0, NULL } }; static const msr_info IA32_MSRs[] = { - //{ "P5_MC_ADDR", 0x00000000, 0, ~0, NULL }, - { "P5_MC_TYPE", 0x00000001, 0, ~0, NULL }, - { "MONITOR_FILTER_SIZE",0x00000006, 0, ~0, NULL }, - //{ "TIME_STAMP_COUNTER",0x00000010, 0, ~0, NULL }, - { "PLATFORM_ID", 0x00000017, 0, 0x1c000000000000ULL, NULL }, - { "EBL_CR_POWERON", 0x0000002a, 0, ~0, NULL }, - { "APIC_BASE", 0x0000001b, 0, 0xfffffffffffffeffULL, NULL }, - { "FEATURE_CONTROL", 0x0000003a, 0, 0xff07ULL, NULL }, - { "BIOS_SIGN_ID", 0x0000008b, 0, 0xffffffff00000000ULL, NULL }, - { "MTRRCAP", 0x000000fe, 0, 0xfffULL, NULL }, - { "SYSENTER_CS", 0x00000174, 0, 0xffffULL, NULL }, - { "SYSENTER_ESP", 0x00000175, 0, ~0, NULL }, - { "SYSENTER_EIP", 0x00000176, 0, ~0, NULL }, - { "MCG_CAP", 0x00000179, 0, 0x1ff0fffULL, NULL }, - { "MCG_STATUS", 0x0000017a, 0, ~0, NULL }, - { "MCG_CTL", 0x0000017b, 0, ~0, NULL }, - { "CLOCK_MODULATION", 0x0000019a, 0, 0x1fULL, NULL }, - { "THERM_INTERRUPT", 0x0000019b, 0, 0x180801fULL, NULL }, - //{ "THERM_STATUS", 0x0000019c, 0, 0x80000fffULL, NULL }, - { "MISC_ENABLE", 0x000001a0, 0, 0x400c51889ULL, NULL }, - { "PACKAGE_THERM_INTERRUPT", 0x000001b2,0, 0x1ffff17ULL, NULL }, - { "SMRR_PHYSBASE", 0x000001f2, 0, 0xfffff0ffULL, NULL }, - { "SMRR_PHYSMASK", 0x000001f3, 0, 0xfffff800ULL, NULL }, - { "PLATFORM_DCA_CAP", 0x000001f8, 0, ~0, NULL }, - { "CPU_DCA_CAP", 0x000001f9, 0, ~0, NULL }, - { "DCA_O_CAP", 0x000001fa, 0, 0x501e7ffULL, NULL }, - { "MTRR_PHYSBASE0", 0x00000200, 0, ~0, NULL }, - { "MTRR_PHYSMASK0", 0x00000201, 0, ~0, NULL }, - { "MTRR_PHYSBASE1", 0x00000202, 0, ~0, NULL }, - { "MTRR_PHYSMASK1", 0x00000203, 0, ~0, NULL }, - { "MTRR_PHYSBASE2", 0x00000204, 0, ~0, NULL }, - { "MTRR_PHYSMASK2", 0x00000205, 0, ~0, NULL }, - { "MTRR_PHYSBASE3", 0x00000206, 0, ~0, NULL }, - { "MTRR_PHYSMASK3", 0x00000207, 0, ~0, NULL }, - { "MTRR_PHYSBASE4", 0x00000208, 0, ~0, NULL }, - { "MTRR_PHYSMASK4", 0x00000209, 0, ~0, NULL }, - { "MTRR_PHYSBASE5", 0x0000020a, 0, ~0, NULL }, - { "MTRR_PHYSMASK5", 0x0000020b, 0, ~0, NULL }, - { "MTRR_PHYSBASE6", 0x0000020c, 0, ~0, NULL }, - { "MTRR_PHYSMASK6", 0x0000020d, 0, ~0, NULL }, - { "MTRR_PHYSBASE7", 0x0000020e, 0, ~0, NULL }, - { "MTRR_PHYSMASK7", 0x0000020f, 0, ~0, NULL }, - { "MTRR_PHYSBASE8", 0x00000210, 0, ~0, NULL }, - { "MTRR_PHYSMASK8", 0x00000211, 0, ~0, NULL }, - { "MTRR_PHYSBASE9", 0x00000212, 0, ~0, NULL }, - { "MTRR_PHYSMASK9", 0x00000213, 0, ~0, NULL }, - { "MTRR_FIX64K_000", 0x00000250, 0, ~0, NULL }, - { "MTRR_FIX16K_800", 0x00000258, 0, ~0, NULL }, - { "MTRR_FIX16K_a00", 0x00000259, 0, ~0, NULL }, - { "MTRR_FIX4K_C000", 0x00000268, 0, ~0, NULL }, - { "MTRR_FIX4K_C800", 0x00000269, 0, ~0, NULL }, - { "MTRR_FIX4K_D000", 0x0000026a, 0, ~0, NULL }, - { "MTRR_FIX4K_D800", 0x0000026b, 0, ~0, NULL }, - { "MTRR_FIX4K_E000", 0x0000026c, 0, ~0, NULL }, - { "MTRR_FIX4K_E800", 0x0000026d, 0, ~0, NULL }, - { "MTRR_FIX4K_F000", 0x0000026e, 0, ~0, NULL }, - { "MTRR_FIX4K_F800", 0x0000026f, 0, ~0, NULL }, - { "PAT", 0x00000277, 0, 0x707070707070703ULL, NULL }, - { "MC0_CTL2", 0x00000280, 0, 0x40007fffULL, NULL }, - { "MC1_CTL2", 0x00000281, 0, 0x40007fffULL, NULL }, - { "MC2_CTL2", 0x00000282, 0, 0x40007fffULL, NULL }, - { "MC3_CTL2", 0x00000283, 0, 0x40007fffULL, NULL }, - { "MC4_CTL2", 0x00000284, 0, 0x40007fffULL, NULL }, - { "MC5_CTL2", 0x00000285, 0, 0x40007fffULL, NULL }, - { "MC6_CTL2", 0x00000286, 0, 0x40007fffULL, NULL }, - { "MC7_CTL2", 0x00000287, 0, 0x40007fffULL, NULL }, - { "MC8_CTL2", 0x00000288, 0, 0x40007fffULL, NULL }, - { "MC9_CTL2", 0x00000289, 0, 0x40007fffULL, NULL }, - { "MC10_CTL2", 0x0000028a, 0, 0x40007fffULL, NULL }, - { "MC11_CTL2", 0x0000028b, 0, 0x40007fffULL, NULL }, - { "MC12_CTL2", 0x0000028c, 0, 0x40007fffULL, NULL }, - { "MC13_CTL2", 0x0000028d, 0, 0x40007fffULL, NULL }, - { "MC14_CTL2", 0x0000028e, 0, 0x40007fffULL, NULL }, - { "MC15_CTL2", 0x0000028f, 0, 0x40007fffULL, NULL }, - { "MC16_CTL2", 0x00000290, 0, 0x40007fffULL, NULL }, - { "MC17_CTL2", 0x00000291, 0, 0x40007fffULL, NULL }, - { "MC18_CTL2", 0x00000292, 0, 0x40007fffULL, NULL }, - { "MC19_CTL2", 0x00000293, 0, 0x40007fffULL, NULL }, - { "MC20_CTL2", 0x00000294, 0, 0x40007fffULL, NULL }, - { "MC21_CTL2", 0x00000295, 0, 0x40007fffULL, NULL }, - { "MTRR_DEF_TYPE", 0x000002ff, 0, 0xc0fULL, NULL }, - { "PEBS_ENABLE", 0x000003f1, 0, 0x1ULL, NULL }, - - { "VMX_BASIC", 0x00000480, 0, ~0, NULL }, - { "VMX_PINPASED_CTLS", 0x00000481, 0, ~0, NULL }, - { "VMX_PROCBASED_CTLS", 0x00000482, 0, ~0, NULL }, - { "VMX_EXIT_CTLS", 0x00000483, 0, ~0, NULL }, - { "VMX_ENTRY_CTLS", 0x00000484, 0, ~0, NULL }, - { "VMX_MISC", 0x00000485, 0, ~0, NULL }, - { "VMX_CR0_FIXED0", 0x00000486, 0, ~0, NULL }, - { "VMX_CR0_FIXED1", 0x00000487, 0, ~0, NULL }, - { "VMX_CR4_FIXED0", 0x00000488, 0, ~0, NULL }, - { "VMX_CR4_FIXED1", 0x00000489, 0, ~0, NULL }, - { "VMX_VMX_VMCS_ENUM", 0x0000048a, 0, ~0, NULL }, - { "VMX_PROCBASED_CTLS2",0x0000048b, 0, ~0, NULL }, - { "VMX_EPT_VPID_CAP", 0x0000048c, 0, ~0, NULL }, - { "VMX_TRUE_PINBASED_CTLS",0x0000048d, 0, ~0, NULL }, - { "VMX_TRUE_PROCBASED_CTLS",0x0000048e, 0, ~0, NULL }, - { "VMX_TRUE_EXIT_CTLS", 0x0000048f, 0, ~0, NULL }, - { "VMX_TRUE_ENTRY_CTLS",0x00000490, 0, ~0, NULL }, - - { "A_PMC4", 0x000004c5, 0, ~0, NULL }, - { "A_PMC5", 0x000004c6, 0, ~0, NULL }, - { "A_PMC6", 0x000004c7, 0, ~0, NULL }, - { "A_PMC7", 0x000004c8, 0, ~0, NULL }, - - { "EFER", 0xc0000080, 0, 0xd01ULL, NULL }, - { "STAR", 0xc0000081, 0, ~0, NULL }, - { "LSTAR", 0xc0000082, 0, ~0, NULL }, - { "FMASK", 0xc0000084, 0, ~0, NULL }, - //{ "FS_BASE", 0xc0000100, 0, ~0, NULL }, - //{ "GS_BASE", 0xc0000101, 0, ~0, NULL }, - { "KERNEL_GS_BASE", 0xc0000102, 0, ~0, NULL }, - { NULL, 0x00000000, 0, 0 , NULL }, + //{ "P5_MC_ADDR", 0x00000000, 0xffffffffffffffffULL, NULL }, + { "P5_MC_TYPE", 0x00000001, 0xffffffffffffffffULL, NULL }, + { "MONITOR_FILTER_SIZE", 0x00000006, 0xffffffffffffffffULL, NULL }, + //{ "TIME_STAMP_COUNTER", 0x00000010, 0xffffffffffffffffULL, NULL }, + { "PLATFORM_ID", 0x00000017, 0x001c000000000000ULL, NULL }, + { "EBL_CR_POWERON", 0x0000002a, 0xffffffffffffffffULL, NULL }, + { "APIC_BASE", 0x0000001b, 0xfffffffffffffeffULL, NULL }, + { "FEATURE_CONTROL", 0x0000003a, 0x000000000000ff07ULL, NULL }, + { "BIOS_SIGN_ID", 0x0000008b, 0xffffffff00000000ULL, NULL }, + { "MTRRCAP", 0x000000fe, 0x0000000000000fffULL, NULL }, + { "SYSENTER_CS", 0x00000174, 0x000000000000ffffULL, NULL }, + { "SYSENTER_ESP", 0x00000175, 0xffffffffffffffffULL, NULL }, + { "SYSENTER_EIP", 0x00000176, 0xffffffffffffffffULL, NULL }, + { "MCG_CAP", 0x00000179, 0x0000000001ff0fffULL, NULL }, + { "MCG_STATUS", 0x0000017a, 0xffffffffffffffffULL, NULL }, + { "MCG_CTL", 0x0000017b, 0xffffffffffffffffULL, NULL }, + { "CLOCK_MODULATION", 0x0000019a, 0x000000000000001fULL, NULL }, + { "THERM_INTERRUPT", 0x0000019b, 0x000000000180801fULL, NULL }, + //{ "THERM_STATUS", 0x0000019c, 0x0000000080000fffULL, NULL }, + { "MISC_ENABLE", 0x000001a0, 0x0000000400c51889ULL, NULL }, + { "PACKAGE_THERM_INTERRUPT", 0x000001b2, 0x0000000001ffff17ULL, NULL }, + { "SMRR_PHYSBASE", 0x000001f2, 0x00000000fffff0ffULL, NULL }, + { "SMRR_PHYSMASK", 0x000001f3, 0x00000000fffff800ULL, NULL }, + { "PLATFORM_DCA_CAP", 0x000001f8, 0xffffffffffffffffULL, NULL }, + { "CPU_DCA_CAP", 0x000001f9, 0xffffffffffffffffULL, NULL }, + { "DCA_O_CAP", 0x000001fa, 0x000000000501e7ffULL, NULL }, + { "MTRR_PHYSBASE0", 0x00000200, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK0", 0x00000201, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSBASE1", 0x00000202, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK1", 0x00000203, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSBASE2", 0x00000204, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK2", 0x00000205, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSBASE3", 0x00000206, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK3", 0x00000207, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSBASE4", 0x00000208, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK4", 0x00000209, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSBASE5", 0x0000020a, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK5", 0x0000020b, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSBASE6", 0x0000020c, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK6", 0x0000020d, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSBASE7", 0x0000020e, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK7", 0x0000020f, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSBASE8", 0x00000210, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK8", 0x00000211, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSBASE9", 0x00000212, 0xffffffffffffffffULL, NULL }, + { "MTRR_PHYSMASK9", 0x00000213, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX64K_000", 0x00000250, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX16K_800", 0x00000258, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX16K_a00", 0x00000259, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX4K_C000", 0x00000268, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX4K_C800", 0x00000269, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX4K_D000", 0x0000026a, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX4K_D800", 0x0000026b, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX4K_E000", 0x0000026c, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX4K_E800", 0x0000026d, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX4K_F000", 0x0000026e, 0xffffffffffffffffULL, NULL }, + { "MTRR_FIX4K_F800", 0x0000026f, 0xffffffffffffffffULL, NULL }, + { "PAT", 0x00000277, 0x0707070707070703ULL, NULL }, + { "MC0_CTL2", 0x00000280, 0x0000000040007fffULL, NULL }, + { "MC1_CTL2", 0x00000281, 0x0000000040007fffULL, NULL }, + { "MC2_CTL2", 0x00000282, 0x0000000040007fffULL, NULL }, + { "MC3_CTL2", 0x00000283, 0x0000000040007fffULL, NULL }, + { "MC4_CTL2", 0x00000284, 0x0000000040007fffULL, NULL }, + { "MC5_CTL2", 0x00000285, 0x0000000040007fffULL, NULL }, + { "MC6_CTL2", 0x00000286, 0x0000000040007fffULL, NULL }, + { "MC7_CTL2", 0x00000287, 0x0000000040007fffULL, NULL }, + { "MC8_CTL2", 0x00000288, 0x0000000040007fffULL, NULL }, + { "MC9_CTL2", 0x00000289, 0x0000000040007fffULL, NULL }, + { "MC10_CTL2", 0x0000028a, 0x0000000040007fffULL, NULL }, + { "MC11_CTL2", 0x0000028b, 0x0000000040007fffULL, NULL }, + { "MC12_CTL2", 0x0000028c, 0x0000000040007fffULL, NULL }, + { "MC13_CTL2", 0x0000028d, 0x0000000040007fffULL, NULL }, + { "MC14_CTL2", 0x0000028e, 0x0000000040007fffULL, NULL }, + { "MC15_CTL2", 0x0000028f, 0x0000000040007fffULL, NULL }, + { "MC16_CTL2", 0x00000290, 0x0000000040007fffULL, NULL }, + { "MC17_CTL2", 0x00000291, 0x0000000040007fffULL, NULL }, + { "MC18_CTL2", 0x00000292, 0x0000000040007fffULL, NULL }, + { "MC19_CTL2", 0x00000293, 0x0000000040007fffULL, NULL }, + { "MC20_CTL2", 0x00000294, 0x0000000040007fffULL, NULL }, + { "MC21_CTL2", 0x00000295, 0x0000000040007fffULL, NULL }, + { "MTRR_DEF_TYPE", 0x000002ff, 0x0000000000000c0fULL, NULL }, + { "PEBS_ENABLE", 0x000003f1, 0x0000000000000001ULL, NULL }, + { "VMX_BASIC", 0x00000480, 0xffffffffffffffffULL, NULL }, + { "VMX_PINPASED_CTLS", 0x00000481, 0xffffffffffffffffULL, NULL }, + { "VMX_PROCBASED_CTLS", 0x00000482, 0xffffffffffffffffULL, NULL }, + { "VMX_EXIT_CTLS", 0x00000483, 0xffffffffffffffffULL, NULL }, + { "VMX_ENTRY_CTLS", 0x00000484, 0xffffffffffffffffULL, NULL }, + { "VMX_MISC", 0x00000485, 0xffffffffffffffffULL, NULL }, + { "VMX_CR0_FIXED0", 0x00000486, 0xffffffffffffffffULL, NULL }, + { "VMX_CR0_FIXED1", 0x00000487, 0xffffffffffffffffULL, NULL }, + { "VMX_CR4_FIXED0", 0x00000488, 0xffffffffffffffffULL, NULL }, + { "VMX_CR4_FIXED1", 0x00000489, 0xffffffffffffffffULL, NULL }, + { "VMX_VMX_VMCS_ENUM", 0x0000048a, 0xffffffffffffffffULL, NULL }, + { "VMX_PROCBASED_CTLS2", 0x0000048b, 0xffffffffffffffffULL, NULL }, + { "VMX_EPT_VPID_CAP", 0x0000048c, 0xffffffffffffffffULL, NULL }, + { "VMX_TRUE_PINBASED_CTLS", 0x0000048d, 0xffffffffffffffffULL, NULL }, + { "VMX_TRUE_PROCBASED_CTLS", 0x0000048e, 0xffffffffffffffffULL, NULL }, + { "VMX_TRUE_EXIT_CTLS", 0x0000048f, 0xffffffffffffffffULL, NULL }, + { "VMX_TRUE_ENTRY_CTLS", 0x00000490, 0xffffffffffffffffULL, NULL }, + { "A_PMC4", 0x000004c5, 0xffffffffffffffffULL, NULL }, + { "A_PMC5", 0x000004c6, 0xffffffffffffffffULL, NULL }, + { "A_PMC6", 0x000004c7, 0xffffffffffffffffULL, NULL }, + { "A_PMC7", 0x000004c8, 0xffffffffffffffffULL, NULL }, + { "EFER", 0xc0000080, 0x0000000000000d01ULL, NULL }, + { "STAR", 0xc0000081, 0xffffffffffffffffULL, NULL }, + { "LSTAR", 0xc0000082, 0xffffffffffffffffULL, NULL }, + { "FMASK", 0xc0000084, 0xffffffffffffffffULL, NULL }, + //{ "FS_BASE", 0xc0000100, 0xffffffffffffffffULL, NULL }, + //{ "GS_BASE", 0xc0000101, 0xffffffffffffffffULL, NULL }, + { "KERNEL_GS_BASE", 0xc0000102, 0xffffffffffffffffULL, NULL }, + { NULL, 0x00000000, 0, NULL }, }; static const msr_info IA32_atom_MSRs[] = { - { "BIOS_UPDT_TRIG", 0x00000079, 0, ~0, NULL }, - { "BIOS_SIGN_ID", 0x0000008b, 0, ~0, NULL }, - { "MSR_FSB_FREQ", 0x000000cd, 0, 0x7ULL, NULL }, - { "MSR_BBL_CR_CTL3", 0x0000011e, 0, 0x800101ULL, NULL }, - { "PERFEVTSEL0", 0x00000186, 0, ~0, NULL }, - { "PERFEVTSEL1", 0x00000187, 0, ~0, NULL }, - { "MSR_THERM2_CTL", 0x0000019d, 0, 0x10000ULL, NULL }, - { "MC0_CTL", 0x00000400, 0, ~0, NULL }, - { "MC0_STATUS", 0x00000401, 0, ~0, NULL }, - { "MC0_ADDR", 0x00000402, 0, ~0, NULL }, - { "MC1_CTL", 0x00000404, 0, ~0, NULL }, - { "MC1_STATUS", 0x00000405, 0, ~0, NULL }, - { "MC2_CTL", 0x00000408, 0, ~0, NULL }, - { "MC2_STATUS", 0x00000409, 0, ~0, NULL }, - { "MC2_ADDR", 0x0000040a, 0, ~0, NULL }, - { "MC3_CTL", 0x0000040c, 0, ~0, NULL }, - { "MC3_STATUS", 0x0000040d, 0, ~0, NULL }, - { "MC3_ADDR", 0x0000040e, 0, ~0, NULL }, - { "MC4_CTL", 0x00000410, 0, ~0, NULL }, - { "MC4_STATUS", 0x00000411, 0, ~0, NULL }, - { "MC4_ADDR", 0x00000412, 0, ~0, NULL }, - { NULL, 0x00000000, 0, 0 , NULL }, + { "BIOS_UPDT_TRIG", 0x00000079, 0xffffffffffffffffULL, NULL }, + { "BIOS_SIGN_ID", 0x0000008b, 0xffffffffffffffffULL, NULL }, + { "MSR_FSB_FREQ", 0x000000cd, 0x0000000000000007ULL, NULL }, + { "MSR_BBL_CR_CTL3", 0x0000011e, 0x0000000000800101ULL, NULL }, + { "PERFEVTSEL0", 0x00000186, 0xffffffffffffffffULL, NULL }, + { "PERFEVTSEL1", 0x00000187, 0xffffffffffffffffULL, NULL }, + { "MSR_THERM2_CTL", 0x0000019d, 0x0000000000010000ULL, NULL }, + { "MC0_CTL", 0x00000400, 0xffffffffffffffffULL, NULL }, + { "MC0_STATUS", 0x00000401, 0xffffffffffffffffULL, NULL }, + { "MC0_ADDR", 0x00000402, 0xffffffffffffffffULL, NULL }, + { "MC1_CTL", 0x00000404, 0xffffffffffffffffULL, NULL }, + { "MC1_STATUS", 0x00000405, 0xffffffffffffffffULL, NULL }, + { "MC2_CTL", 0x00000408, 0xffffffffffffffffULL, NULL }, + { "MC2_STATUS", 0x00000409, 0xffffffffffffffffULL, NULL }, + { "MC2_ADDR", 0x0000040a, 0xffffffffffffffffULL, NULL }, + { "MC3_CTL", 0x0000040c, 0xffffffffffffffffULL, NULL }, + { "MC3_STATUS", 0x0000040d, 0xffffffffffffffffULL, NULL }, + { "MC3_ADDR", 0x0000040e, 0xffffffffffffffffULL, NULL }, + { "MC4_CTL", 0x00000410, 0xffffffffffffffffULL, NULL }, + { "MC4_STATUS", 0x00000411, 0xffffffffffffffffULL, NULL }, + { "MC4_ADDR", 0x00000412, 0xffffffffffffffffULL, NULL }, + { NULL, 0x00000000, 0, NULL }, }; static const msr_info IA32_silvermont_MSRs[] = { - { NULL, 0x00000000, 0, 0 , NULL }, + { NULL, 0x00000000, 0, NULL }, }; static const msr_info IA32_nehalem_MSRs[] = { - { "BIOS_UPDT_TRIG", 0x00000079, 0, ~0, NULL }, - { "MSR_PLATFORM_INFO", 0x000000ce, 0, 0xff003001ff00ULL, NULL }, - { "MSR_PKG_CST_CONFIG_CONTROL", 0x000000e2, 0, 0x7008407ULL, NULL }, - { "MSR_PMG_IO_CAPTURE_BASE", 0x000000e4, 0, 0x7ffffULL, NULL }, - { "MSR_TEMPERATURE_TARGET", 0x000001a2, 0, 0xff0000, NULL }, - { "MSR_OFFCORE_RSP_0", 0x000001a6, 0, ~0, NULL }, - { "MSR_MISC_PWR_MGMT", 0x000001aa, 0, 0x3ULL, NULL }, - { "MSR_TURBO_POWER_CURRENT_LIMIT",0x000001ac, 0, 0xffffffffULL, NULL }, - { "MSR_TURBO_RATIO_LIMIT", 0x000001ad, 0, 0xffffffffULL, NULL }, - { "MSR_POWER_CTL", 0x000001fc, 0, 0x2ULL, NULL }, - { NULL, 0x00000000, 0, 0 , NULL }, + { "BIOS_UPDT_TRIG", 0x00000079, 0xffffffffffffffffULL, NULL }, + { "MSR_PLATFORM_INFO", 0x000000ce, 0x0000ff003001ff00ULL, NULL }, + { "MSR_PKG_CST_CONFIG_CONTROL", 0x000000e2, 0x0000000007008407ULL, NULL }, + { "MSR_PMG_IO_CAPTURE_BASE", 0x000000e4, 0x000000000007ffffULL, NULL }, + { "MSR_TEMPERATURE_TARGET", 0x000001a2, 0x0000000000ff0000ULL, NULL }, + { "MSR_OFFCORE_RSP_0", 0x000001a6, 0xffffffffffffffffULL, NULL }, + { "MSR_MISC_PWR_MGMT", 0x000001aa, 0x0000000000000003ULL, NULL }, + { "MSR_TURBO_POWER_CURRENT_LIMIT",0x000001ac, 0x00000000ffffffffULL, NULL }, + { "MSR_TURBO_RATIO_LIMIT", 0x000001ad, 0x00000000ffffffffULL, NULL }, + { "MSR_POWER_CTL", 0x000001fc, 0x0000000000000002ULL, NULL }, + { NULL, 0x00000000, 0, NULL }, }; static const msr_info IA32_sandybridge_MSRs[] = { - { "BIOS_UPDT_TRIG", 0x00000079, 0, ~0, NULL }, - { "BIOS_SIGN_ID", 0x0000008b, 0, ~0, NULL }, - { "MSR_PLATFORM_INFO", 0x000000ce, 0, 0xff003001ff00ULL, NULL }, - { "MSR_PKG_CST_CONFIG_CONTROL", 0x000000e2, 0, 0x7008407ULL, NULL }, - { "MSR_PMG_IO_CAPTURE_BASE", 0x000000e4, 0, 0x7ffffULL, NULL }, - { "MSR_TEMPERATURE_TARGET", 0x000001a2, 0, 0xff0000, NULL }, - { "MSR_OFFCORE_RSP_0", 0x000001a6, 0, ~0, NULL }, - { "MSR_TURBO_RATIO_LIMIT", 0x000001ad, 0, 0xffffffffULL, NULL }, - { "MSR_POWER_CTL", 0x000001fc, 0, 0x2ULL, NULL }, - { "MSR_PKGC3_IRTL", 0x0000060a, 0, 0x9fffULL, NULL }, - { "MSR_PKGC6_IRTL", 0x0000060b, 0, 0x9fffULL, NULL }, - { "MSR_PKGC7_IRTL", 0x0000060c, 0, 0x9fffULL, NULL }, - { "MSR_PKG_RAPL_POWER_LIMIT", 0x00000610, 0, ~0, NULL }, - { "MSR_PKG_RAPL_POWER_INFO", 0x00000614, 0, ~0, NULL }, - { "MSR_PP0_POWER_LIMIT", 0x00000638, 0, ~0, NULL }, - { "MSR_PP0_POLICY", 0x0000063a, 0, ~0, NULL }, - { "MSR_PP1_POWER_LIMIT", 0x00000640, 0, ~0, NULL }, - { "MSR_PP1_POLICY", 0x00000642, 0, ~0, NULL }, - { NULL, 0x00000000, 0, 0 , NULL }, + { "BIOS_UPDT_TRIG", 0x00000079, 0xffffffffffffffffULL, NULL }, + { "BIOS_SIGN_ID", 0x0000008b, 0xffffffffffffffffULL, NULL }, + { "MSR_PLATFORM_INFO", 0x000000ce, 0x0000ff003001ff00ULL, NULL }, + { "MSR_PKG_CST_CONFIG_CONTROL", 0x000000e2, 0x0000000007008407ULL, NULL }, + { "MSR_PMG_IO_CAPTURE_BASE", 0x000000e4, 0x000000000007ffffULL, NULL }, + { "MSR_TEMPERATURE_TARGET", 0x000001a2, 0x0000000000ff0000ULL, NULL }, + { "MSR_OFFCORE_RSP_0", 0x000001a6, 0xffffffffffffffffULL, NULL }, + { "MSR_TURBO_RATIO_LIMIT", 0x000001ad, 0x00000000ffffffffULL, NULL }, + { "MSR_POWER_CTL", 0x000001fc, 0x0000000000000002ULL, NULL }, + { "MSR_PKGC3_IRTL", 0x0000060a, 0x0000000000009fffULL, NULL }, + { "MSR_PKGC6_IRTL", 0x0000060b, 0x0000000000009fffULL, NULL }, + { "MSR_PKGC7_IRTL", 0x0000060c, 0x0000000000009fffULL, NULL }, + { "MSR_PKG_RAPL_POWER_LIMIT", 0x00000610, 0xffffffffffffffffULL, NULL }, + { "MSR_PKG_RAPL_POWER_INFO", 0x00000614, 0xffffffffffffffffULL, NULL }, + { "MSR_PP0_POWER_LIMIT", 0x00000638, 0xffffffffffffffffULL, NULL }, + { "MSR_PP0_POLICY", 0x0000063a, 0xffffffffffffffffULL, NULL }, + { "MSR_PP1_POWER_LIMIT", 0x00000640, 0xffffffffffffffffULL, NULL }, + { "MSR_PP1_POLICY", 0x00000642, 0xffffffffffffffffULL, NULL }, + { NULL, 0x00000000, 0, NULL }, }; static const msr_info IA32_ivybridge_MSRs[] = { - { "MSR_PLATFORM_INFO", 0x000000ce, 0, 0x00ffff073000ff00ULL, NULL }, - { "MSR_PKG_CST_CONFIG_CONTROL", 0x000000e2, 0, 0x000000001e008407ULL, NULL }, - { "MSR_CONFIG_TDP_NOMINAL", 0x00000648, 0, 0x00000000000000ffULL, NULL }, - { "MSR_CONFIG_TDP_LEVEL1", 0x00000649, 0, 0x7fff7fff00ff7fffULL, NULL }, - { "MSR_CONFIG_TDP_LEVEL2", 0x0000064a, 0, 0x7fff7fff00ff7fffULL, NULL }, - { "MSR_CONFIG_TDP_CONTROL", 0x0000064b, 0, 0x0000000080000003ULL, NULL }, - { "MSR_TURBO_ACTIVATION_RATIO", 0x0000064c, 0, 0x00000000800000ffULL, NULL }, - { NULL, 0x00000000, 0, 0 , NULL }, + { "MSR_PLATFORM_INFO", 0x000000ce, 0x00ffff073000ff00ULL, NULL }, + { "MSR_PKG_CST_CONFIG_CONTROL", 0x000000e2, 0x000000001e008407ULL, NULL }, + { "MSR_CONFIG_TDP_NOMINAL", 0x00000648, 0x00000000000000ffULL, NULL }, + { "MSR_CONFIG_TDP_LEVEL1", 0x00000649, 0x7fff7fff00ff7fffULL, NULL }, + { "MSR_CONFIG_TDP_LEVEL2", 0x0000064a, 0x7fff7fff00ff7fffULL, NULL }, + { "MSR_CONFIG_TDP_CONTROL", 0x0000064b, 0x0000000080000003ULL, NULL }, + { "MSR_TURBO_ACTIVATION_RATIO", 0x0000064c, 0x00000000800000ffULL, NULL }, + { NULL, 0x00000000, 0, NULL }, }; static const msr_info IA32_ivybridge_ep_MSRs[] = { - { "MSR_PLATFORM_INFO", 0x000000ce, 0, 0xffff073000ff00ULL, NULL }, - { "MSR_PKG_CST_CONFIG_CONTROL", 0x000000e2, 0, 0x0000001e008407ULL, NULL }, - { "MSR_ERROR_CONTROL", 0x0000017f, 0, 0x00000000000002ULL, NULL }, + { "MSR_PLATFORM_INFO", 0x000000ce, 0x00ffff073000ff00ULL, NULL }, + { "MSR_PKG_CST_CONFIG_CONTROL", 0x000000e2, 0x000000001e008407ULL, NULL }, + { "MSR_ERROR_CONTROL", 0x0000017f, 0x0000000000000002ULL, NULL }, /* Not sure about the following, commented out for the moment */ /* - { "MSR_MC5_CTL", 0x00000414, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC5_STATUS", 0x00000415, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC5_ADDR", 0x00000416, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC5_MISC", 0x00000417, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC6_CTL", 0x00000418, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC6_STATUS", 0x00000419, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC6_ADDR", 0x0000041a, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC6_MISC", 0x0000041b, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC7_CTL", 0x0000041c, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC7_STATUS", 0x0000041d, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC7_ADDR", 0x0000041e, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC7_MISC", 0x0000041f, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC8_CTL", 0x00000420, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC8_STATUS", 0x00000421, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC8_ADDR", 0x00000422, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC8_MISC", 0x00000423, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC9_CTL", 0x00000424, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC9_STATUS", 0x00000425, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC9_ADDR", 0x00000426, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC9_MISC", 0x00000427, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC10_CTL", 0x00000428, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC10_STATUS", 0x00000429, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC10_ADDR", 0x0000042a, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC10_MISC", 0x0000042b, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC11_CTL", 0x0000042c, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC11_STATUS", 0x0000042d, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC11_ADDR", 0x0000042e, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC11_MISC", 0x0000042f, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC12_CTL", 0x00000430, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC12_STATUS", 0x00000431, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC12_ADDR", 0x00000432, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC12_MISC", 0x00000433, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC13_CTL", 0x00000434, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC13_STATUS", 0x00000435, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC13_ADDR", 0x00000436, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC13_MISC", 0x00000437, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC14_CTL", 0x00000438, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC14_STATUS", 0x00000439, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC14_ADDR", 0x0000043a, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC14_MISC", 0x0000043b, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC15_CTL", 0x0000043c, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC15_STATUS", 0x0000043d, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC15_ADDR", 0x0000043e, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC15_MISC", 0x0000043f, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC16_CTL", 0x00000440, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC16_STATUS", 0x00000441, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC16_ADDR", 0x00000442, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC16_MISC", 0x00000443, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC17_CTL", 0x00000444, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC17_STATUS", 0x00000445, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC17_ADDR", 0x00000446, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC17_MISC", 0x00000447, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC18_CTL", 0x00000448, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC18_STATUS", 0x00000449, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC18_ADDR", 0x0000044a, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC18_MISC", 0x0000044b, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC19_CTL", 0x0000044c, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC19_STATUS", 0x0000044d, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC19_ADDR", 0x0000044e, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC19_MISC", 0x0000044f, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC20_CTL", 0x00000450, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC20_STATUS", 0x00000451, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC20_ADDR", 0x00000452, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC20_MISC", 0x00000453, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC21_CTL", 0x00000454, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC21_STATUS", 0x00000455, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC21_ADDR", 0x00000456, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC21_MISC", 0x00000457, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC22_CTL", 0x00000458, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC22_STATUS", 0x00000459, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC22_ADDR", 0x0000045a, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC22_MISC", 0x0000045b, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC23_CTL", 0x0000045c, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC23_STATUS", 0x0000045d, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC23_ADDR", 0x0000045e, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC23_MISC", 0x0000045f, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC24_CTL", 0x00000460, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC24_STATUS", 0x00000461, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC24_ADDR", 0x00000462, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC24_MISC", 0x00000463, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC25_CTL", 0x00000464, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC25_STATUS", 0x00000465, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC25_ADDR", 0x00000466, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC25_MISC", 0x00000467, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC26_CTL", 0x00000468, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC26_STATUS", 0x00000469, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC26_ADDR", 0x0000046a, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_MC26_MISC", 0x0000046b, 0, 0xffffffffffffffffULL, NULL }, + { "MSR_MC5_CTL", 0x00000414, 0xffffffffffffffffULL, NULL }, + { "MSR_MC5_STATUS", 0x00000415, 0xffffffffffffffffULL, NULL }, + { "MSR_MC5_ADDR", 0x00000416, 0xffffffffffffffffULL, NULL }, + { "MSR_MC5_MISC", 0x00000417, 0xffffffffffffffffULL, NULL }, + { "MSR_MC6_CTL", 0x00000418, 0xffffffffffffffffULL, NULL }, + { "MSR_MC6_STATUS", 0x00000419, 0xffffffffffffffffULL, NULL }, + { "MSR_MC6_ADDR", 0x0000041a, 0xffffffffffffffffULL, NULL }, + { "MSR_MC6_MISC", 0x0000041b, 0xffffffffffffffffULL, NULL }, + { "MSR_MC7_CTL", 0x0000041c, 0xffffffffffffffffULL, NULL }, + { "MSR_MC7_STATUS", 0x0000041d, 0xffffffffffffffffULL, NULL }, + { "MSR_MC7_ADDR", 0x0000041e, 0xffffffffffffffffULL, NULL }, + { "MSR_MC7_MISC", 0x0000041f, 0xffffffffffffffffULL, NULL }, + { "MSR_MC8_CTL", 0x00000420, 0xffffffffffffffffULL, NULL }, + { "MSR_MC8_STATUS", 0x00000421, 0xffffffffffffffffULL, NULL }, + { "MSR_MC8_ADDR", 0x00000422, 0xffffffffffffffffULL, NULL }, + { "MSR_MC8_MISC", 0x00000423, 0xffffffffffffffffULL, NULL }, + { "MSR_MC9_CTL", 0x00000424, 0xffffffffffffffffULL, NULL }, + { "MSR_MC9_STATUS", 0x00000425, 0xffffffffffffffffULL, NULL }, + { "MSR_MC9_ADDR", 0x00000426, 0xffffffffffffffffULL, NULL }, + { "MSR_MC9_MISC", 0x00000427, 0xffffffffffffffffULL, NULL }, + { "MSR_MC10_CTL", 0x00000428, 0xffffffffffffffffULL, NULL }, + { "MSR_MC10_STATUS", 0x00000429, 0xffffffffffffffffULL, NULL }, + { "MSR_MC10_ADDR", 0x0000042a, 0xffffffffffffffffULL, NULL }, + { "MSR_MC10_MISC", 0x0000042b, 0xffffffffffffffffULL, NULL }, + { "MSR_MC11_CTL", 0x0000042c, 0xffffffffffffffffULL, NULL }, + { "MSR_MC11_STATUS", 0x0000042d, 0xffffffffffffffffULL, NULL }, + { "MSR_MC11_ADDR", 0x0000042e, 0xffffffffffffffffULL, NULL }, + { "MSR_MC11_MISC", 0x0000042f, 0xffffffffffffffffULL, NULL }, + { "MSR_MC12_CTL", 0x00000430, 0xffffffffffffffffULL, NULL }, + { "MSR_MC12_STATUS", 0x00000431, 0xffffffffffffffffULL, NULL }, + { "MSR_MC12_ADDR", 0x00000432, 0xffffffffffffffffULL, NULL }, + { "MSR_MC12_MISC", 0x00000433, 0xffffffffffffffffULL, NULL }, + { "MSR_MC13_CTL", 0x00000434, 0xffffffffffffffffULL, NULL }, + { "MSR_MC13_STATUS", 0x00000435, 0xffffffffffffffffULL, NULL }, + { "MSR_MC13_ADDR", 0x00000436, 0xffffffffffffffffULL, NULL }, + { "MSR_MC13_MISC", 0x00000437, 0xffffffffffffffffULL, NULL }, + { "MSR_MC14_CTL", 0x00000438, 0xffffffffffffffffULL, NULL }, + { "MSR_MC14_STATUS", 0x00000439, 0xffffffffffffffffULL, NULL }, + { "MSR_MC14_ADDR", 0x0000043a, 0xffffffffffffffffULL, NULL }, + { "MSR_MC14_MISC", 0x0000043b, 0xffffffffffffffffULL, NULL }, + { "MSR_MC15_CTL", 0x0000043c, 0xffffffffffffffffULL, NULL }, + { "MSR_MC15_STATUS", 0x0000043d, 0xffffffffffffffffULL, NULL }, + { "MSR_MC15_ADDR", 0x0000043e, 0xffffffffffffffffULL, NULL }, + { "MSR_MC15_MISC", 0x0000043f, 0xffffffffffffffffULL, NULL }, + { "MSR_MC16_CTL", 0x00000440, 0xffffffffffffffffULL, NULL }, + { "MSR_MC16_STATUS", 0x00000441, 0xffffffffffffffffULL, NULL }, + { "MSR_MC16_ADDR", 0x00000442, 0xffffffffffffffffULL, NULL }, + { "MSR_MC16_MISC", 0x00000443, 0xffffffffffffffffULL, NULL }, + { "MSR_MC17_CTL", 0x00000444, 0xffffffffffffffffULL, NULL }, + { "MSR_MC17_STATUS", 0x00000445, 0xffffffffffffffffULL, NULL }, + { "MSR_MC17_ADDR", 0x00000446, 0xffffffffffffffffULL, NULL }, + { "MSR_MC17_MISC", 0x00000447, 0xffffffffffffffffULL, NULL }, + { "MSR_MC18_CTL", 0x00000448, 0xffffffffffffffffULL, NULL }, + { "MSR_MC18_STATUS", 0x00000449, 0xffffffffffffffffULL, NULL }, + { "MSR_MC18_ADDR", 0x0000044a, 0xffffffffffffffffULL, NULL }, + { "MSR_MC18_MISC", 0x0000044b, 0xffffffffffffffffULL, NULL }, + { "MSR_MC19_CTL", 0x0000044c, 0xffffffffffffffffULL, NULL }, + { "MSR_MC19_STATUS", 0x0000044d, 0xffffffffffffffffULL, NULL }, + { "MSR_MC19_ADDR", 0x0000044e, 0xffffffffffffffffULL, NULL }, + { "MSR_MC19_MISC", 0x0000044f, 0xffffffffffffffffULL, NULL }, + { "MSR_MC20_CTL", 0x00000450, 0xffffffffffffffffULL, NULL }, + { "MSR_MC20_STATUS", 0x00000451, 0xffffffffffffffffULL, NULL }, + { "MSR_MC20_ADDR", 0x00000452, 0xffffffffffffffffULL, NULL }, + { "MSR_MC20_MISC", 0x00000453, 0xffffffffffffffffULL, NULL }, + { "MSR_MC21_CTL", 0x00000454, 0xffffffffffffffffULL, NULL }, + { "MSR_MC21_STATUS", 0x00000455, 0xffffffffffffffffULL, NULL }, + { "MSR_MC21_ADDR", 0x00000456, 0xffffffffffffffffULL, NULL }, + { "MSR_MC21_MISC", 0x00000457, 0xffffffffffffffffULL, NULL }, + { "MSR_MC22_CTL", 0x00000458, 0xffffffffffffffffULL, NULL }, + { "MSR_MC22_STATUS", 0x00000459, 0xffffffffffffffffULL, NULL }, + { "MSR_MC22_ADDR", 0x0000045a, 0xffffffffffffffffULL, NULL }, + { "MSR_MC22_MISC", 0x0000045b, 0xffffffffffffffffULL, NULL }, + { "MSR_MC23_CTL", 0x0000045c, 0xffffffffffffffffULL, NULL }, + { "MSR_MC23_STATUS", 0x0000045d, 0xffffffffffffffffULL, NULL }, + { "MSR_MC23_ADDR", 0x0000045e, 0xffffffffffffffffULL, NULL }, + { "MSR_MC23_MISC", 0x0000045f, 0xffffffffffffffffULL, NULL }, + { "MSR_MC24_CTL", 0x00000460, 0xffffffffffffffffULL, NULL }, + { "MSR_MC24_STATUS", 0x00000461, 0xffffffffffffffffULL, NULL }, + { "MSR_MC24_ADDR", 0x00000462, 0xffffffffffffffffULL, NULL }, + { "MSR_MC24_MISC", 0x00000463, 0xffffffffffffffffULL, NULL }, + { "MSR_MC25_CTL", 0x00000464, 0xffffffffffffffffULL, NULL }, + { "MSR_MC25_STATUS", 0x00000465, 0xffffffffffffffffULL, NULL }, + { "MSR_MC25_ADDR", 0x00000466, 0xffffffffffffffffULL, NULL }, + { "MSR_MC25_MISC", 0x00000467, 0xffffffffffffffffULL, NULL }, + { "MSR_MC26_CTL", 0x00000468, 0xffffffffffffffffULL, NULL }, + { "MSR_MC26_STATUS", 0x00000469, 0xffffffffffffffffULL, NULL }, + { "MSR_MC26_ADDR", 0x0000046a, 0xffffffffffffffffULL, NULL }, + { "MSR_MC26_MISC", 0x0000046b, 0xffffffffffffffffULL, NULL }, */ - { "MSR_PKG_PERF_STATUS", 0x00000613, 0, 0x00000000ffffffffULL, NULL }, - { "MSR_DRAM_POWER_LIMIT", 0x00000618, 0, 0x0000000080ffffffULL, NULL }, - { "MSR_DRAM_ENERGY_STATUS", 0x00000619, 0, 0x00000000ffffffffULL, NULL }, - { "MSR_DRAM_PERF_STATUS", 0x0000061b, 0, 0x00000000ffffffffULL, NULL }, - { "MSR_DRAM_POWER_INFO", 0x0000061c, 0, 0x00ff7fff7fff7fffULL, NULL }, - { "MSR_CONFIG_TDP_NOMINAL", 0x00000648, 0, 0x00000000000000ffULL, NULL }, - { "MSR_CONFIG_TDP_LEVEL1", 0x00000649, 0, 0x7fff7fff00ff7fffULL, NULL }, - { "MSR_CONFIG_TDP_LEVEL2", 0x0000064a, 0, 0x7fff7fff00ff7fffULL, NULL }, - { "MSR_CONFIG_TDP_CONTROL", 0x0000064b, 0, 0x0000000080000003ULL, NULL }, - { "MSR_TURBO_ACTIVATION_RATIO", 0x0000064c, 0, 0x00000000800000ffULL, NULL }, - { NULL, 0x00000000, 0, 0 , NULL }, + { "MSR_PKG_PERF_STATUS", 0x00000613, 0x00000000ffffffffULL, NULL }, + { "MSR_DRAM_POWER_LIMIT", 0x00000618, 0x0000000080ffffffULL, NULL }, + { "MSR_DRAM_ENERGY_STATUS", 0x00000619, 0x00000000ffffffffULL, NULL }, + { "MSR_DRAM_PERF_STATUS", 0x0000061b, 0x00000000ffffffffULL, NULL }, + { "MSR_DRAM_POWER_INFO", 0x0000061c, 0x00ff7fff7fff7fffULL, NULL }, + { "MSR_CONFIG_TDP_NOMINAL", 0x00000648, 0x00000000000000ffULL, NULL }, + { "MSR_CONFIG_TDP_LEVEL1", 0x00000649, 0x7fff7fff00ff7fffULL, NULL }, + { "MSR_CONFIG_TDP_LEVEL2", 0x0000064a, 0x7fff7fff00ff7fffULL, NULL }, + { "MSR_CONFIG_TDP_CONTROL", 0x0000064b, 0x0000000080000003ULL, NULL }, + { "MSR_TURBO_ACTIVATION_RATIO", 0x0000064c, 0x00000000800000ffULL, NULL }, + { NULL, 0x00000000, 0, NULL }, }; static const msr_info IA32_haswell_MSRs[] = { - { "MSR_PLATFORM_INFO", 0x000000ce, 0, 0x00ffff073000ff00ULL, NULL }, - { "IA32_TSC_ADJUST", 0x0000003b, 0, 0xffffffffffffffffULL, NULL }, - { "IA32_PERFEVTSEL0", 0x00000186, 0, 0x00000000ffffffffULL, NULL }, - { "IA32_PERFEVTSEL1", 0x00000187, 0, 0x00000000ffffffffULL, NULL }, - { "IA32_PERFEVTSEL2", 0x00000188, 0, 0x00000000ffffffffULL, NULL }, - { "IA32_PERFEVTSEL3", 0x00000189, 0, 0x00000000ffffffffULL, NULL }, - //{ "IA32_VMX_FMFUNC", 0x00000491, 0, 0, NULL }, - { "MSR_CONFIG_TDP_NOMINAL", 0x00000648, 0, 0x00000000000000ffULL, NULL }, - { "MSR_CONFIG_TDP_LEVEL1", 0x00000649, 0, 0x7fff7fff00ff7fffULL, NULL }, - { "MSR_CONFIG_TDP_LEVEL2", 0x0000064a, 0, 0x7fff7fff00ff7fffULL, NULL }, - { "MSR_CONFIG_TDP_CONTROL", 0x0000064b, 0, 0x0000000080000003ULL, NULL }, - { "MSR_TURBO_ACTIVATION_RATIO", 0x0000064c, 0, 0x00000000800000ffULL, NULL }, - { "MSR_PKG_C8_RESIDENCY", 0x00000630, 0, 0x0fffffffffffffffULL, NULL }, - { "MSR_PKG_C9_RESIDENCY", 0x00000630, 0, 0x0fffffffffffffffULL, NULL }, - { "MSR_PKG_C10_RESIDENCY", 0x00000630, 0, 0x0fffffffffffffffULL, NULL }, - { "MSR_SMM_MCA_CAP", 0x0000017d, 0, 0x0c00000000000000ULL, NULL }, - { "MSR_TURBO_RATIO_LIMIT", 0x000001ad, 0, 0x00000000ffffffffULL, NULL }, - { "MSR_UNC_PERF_GLOBAL_CTRL", 0x00000391, 0, 0x00000000e000001fULL, NULL }, - //{ "MSR_UNC_PERF_GLOBAL_STATUS",0x00000392, 0, 0x000000000000000fULL, NULL }, - { "MSR_UNC_PERF_FIXED_CTRL", 0x00000394, 0, 0x0000000005000000ULL, NULL }, - //{ "MSR_UNC_PERF_FIXED_CTR", 0x00000395, 0, 0x0000ffffffffffffULL, NULL }, - { "MSR_UNC_CB0_CONFIG", 0x00000396, 0, 0x000000000000000fULL, NULL }, - //{ "MSR_UNC_ARB_PER_CTR0", 0x000003b0, 0, 0xffffffffffffffffULL, NULL }, - //{ "MSR_UNC_ARB_PER_CTR1", 0x000003b1, 0, 0xffffffffffffffffULL, NULL }, - - //{ "MSR_UNC_ARB_PERFEVTSEL0", 0x000003b2, 0, 0xffffffffffffffffULL, NULL }, - //{ "MSR_UNC_ARB_PERFEVTSEL1", 0x000003b3, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_UNC_PERF_GLOBAL_CTRL", 0x00000391, 0, 0x00000000e000000fULL, NULL }, - { "MSR_UNC_PERF_FIXED_CTR", 0x00000395, 0, 0x0000ffffffffffffULL, NULL }, - { "MSR_SMM_FEATURE_CONTROL", 0x000004e0, 0, 0x0000000000000005ULL, NULL }, - { "MSR_SMM_DELAYED", 0x000004e2, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_SMM_BLOCKED", 0x000004e3, 0, 0xffffffffffffffffULL, NULL }, - { "MSR_PP1_POWER_LIMIT", 0x00000640, 0, 0x0000000080ffffffULL, NULL }, - { "MSR_PP1_ENERGY_STATUS", 0x00000641, 0, 0x00000000ffffffffULL, NULL }, - { "MSR_PP1_POLICY", 0x00000652, 0, 0x000000000000000fULL, NULL }, - //{ "MSR_UNC_CB0_0_PERFEVTSEL0" 0x00000700, 0, 0xffffffffffffffffULL, NULL }, - //{ "MSR_UNC_CB0_0_PERFEVTSEL1",0x00000701, 0, 0xffffffffffffffffULL, NULL }, - //{ "MSR_UNC_CB0_0_PER_CTR0", 0x00000706, 0, 0xffffffffffffffffULL, NULL },` - //{ "MSR_UNC_CB0_0_PER_CTR0", 0x00000707, 0, 0xffffffffffffffffULL, NULL },` - //{ "MSR_UNC_CB0_1_PERFEVTSEL0" 0x00000710, 0, 0xffffffffffffffffULL, NULL }, - //{ "MSR_UNC_CB0_1_PERFEVTSEL1",0x00000711, 0, 0xffffffffffffffffULL, NULL }, - //{ "MSR_UNC_CB0_1_PER_CTR0", 0x00000716, 0, 0xffffffffffffffffULL, NULL },` - //{ "MSR_UNC_CB0_1_PER_CTR0", 0x00000717, 0, 0xffffffffffffffffULL, NULL },` - //{ "MSR_UNC_CB0_1_PERFEVTSEL0" 0x00000720, 0, 0xffffffffffffffffULL, NULL }, - //{ "MSR_UNC_CB0_1_PERFEVTSEL1",0x00000721, 0, 0xffffffffffffffffULL, NULL }, - //{ "MSR_UNC_CB0_1_PER_CTR0", 0x00000726, 0, 0xffffffffffffffffULL, NULL },` - //{ "MSR_UNC_CB0_1_PER_CTR0", 0x00000727, 0, 0xffffffffffffffffULL, NULL },` - //{ "MSR_UNC_CB0_1_PERFEVTSEL0" 0x00000730, 0, 0xffffffffffffffffULL, NULL }, - //{ "MSR_UNC_CB0_1_PERFEVTSEL1",0x00000731, 0, 0xffffffffffffffffULL, NULL }, - //{ "MSR_UNC_CB0_1_PER_CTR0", 0x00000736, 0, 0xffffffffffffffffULL, NULL },` - //{ "MSR_UNC_CB0_1_PER_CTR0", 0x00000737, 0, 0xffffffffffffffffULL, NULL },` - { NULL, 0x00000000, 0, 0 , NULL }, + { "MSR_PLATFORM_INFO", 0x000000ce, 0x00ffff073000ff00ULL, NULL }, + { "IA32_TSC_ADJUST", 0x0000003b, 0xffffffffffffffffULL, NULL }, + { "IA32_PERFEVTSEL0", 0x00000186, 0x00000000ffffffffULL, NULL }, + { "IA32_PERFEVTSEL1", 0x00000187, 0x00000000ffffffffULL, NULL }, + { "IA32_PERFEVTSEL2", 0x00000188, 0x00000000ffffffffULL, NULL }, + { "IA32_PERFEVTSEL3", 0x00000189, 0x00000000ffffffffULL, NULL }, + //{ "IA32_VMX_FMFUNC", 0x00000491, 0x0000000000000000ULL, NULL }, + { "MSR_CONFIG_TDP_NOMINAL", 0x00000648, 0x00000000000000ffULL, NULL }, + { "MSR_CONFIG_TDP_LEVEL1", 0x00000649, 0x7fff7fff00ff7fffULL, NULL }, + { "MSR_CONFIG_TDP_LEVEL2", 0x0000064a, 0x7fff7fff00ff7fffULL, NULL }, + { "MSR_CONFIG_TDP_CONTROL", 0x0000064b, 0x0000000080000003ULL, NULL }, + { "MSR_TURBO_ACTIVATION_RATIO", 0x0000064c, 0x00000000800000ffULL, NULL }, + { "MSR_PKG_C8_RESIDENCY", 0x00000630, 0x0fffffffffffffffULL, NULL }, + { "MSR_PKG_C9_RESIDENCY", 0x00000630, 0x0fffffffffffffffULL, NULL }, + { "MSR_PKG_C10_RESIDENCY", 0x00000630, 0x0fffffffffffffffULL, NULL }, + { "MSR_SMM_MCA_CAP", 0x0000017d, 0x0c00000000000000ULL, NULL }, + { "MSR_TURBO_RATIO_LIMIT", 0x000001ad, 0x00000000ffffffffULL, NULL }, + { "MSR_UNC_PERF_GLOBAL_CTRL", 0x00000391, 0x00000000e000001fULL, NULL }, + //{ "MSR_UNC_PERF_GLOBAL_STATUS",0x00000392, 0x000000000000000fULL, NULL }, + { "MSR_UNC_PERF_FIXED_CTRL", 0x00000394, 0x0000000005000000ULL, NULL }, + //{ "MSR_UNC_PERF_FIXED_CTR", 0x00000395, 0x0000ffffffffffffULL, NULL }, + { "MSR_UNC_CB0_CONFIG", 0x00000396, 0x000000000000000fULL, NULL }, + //{ "MSR_UNC_ARB_PER_CTR0", 0x000003b0, 0xffffffffffffffffULL, NULL }, + //{ "MSR_UNC_ARB_PER_CTR1", 0x000003b1, 0xffffffffffffffffULL, NULL }, + + //{ "MSR_UNC_ARB_PERFEVTSEL0", 0x000003b2, 0xffffffffffffffffULL, NULL }, + //{ "MSR_UNC_ARB_PERFEVTSEL1", 0x000003b3, 0xffffffffffffffffULL, NULL }, + { "MSR_UNC_PERF_GLOBAL_CTRL", 0x00000391, 0x00000000e000000fULL, NULL }, + { "MSR_UNC_PERF_FIXED_CTR", 0x00000395, 0x0000ffffffffffffULL, NULL }, + { "MSR_SMM_FEATURE_CONTROL", 0x000004e0, 0x0000000000000005ULL, NULL }, + { "MSR_SMM_DELAYED", 0x000004e2, 0xffffffffffffffffULL, NULL }, + { "MSR_SMM_BLOCKED", 0x000004e3, 0xffffffffffffffffULL, NULL }, + { "MSR_PP1_POWER_LIMIT", 0x00000640, 0x0000000080ffffffULL, NULL }, + { "MSR_PP1_ENERGY_STATUS", 0x00000641, 0x00000000ffffffffULL, NULL }, + { "MSR_PP1_POLICY", 0x00000652, 0x000000000000000fULL, NULL }, + //{ "MSR_UNC_CB0_0_PERFEVTSEL0" 0x00000700, 0xffffffffffffffffULL, NULL }, + //{ "MSR_UNC_CB0_0_PERFEVTSEL1",0x00000701, 0xffffffffffffffffULL, NULL }, + //{ "MSR_UNC_CB0_0_PER_CTR0", 0x00000706, 0xffffffffffffffffULL, NULL },` + //{ "MSR_UNC_CB0_0_PER_CTR0", 0x00000707, 0xffffffffffffffffULL, NULL },` + //{ "MSR_UNC_CB0_1_PERFEVTSEL0" 0x00000710, 0xffffffffffffffffULL, NULL }, + //{ "MSR_UNC_CB0_1_PERFEVTSEL1",0x00000711, 0xffffffffffffffffULL, NULL }, + //{ "MSR_UNC_CB0_1_PER_CTR0", 0x00000716, 0xffffffffffffffffULL, NULL },` + //{ "MSR_UNC_CB0_1_PER_CTR0", 0x00000717, 0xffffffffffffffffULL, NULL },` + //{ "MSR_UNC_CB0_1_PERFEVTSEL0" 0x00000720, 0xffffffffffffffffULL, NULL }, + //{ "MSR_UNC_CB0_1_PERFEVTSEL1",0x00000721, 0xffffffffffffffffULL, NULL }, + //{ "MSR_UNC_CB0_1_PER_CTR0", 0x00000726, 0xffffffffffffffffULL, NULL },` + //{ "MSR_UNC_CB0_1_PER_CTR0", 0x00000727, 0xffffffffffffffffULL, NULL },` + //{ "MSR_UNC_CB0_1_PERFEVTSEL0" 0x00000730, 0xffffffffffffffffULL, NULL }, + //{ "MSR_UNC_CB0_1_PERFEVTSEL1",0x00000731, 0xffffffffffffffffULL, NULL }, + //{ "MSR_UNC_CB0_1_PER_CTR0", 0x00000736, 0xffffffffffffffffULL, NULL },` + //{ "MSR_UNC_CB0_1_PER_CTR0", 0x00000737, 0xffffffffffffffffULL, NULL },` + { NULL, 0x00000000, 0, NULL }, }; static int msr_table_check(fwts_framework *fw, const msr_info *const info) @@ -684,7 +680,7 @@ static int msr_table_check(fwts_framework *fw, const msr_info *const info) for (i = 0; info[i].name != NULL; i++) msr_consistent_check(fw, LOG_LEVEL_MEDIUM, - info[i].name, info[i].msr, info[i].shift, info[i].mask, info[i].callback); + info[i].name, info[i].msr, 0, info[i].mask, info[i].callback); return FWTS_OK; }