===================================================================
@@ -178,6 +178,9 @@
static void *ich_spibar = NULL;
+/* keep last addr of read error */
+static uint32_t last_read_warn_addr = 0xFFFFFFFF;
+
typedef struct _OPCODE {
uint8_t opcode; //This commands spi opcode
uint8_t spi_type; //This commands spi type
@@ -946,14 +949,38 @@
/* FIXME make sure we do not needlessly cause transaction errors. */
temp32 = REGREAD32(ICH9_REG_SSFS);
if (temp32 & SSFS_FCERR) {
- msg_perr("Transaction error!\n");
- prettyprint_ich9_reg_ssfs(temp32);
- prettyprint_ich9_reg_ssfc(temp32);
- /* keep reserved bits */
- temp32 &= SSFS_RESERVED_MASK | SSFC_RESERVED_MASK;
- /* Clear the transaction error. */
- REGWRITE32(ICH9_REG_SSFS, temp32 | SSFS_FCERR);
- return 1;
+ if (ichspi_lock && op.spi_type == SPI_OPCODE_TYPE_READ_WITH_ADDRESS) {
+ /* keep reserved bits */
+ temp32 &= SSFS_RESERVED_MASK | SSFC_RESERVED_MASK;
+ /* Clear the transaction error. */
+ REGWRITE32(ICH9_REG_SSFS, temp32 | SSFS_FCERR);
+ if (last_read_warn_addr != 0xFFFFFFFF) {
+ if (last_read_warn_addr == (offset - 1)) {
+ /* continuing */
+ last_read_warn_addr = offset + datalength - 1;
+ } else {
+ msg_pdbg("-0x%06x, ignored\n", last_read_warn_addr);
+ last_read_warn_addr = 0xFFFFFFFF;
+ }
+ } else {
+ msg_pdbg("Transaction (READ) error at address 0x%06x", offset);
+ last_read_warn_addr = offset + datalength - 1;
+ }
+ } else {
+ prettyprint_ich9_reg_ssfs(temp32);
+ prettyprint_ich9_reg_ssfc(temp32);
+ /* keep reserved bits */
+ temp32 &= SSFS_RESERVED_MASK | SSFC_RESERVED_MASK;
+ /* Clear the transaction error. */
+ REGWRITE32(ICH9_REG_SSFS, temp32 | SSFS_FCERR);
+ msg_perr("Transaction error!\n");
+ return 1;
+ }
+ } else {
+ if (last_read_warn_addr != 0xFFFFFFFF) {
+ msg_pdbg("-0x%06x, ignored\n", last_read_warn_addr);
+ last_read_warn_addr = 0xFFFFFFFF;
+ }
}
if ((!write_cmd) && (datalength != 0))