| Message ID | CAPRFbJbPmumomdbfAc3B13wE5TkGStVG7yXBmw-_wf_7ChrW6A@mail.gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | add support for IS25LP016 | expand |
Hello Ondrej, Thanks for your patch! We are using Gerrit for code reviews, if you could push your changes to Gerrit it would be great! Instructions here: https://flashrom.org/Development_Guidelines#Set_up_your_Gerrit_account_on_review.coreboot.org Anastasia. On Fri, Sep 10, 2021 at 4:23 AM Ondrej Hennel <ondrej.hennel@gmail.com> wrote: > Hi. I added support for IS25LP016 by copying the configuration from > IS25LP064 and modifying it. I'm not sure if the feature_bits are set > correctly, but writing, reading and erasing works fine. > > Ondrej Hennel > > From af04e4f19ff01084be6b4bbb69cf1bdb7513cf67 Mon Sep 17 00:00:00 2001 > From: Ondrej Hennel <ondrej.hennel@gmail.com> > Date: Thu, 9 Sep 2021 14:24:36 +0200 > Subject: [PATCH] add support for IS25LP016 > > Signed-off-by: Ondrej Hennel <ondrej.hennel@gmail.com> > --- > flashchips.c | 41 +++++++++++++++++++++++++++++++++++++++++ > flashchips.h | 1 + > 2 files changed, 42 insertions(+) > > diff --git a/flashchips.c b/flashchips.c > index 3187a49..467e55d 100644 > --- a/flashchips.c > +++ b/flashchips.c > @@ -7301,6 +7301,47 @@ const struct flashchip flashchips[] = { > .voltage = {4500, 5500}, > }, > > + { > + .vendor = "ISSI", > + .name = "IS25LP016", > + .bustype = BUS_SPI, > + .manufacture_id = ISSI_ID_SPI, > + .model_id = ISSI_IS25LP016, > + .total_size = 2048, > + .page_size = 256, > + /* OTP: 1024B total; read 0x48; write 0x42 */ > + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, > + .tested = TEST_UNTESTED, > + .probe = probe_spi_rdid, > + .probe_timing = TIMING_ZERO, > + .block_erasers = > + { > + { > + .eraseblocks = { {4 * 1024, 512} }, > + .block_erase = spi_block_erase_20, > + }, { > + .eraseblocks = { {4 * 1024, 512} }, > + .block_erase = spi_block_erase_d7, > + }, { > + .eraseblocks = { {32 * 1024, 64} }, > + .block_erase = spi_block_erase_52, > + }, { > + .eraseblocks = { {64 * 1024, 32} }, > + .block_erase = spi_block_erase_d8, > + }, { > + .eraseblocks = { {2 * 1024 * 1024, 1} }, > + .block_erase = spi_block_erase_60, > + }, { > + .eraseblocks = { {2 * 1024 * 1024, 1} }, > + .block_erase = spi_block_erase_c7, > + } > + }, > + .unlock = spi_disable_blockprotect, > + .write = spi_chip_write_256, > + .read = spi_chip_read, > + .voltage = {2300, 3600}, > + }, > + > { > .vendor = "ISSI", > .name = "IS25LP064", > diff --git a/flashchips.h b/flashchips.h > index e190dca..f87e30e 100644 > --- a/flashchips.h > +++ b/flashchips.h > @@ -472,6 +472,7 @@ > > #define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions, > see also PMC. */ > #define ISSI_ID_SPI 0x9D /* ISSI ID used for SPI flash, see > also PMC_ID_NOPREFIX */ > +#define ISSI_IS25LP016 0x6015 > #define ISSI_IS25LP064 0x6017 > #define ISSI_IS25LP128 0x6018 > #define ISSI_IS25LP256 0x6019 > -- > 2.25.1 > _______________________________________________ > flashrom mailing list -- flashrom@flashrom.org > To unsubscribe send an email to flashrom-leave@flashrom.org >
Hi Ondrej, thanks for your patch. As Anastasia mentioned, it would be nice if you would use our Gerrit instance. It's not a requirement, though; I think we can review smaller patches on the mailing list just fine. OTOH, it might be easier to use Gerrit and Git directly, this way you could avoid technical issues... ... as somehow the patch got mangled, all the tabs are replaced with spaces and some long lines are broken. Aside from this I have only two comments, inline below. On 09.09.21 14:38, Ondrej Hennel wrote: > Hi. I added support for IS25LP016 by copying the configuration from > IS25LP064 and modifying it. I'm not sure if the feature_bits are set > correctly, but writing, reading and erasing works fine. > > Ondrej Hennel > > From af04e4f19ff01084be6b4bbb69cf1bdb7513cf67 Mon Sep 17 00:00:00 2001 > From: Ondrej Hennel <ondrej.hennel@gmail.com> > Date: Thu, 9 Sep 2021 14:24:36 +0200 > Subject: [PATCH] add support for IS25LP016 > > Signed-off-by: Ondrej Hennel <ondrej.hennel@gmail.com> > --- > flashchips.c | 41 +++++++++++++++++++++++++++++++++++++++++ > flashchips.h | 1 + > 2 files changed, 42 insertions(+) > > diff --git a/flashchips.c b/flashchips.c > index 3187a49..467e55d 100644 > --- a/flashchips.c > +++ b/flashchips.c > @@ -7301,6 +7301,47 @@ const struct flashchip flashchips[] = { > .voltage = {4500, 5500}, > }, > > + { > + .vendor = "ISSI", > + .name = "IS25LP016", > + .bustype = BUS_SPI, > + .manufacture_id = ISSI_ID_SPI, > + .model_id = ISSI_IS25LP016, > + .total_size = 2048, > + .page_size = 256, > + /* OTP: 1024B total; read 0x48; write 0x42 */ > + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, > + .tested = TEST_UNTESTED, As you mentioned, it's working. So this should be TEST_OK_PREW. > + .probe = probe_spi_rdid, > + .probe_timing = TIMING_ZERO, > + .block_erasers = > + { > + { > + .eraseblocks = { {4 * 1024, 512} }, > + .block_erase = spi_block_erase_20, > + }, { > + .eraseblocks = { {4 * 1024, 512} }, > + .block_erase = spi_block_erase_d7, > + }, { > + .eraseblocks = { {32 * 1024, 64} }, > + .block_erase = spi_block_erase_52, > + }, { > + .eraseblocks = { {64 * 1024, 32} }, > + .block_erase = spi_block_erase_d8, > + }, { > + .eraseblocks = { {2 * 1024 * 1024, 1} }, > + .block_erase = spi_block_erase_60, > + }, { > + .eraseblocks = { {2 * 1024 * 1024, 1} }, > + .block_erase = spi_block_erase_c7, > + } > + }, > + .unlock = spi_disable_blockprotect, The datasheets mentions an SRWD bit, so I guess this should be spi_disable_blockprotect_bp3_srwd. Please test this and attach a verbose log. Nico > + .write = spi_chip_write_256, > + .read = spi_chip_read, > + .voltage = {2300, 3600}, > + }, > + > { > .vendor = "ISSI", > .name = "IS25LP064", > diff --git a/flashchips.h b/flashchips.h > index e190dca..f87e30e 100644 > --- a/flashchips.h > +++ b/flashchips.h > @@ -472,6 +472,7 @@ > > #define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions, > see also PMC. */ > #define ISSI_ID_SPI 0x9D /* ISSI ID used for SPI flash, see also > PMC_ID_NOPREFIX */ > +#define ISSI_IS25LP016 0x6015 > #define ISSI_IS25LP064 0x6017 > #define ISSI_IS25LP128 0x6018 > #define ISSI_IS25LP256 0x6019 > > > _______________________________________________ > flashrom mailing list -- flashrom@flashrom.org > To unsubscribe send an email to flashrom-leave@flashrom.org >
diff --git a/flashchips.c b/flashchips.c index 3187a49..467e55d 100644 --- a/flashchips.c +++ b/flashchips.c @@ -7301,6 +7301,47 @@ const struct flashchip flashchips[] = { .voltage = {4500, 5500}, }, + { + .vendor = "ISSI", + .name = "IS25LP016", + .bustype = BUS_SPI, + .manufacture_id = ISSI_ID_SPI, + .model_id = ISSI_IS25LP016, + .total_size = 2048, + .page_size = 256, + /* OTP: 1024B total; read 0x48; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {32 * 1024, 64} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {2300, 3600}, + }, + { .vendor = "ISSI", .name = "IS25LP064", diff --git a/flashchips.h b/flashchips.h index e190dca..f87e30e 100644 --- a/flashchips.h +++ b/flashchips.h @@ -472,6 +472,7 @@ #define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions, see also PMC. */ #define ISSI_ID_SPI 0x9D /* ISSI ID used for SPI flash, see also PMC_ID_NOPREFIX */ +#define ISSI_IS25LP016 0x6015 #define ISSI_IS25LP064 0x6017