From patchwork Thu Jul 16 15:27:53 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cyrille Pitchen X-Patchwork-Id: 496744 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 8A1F41402B8 for ; Fri, 17 Jul 2015 01:28:59 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752174AbbGPP2o (ORCPT ); Thu, 16 Jul 2015 11:28:44 -0400 Received: from eusmtp01.atmel.com ([212.144.249.243]:20631 "EHLO eusmtp01.atmel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754545AbbGPP1x (ORCPT ); Thu, 16 Jul 2015 11:27:53 -0400 Received: from tenerife.corp.atmel.com (10.161.101.13) by eusmtp01.atmel.com (10.161.101.31) with Microsoft SMTP Server id 14.3.235.1; Thu, 16 Jul 2015 17:27:47 +0200 From: Cyrille Pitchen To: , , , , , , , , , , CC: , , , , , , , , , Cyrille Pitchen Subject: [PATCH 6/7] Documentation: atmel-quadspi: add binding file for Atmel QSPI driver Date: Thu, 16 Jul 2015 17:27:53 +0200 Message-ID: X-Mailer: git-send-email 1.8.2.2 In-Reply-To: References: MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch documents the DT bindings for the driver of the Atmel QSPI controller embedded inside sama5d2x SoCs. Signed-off-by: Cyrille Pitchen --- .../devicetree/bindings/mtd/atmel-quadspi.txt | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/atmel-quadspi.txt diff --git a/Documentation/devicetree/bindings/mtd/atmel-quadspi.txt b/Documentation/devicetree/bindings/mtd/atmel-quadspi.txt new file mode 100644 index 000000000000..a0d60ac7ae10 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/atmel-quadspi.txt @@ -0,0 +1,29 @@ +* Atmel Quad Serial Peripheral Interface (QSPI) + +Required properties: + - compatible : Should be "atmel,sama5d2-qspi" + - reg : the first contains the register location and length, + the second contains the memory mapping address and length + - interrupts : Should contain the interrupt for the device + - clocks : The clock needed by the QSPI controller + - #address-cells : should be 1 + - #size-cells : should be 0 + +Example: + +qspi0: qspi@f0020000 { + compatible = "atmel,sama5d2-qspi"; + reg = <0xf0020000 0x100>, + <0xd0000000 0x08000000>; + interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&qspi0_clk>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi0_default>; + status = "okay"; + + m25p80@0 { + ... + }; +};