From patchwork Tue Mar 7 18:26:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robin Murphy X-Patchwork-Id: 736321 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3vd4sv1j9Sz9sN5 for ; Wed, 8 Mar 2017 05:28:35 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755613AbdCGS1F (ORCPT ); Tue, 7 Mar 2017 13:27:05 -0500 Received: from foss.arm.com ([217.140.101.70]:51196 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755444AbdCGS0r (ORCPT ); Tue, 7 Mar 2017 13:26:47 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DF9F81424; Tue, 7 Mar 2017 10:26:45 -0800 (PST) Received: from e110467-lin.cambridge.arm.com (e110467-lin.cambridge.arm.com [10.1.210.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 9F3C93F220; Tue, 7 Mar 2017 10:26:44 -0800 (PST) From: Robin Murphy To: will.deacon@arm.com Cc: iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, nipun.gupta@nxp.com, devicetree@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com Subject: [PATCH] iommu/arm-smmu: Add global SMR masking property Date: Tue, 7 Mar 2017 18:26:28 +0000 Message-Id: X-Mailer: git-send-email 2.11.0.dirty Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The current SMR masking support using a 2-cell iommu-specifier is primarily intended to handle individual masters with large and/or complex Stream ID assignments; it quickly gets a bit clunky in other SMR use-cases where we just want to consistently mask out the same part of every Stream ID (e.g. for MMU-500 configurations where the appended TBU number gets in the way unnecessarily). Let's add a new property to allow a single global mask value to better fit the latter situation. Tested-by: Nipun Gupta Signed-off-by: Robin Murphy --- Time to rekindle the discussion about whether an architecture-level concept with a rather specific name needs a vendor prefix ;) Robin. Documentation/devicetree/bindings/iommu/arm,smmu.txt | 10 ++++++++++ drivers/iommu/arm-smmu.c | 4 +++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt index 6cdf32d037fc..d66f355e174f 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt @@ -60,6 +60,16 @@ conditions. aliases of secure registers have to be used during SMMU configuration. +- stream-match-mask : Specifies a fixed SMR mask value to combine with + the Stream ID value from every iommu-specifier. This + may be used instead of an "#iommu-cells" value of 2 + when there is no need for per-master SMR masks, but + it is still desired to mask some portion of every + Stream ID (e.g. for certain MMU-500 configurations + given globally unique external IDs). This property is + not valid for SMMUs using stream indexing, and may be + ignored if stream matching is not supported. + ** Deprecated properties: - mmu-masters (deprecated in favour of the generic "iommus" binding) : diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index abf6496843a6..e394d55146a6 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1590,13 +1590,15 @@ static int arm_smmu_domain_set_attr(struct iommu_domain *domain, static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args) { - u32 fwid = 0; + u32 mask, fwid = 0; if (args->args_count > 0) fwid |= (u16)args->args[0]; if (args->args_count > 1) fwid |= (u16)args->args[1] << SMR_MASK_SHIFT; + else if (!of_property_read_u32(args->np, "stream-match-mask", &mask)) + fwid |= (u16)mask << SMR_MASK_SHIFT; return iommu_fwspec_add_ids(dev, &fwid, 1); }