diff mbox series

[1/2] dt: update Marvell Armada 38x COMPHY binding

Message ID E1jqIlJ-0007rM-Oe@rmk-PC.armlinux.org.uk
State Not Applicable
Headers show
Series Fix Armada 38x mvneta lockups when switching speeds | expand

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Context Check Description
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Commit Message

Russell King June 30, 2020, 4:05 p.m. UTC
Update the Marvell Armada 38x COMPHY binding with an additional
optional register pair describing the location of an undocumented
system register controlling something to do with the Gigabit Ethernet
and COMPHY.  There is one bit for each COMPHY lane that may be using
the serdes, but exactly what this register does is completely unknown.

This register only appears to exist on Armada 38x devices, and not
other SoCs using the NETA ethernet block, so it seems logical that it
should be part of the COMPHY.

This is also how u-boot groups this register; it is dealt with as part
of the COMPHY initialisation there.

However, at the end of the day, due to the undocumented nature of this
register, we can only guess.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
 .../devicetree/bindings/phy/phy-armada38x-comphy.txt   | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

Comments

Russell King - ARM Linux admin July 9, 2020, 10:28 a.m. UTC | #1
Rob?

On Tue, Jun 30, 2020 at 05:05:33PM +0100, Russell King wrote:
> Update the Marvell Armada 38x COMPHY binding with an additional
> optional register pair describing the location of an undocumented
> system register controlling something to do with the Gigabit Ethernet
> and COMPHY.  There is one bit for each COMPHY lane that may be using
> the serdes, but exactly what this register does is completely unknown.
> 
> This register only appears to exist on Armada 38x devices, and not
> other SoCs using the NETA ethernet block, so it seems logical that it
> should be part of the COMPHY.
> 
> This is also how u-boot groups this register; it is dealt with as part
> of the COMPHY initialisation there.
> 
> However, at the end of the day, due to the undocumented nature of this
> register, we can only guess.
> 
> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
> ---
>  .../devicetree/bindings/phy/phy-armada38x-comphy.txt   | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-armada38x-comphy.txt b/Documentation/devicetree/bindings/phy/phy-armada38x-comphy.txt
> index ad49e5c01334..8b5a7a28a35b 100644
> --- a/Documentation/devicetree/bindings/phy/phy-armada38x-comphy.txt
> +++ b/Documentation/devicetree/bindings/phy/phy-armada38x-comphy.txt
> @@ -12,6 +12,13 @@ PCIe...).
>  - #address-cells: should be 1.
>  - #size-cells: should be 0.
>  
> +Optional properties:
> +
> +- reg-names: must be "comphy" as the first name, and "conf".
> +- reg: must contain the comphy register location and length as the first
> +    pair, followed by an optional configuration register address and
> +    length pair.
> +
>  A sub-node is required for each comphy lane provided by the comphy.
>  
>  Required properties (child nodes):
> @@ -24,7 +31,8 @@ A sub-node is required for each comphy lane provided by the comphy.
>  
>  	comphy: phy@18300 {
>  		compatible = "marvell,armada-380-comphy";
> -		reg = <0x18300 0x100>;
> +		reg-names = "comphy", "conf";
> +		reg = <0x18300 0x100>, <0x18460 4>;
>  		#address-cells = <1>;
>  		#size-cells = <0>;
>  
> -- 
> 2.20.1
> 
>
Rob Herring July 15, 2020, 8:33 p.m. UTC | #2
On Tue, 30 Jun 2020 17:05:33 +0100, Russell King wrote:
> Update the Marvell Armada 38x COMPHY binding with an additional
> optional register pair describing the location of an undocumented
> system register controlling something to do with the Gigabit Ethernet
> and COMPHY.  There is one bit for each COMPHY lane that may be using
> the serdes, but exactly what this register does is completely unknown.
> 
> This register only appears to exist on Armada 38x devices, and not
> other SoCs using the NETA ethernet block, so it seems logical that it
> should be part of the COMPHY.
> 
> This is also how u-boot groups this register; it is dealt with as part
> of the COMPHY initialisation there.
> 
> However, at the end of the day, due to the undocumented nature of this
> register, we can only guess.
> 
> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
> ---
>  .../devicetree/bindings/phy/phy-armada38x-comphy.txt   | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 

Acked-by: Rob Herring <robh@kernel.org>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/phy/phy-armada38x-comphy.txt b/Documentation/devicetree/bindings/phy/phy-armada38x-comphy.txt
index ad49e5c01334..8b5a7a28a35b 100644
--- a/Documentation/devicetree/bindings/phy/phy-armada38x-comphy.txt
+++ b/Documentation/devicetree/bindings/phy/phy-armada38x-comphy.txt
@@ -12,6 +12,13 @@  PCIe...).
 - #address-cells: should be 1.
 - #size-cells: should be 0.
 
+Optional properties:
+
+- reg-names: must be "comphy" as the first name, and "conf".
+- reg: must contain the comphy register location and length as the first
+    pair, followed by an optional configuration register address and
+    length pair.
+
 A sub-node is required for each comphy lane provided by the comphy.
 
 Required properties (child nodes):
@@ -24,7 +31,8 @@  A sub-node is required for each comphy lane provided by the comphy.
 
 	comphy: phy@18300 {
 		compatible = "marvell,armada-380-comphy";
-		reg = <0x18300 0x100>;
+		reg-names = "comphy", "conf";
+		reg = <0x18300 0x100>, <0x18460 4>;
 		#address-cells = <1>;
 		#size-cells = <0>;