| Message ID | 6ff37629458cde4549067e0caddeb5cb640ca7f9.1701044106.git.unicorn_wang@outlook.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | riscv: sophgo: add clock support for sg2042 | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On 27/11/2023 01:58, Chen Wang wrote: > From: Chen Wang <unicorn_wang@outlook.com> > > Add documentation to describe Sophgo System Controller Registers for > SG2042. > > Signed-off-by: Chen Wang <unicorn_wang@outlook.com> > --- > .../soc/sophgo/sophgo,sg2042-syscon.yaml | 58 +++++++++++++++++++ > 1 file changed, 58 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml > > diff --git a/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml > new file mode 100644 > index 000000000000..329d645091b4 > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml > @@ -0,0 +1,58 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/soc/sophgo/sophgo,sg2042-syscon.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Sophgo SG2042 SoC system controller > + > +maintainers: > + - Chen Wang <unicorn_wang@outlook.com> > + > +description: > + The Sophgo SG2042 SoC system controller provides register information such > + as offset, mask and shift to configure some modules, such as clocks, reset > + signals and pinctrl. > + > +properties: > + compatible: > + items: > + - enum: > + - sophgo,sg2042-syscon > + - const: syscon > + > + reg: > + maxItems: 1 > + > + clock-controller: > + # Child node > + type: object > + $ref: ../../clock/sophgo/sophgo,sg2042-clkgen.yaml Use full path, so /schemas/clock/ (look at other bindings how they do it) > + description: > + Clock controller for the SoC clocks. This child node definition > + should follow the bindings specified in > + Documentation/devicetree/bindings/clock/sophgo/sophgo,sg2042-clkgen.yaml Drop description. > + > +required: > + - compatible > + - reg clock-controller, no? > + > +additionalProperties: false > + > +examples: > + - | > + syscon@30010000 { > + compatible = "sophgo,sg2042-syscon", "syscon"; > + reg = <0x30010000 0x1000>; > + }; > + > + syscon@30020000 { > + compatible = "sophgo,sg2042-syscon", "syscon"; Wait, these are two different devices. Why do you use the same compatible for them? Is their register layout exactly the same? Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml new file mode 100644 index 000000000000..329d645091b4 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-syscon.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/sophgo/sophgo,sg2042-syscon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo SG2042 SoC system controller + +maintainers: + - Chen Wang <unicorn_wang@outlook.com> + +description: + The Sophgo SG2042 SoC system controller provides register information such + as offset, mask and shift to configure some modules, such as clocks, reset + signals and pinctrl. + +properties: + compatible: + items: + - enum: + - sophgo,sg2042-syscon + - const: syscon + + reg: + maxItems: 1 + + clock-controller: + # Child node + type: object + $ref: ../../clock/sophgo/sophgo,sg2042-clkgen.yaml + description: + Clock controller for the SoC clocks. This child node definition + should follow the bindings specified in + Documentation/devicetree/bindings/clock/sophgo/sophgo,sg2042-clkgen.yaml + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + syscon@30010000 { + compatible = "sophgo,sg2042-syscon", "syscon"; + reg = <0x30010000 0x1000>; + }; + + syscon@30020000 { + compatible = "sophgo,sg2042-syscon", "syscon"; + reg = <0x30020000 0x1000>; + + clock-controller { + compatible = "sophgo,sg2042-clkgen"; + clocks = <&osc>; + #clock-cells = <1>; + }; + };