| Message ID | 20240411165801.143160-2-fabio.aiuto@engicam.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v3,1/2] regulator: dt-bindings: pca9450: add PMIC_RST_B warm reset property | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On 11/04/2024 18:58, Fabio Aiuto wrote: > Add property to trigger warm reset on PMIC_RST_B assertion > That's rather vague and does not tell me much why this is supposed to be board level configuration. It sounds more like a debugging feature: during development you want to retain memory contents for pstore etc. Then I could imagine this should be turned runtime, e.g. via sysfs/debugfs, because for example you want to start inspecting a customer's device. Best regards, Krzysztof
Dear Krzysztof, Il Thu, Apr 11, 2024 at 09:52:12PM +0200, Krzysztof Kozlowski ha scritto: > On 11/04/2024 18:58, Fabio Aiuto wrote: > > Add property to trigger warm reset on PMIC_RST_B assertion > > > > That's rather vague and does not tell me much why this is supposed to be > board level configuration. It sounds more like a debugging feature: > during development you want to retain memory contents for pstore etc. > Then I could imagine this should be turned runtime, e.g. via > sysfs/debugfs, because for example you want to start inspecting a > customer's device. thanks, I spent too few time writing this commit log and I apologize for that. I was thinking about something like: The default configuration of the PMIC behavior makes the PMIC power cycle most regulators on PMIC_RST_B assertion. This power cycling causes the memory contents of OCRAM to be lost. Some systems needs some memory that survives reset and reboot, therefore add a property to tell PMIC_RST_B is wired. The actual configuration is made at probe time, anyway we need to override the default behavior of the pmic to get a warm reset everytime the PMIC_RST_B pin is asserted and this property tells us that "something is wired to that pin" and "it has to behave that way on pin assertion". Our use cases do not meet the need of further runtime configuration change. Maybe this patchset is a simple starting point... kindly waiting for you reply before submitting v4. best regards, fabio > > Best regards, > Krzysztof >
On 12/04/2024 09:21, Fabio Aiuto wrote: > Dear Krzysztof, > > Il Thu, Apr 11, 2024 at 09:52:12PM +0200, Krzysztof Kozlowski ha scritto: >> On 11/04/2024 18:58, Fabio Aiuto wrote: >>> Add property to trigger warm reset on PMIC_RST_B assertion >>> >> >> That's rather vague and does not tell me much why this is supposed to be >> board level configuration. It sounds more like a debugging feature: >> during development you want to retain memory contents for pstore etc. >> Then I could imagine this should be turned runtime, e.g. via >> sysfs/debugfs, because for example you want to start inspecting a >> customer's device. > > thanks, I spent too few time writing this commit log and I apologize > for that. I was thinking about something like: > > The default configuration of the PMIC behavior makes the PMIC > power cycle most regulators on PMIC_RST_B assertion. This power > cycling causes the memory contents of OCRAM to be lost. > Some systems needs some memory that survives reset and > reboot, therefore add a property to tell PMIC_RST_B is > wired. > > The actual configuration is made at probe time, anyway we need > to override the default behavior of the pmic to get a warm reset > everytime the PMIC_RST_B pin is asserted and this property tells > us that "something is wired to that pin" and "it has to behave > that way on pin assertion". Our use cases do not meet the need > of further runtime configuration change. What is the use case? Sorry, you did not bring any further argument why this is board specific. And please don't explain how probing works, but address the problem here: why type of reset is specific to board design. To me it is OS policy. Best regards, Krzysztof
Dear Krzysztof, Il Sat, Apr 13, 2024 at 12:58:35PM +0200, Krzysztof Kozlowski ha scritto: > On 12/04/2024 09:21, Fabio Aiuto wrote: > > Dear Krzysztof, > > > > Il Thu, Apr 11, 2024 at 09:52:12PM +0200, Krzysztof Kozlowski ha scritto: > >> On 11/04/2024 18:58, Fabio Aiuto wrote: > >>> Add property to trigger warm reset on PMIC_RST_B assertion > >>> > >> > >> That's rather vague and does not tell me much why this is supposed to be > >> board level configuration. It sounds more like a debugging feature: > >> during development you want to retain memory contents for pstore etc. > >> Then I could imagine this should be turned runtime, e.g. via > >> sysfs/debugfs, because for example you want to start inspecting a > >> customer's device. > > > > thanks, I spent too few time writing this commit log and I apologize > > for that. I was thinking about something like: > > > > The default configuration of the PMIC behavior makes the PMIC > > power cycle most regulators on PMIC_RST_B assertion. This power > > cycling causes the memory contents of OCRAM to be lost. > > Some systems needs some memory that survives reset and > > reboot, therefore add a property to tell PMIC_RST_B is > > wired. > > > > The actual configuration is made at probe time, anyway we need > > to override the default behavior of the pmic to get a warm reset > > everytime the PMIC_RST_B pin is asserted and this property tells > > us that "something is wired to that pin" and "it has to behave > > that way on pin assertion". Our use cases do not meet the need > > of further runtime configuration change. > > What is the use case? I just have an external power button connected to that pin, it works either with warm reset and cold-reset-except-ldo12. Moreover the default behavior is cold reset and not reset-disabled. Anyway I thought it was useful for other people to add a property selecting behavior for that pin too as was done for WDOG_B. That's why I mainly duplicated the logic. If there is a pin adding a reset source it's a good point to provide a way to access the register bits related to this signal. > > Sorry, you did not bring any further argument why this is board > specific. And please don't explain how probing works, but address the > problem here: why type of reset is specific to board design. To me it is > OS policy. > Why reset type is specific to board design? I'm sorry but I don't know what you mean, as said my intention was to enlarge the number of configurable bits in pca9450 register space hoping this would be useful for someone. All I can say is that is specific to board design for the same reason the wdog_b- reset type was specific to board design. Thank you for your time, fabio > Best regards, > Krzysztof >
On 13/04/2024 19:10, Fabio Aiuto wrote: > Dear Krzysztof, > > Il Sat, Apr 13, 2024 at 12:58:35PM +0200, Krzysztof Kozlowski ha scritto: >> On 12/04/2024 09:21, Fabio Aiuto wrote: >>> Dear Krzysztof, >>> >>> Il Thu, Apr 11, 2024 at 09:52:12PM +0200, Krzysztof Kozlowski ha scritto: >>>> On 11/04/2024 18:58, Fabio Aiuto wrote: >>>>> Add property to trigger warm reset on PMIC_RST_B assertion >>>>> >>>> >>>> That's rather vague and does not tell me much why this is supposed to be >>>> board level configuration. It sounds more like a debugging feature: >>>> during development you want to retain memory contents for pstore etc. >>>> Then I could imagine this should be turned runtime, e.g. via >>>> sysfs/debugfs, because for example you want to start inspecting a >>>> customer's device. >>> >>> thanks, I spent too few time writing this commit log and I apologize >>> for that. I was thinking about something like: >>> >>> The default configuration of the PMIC behavior makes the PMIC >>> power cycle most regulators on PMIC_RST_B assertion. This power >>> cycling causes the memory contents of OCRAM to be lost. >>> Some systems needs some memory that survives reset and >>> reboot, therefore add a property to tell PMIC_RST_B is >>> wired. >>> >>> The actual configuration is made at probe time, anyway we need >>> to override the default behavior of the pmic to get a warm reset >>> everytime the PMIC_RST_B pin is asserted and this property tells >>> us that "something is wired to that pin" and "it has to behave >>> that way on pin assertion". Our use cases do not meet the need >>> of further runtime configuration change. >> >> What is the use case? > > I just have an external power button connected to that pin, it works > either with warm reset and cold-reset-except-ldo12. Moreover the default behavior > is cold reset and not reset-disabled. Anyway I thought it was useful for other > people to add a property selecting behavior for that pin too as was done for > WDOG_B. That's why I mainly duplicated the logic. If there is a pin adding a > reset source it's a good point to provide a way to access the register bits > related to this signal. I don't understand what is the use case. You wrote runtime does not solve your use case. What is the use case? > >> >> Sorry, you did not bring any further argument why this is board >> specific. And please don't explain how probing works, but address the >> problem here: why type of reset is specific to board design. To me it is >> OS policy. >> > > Why reset type is specific to board design? I'm sorry but I don't know > what you mean, as said my intention was to enlarge the number of configurable > bits in pca9450 register space hoping this would be useful for someone. > > All I can say is that is specific to board design for the same reason the > wdog_b- reset type was specific to board design. Specific to board design means different boards have somehow different configuration/schematics/layout/hardware meaning they need this property to configure device differently. I already said it implicitly, but let's reiterate: Devicetree is for hardware properties, not OS policies. I also said, so repeating the same argument, the choice how you want to reboot the system based on button press, sounds like debugging choice thus runtime suits better. Unless you want to say there are two signals and you want to configure them differently? But that's your job to explain it, not mine. Best regards, Krzysztof
Dear Krzysztof, Il Sat, Apr 13, 2024 at 11:40:18PM +0200, Krzysztof Kozlowski ha scritto: > On 13/04/2024 19:10, Fabio Aiuto wrote: > > Dear Krzysztof, > > > > Il Sat, Apr 13, 2024 at 12:58:35PM +0200, Krzysztof Kozlowski ha scritto: > >> On 12/04/2024 09:21, Fabio Aiuto wrote: > >>> Dear Krzysztof, > >>> > >>> Il Thu, Apr 11, 2024 at 09:52:12PM +0200, Krzysztof Kozlowski ha scritto: > >>>> On 11/04/2024 18:58, Fabio Aiuto wrote: <snip> > I don't understand what is the use case. You wrote runtime does not > solve your use case. What is the use case? We experimented problems on some boards with SD card, if a cold reset is done when the card is powered back on it completely freezes, the way devices behave when unpowered for such short intervals is design specific, not an OS policy. kr, fabio > > > >> > >> Sorry, you did not bring any further argument why this is board > >> specific. And please don't explain how probing works, but address the > >> problem here: why type of reset is specific to board design. To me it is > >> OS policy. > >> > > > > Why reset type is specific to board design? I'm sorry but I don't know > > what you mean, as said my intention was to enlarge the number of configurable > > bits in pca9450 register space hoping this would be useful for someone. > > > > All I can say is that is specific to board design for the same reason the > > wdog_b- reset type was specific to board design. > > Specific to board design means different boards have somehow different > configuration/schematics/layout/hardware meaning they need this property > to configure device differently. > > I already said it implicitly, but let's reiterate: Devicetree is for > hardware properties, not OS policies. > > I also said, so repeating the same argument, the choice how you want to > reboot the system based on button press, sounds like debugging choice > thus runtime suits better. > > Unless you want to say there are two signals and you want to configure > them differently? But that's your job to explain it, not mine. please see above, kr, fabio > > Best regards, > Krzysztof >
diff --git a/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml b/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml index 849bfa50bdba..865b259dac37 100644 --- a/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml @@ -93,6 +93,12 @@ properties: When WDOG_B signal is asserted a warm reset will be done instead of cold reset. + nxp,pmic-rst-b-warm-reset: + type: boolean + description: + When PMIC_RST_B signal is asserted a warm reset will be done instead of cold + reset. + required: - compatible - reg
Add property to trigger warm reset on PMIC_RST_B assertion Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Mirko Ardinghi <mirko.ardinghi@engicam.com> Signed-off-by: Fabio Aiuto <fabio.aiuto@engicam.com> --- .../bindings/regulator/nxp,pca9450-regulator.yaml | 6 ++++++ 1 file changed, 6 insertions(+)