| Message ID | 20240409190833.3485824-4-mr.nuke.me@gmail.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [v2,1/7] dt-bindings: clock: Add PCIe pipe related clocks for IPQ9574 | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On 09/04/2024 21:08, Alexandru Gagniuc wrote: > IPQ9574 has PCIe controllers which are almost identical to IPQ6018. > The only difference is that the "iface" clock is not required. > Document this difference along with the compatible string. > > Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> > --- > .../devicetree/bindings/pci/qcom,pcie.yaml | 34 +++++++++++++++++++ > 1 file changed, 34 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > index cf9a6910b542..1915bea580d3 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > @@ -26,6 +26,7 @@ properties: > - qcom,pcie-ipq8064-v2 > - qcom,pcie-ipq8074 > - qcom,pcie-ipq8074-gen3 > + - qcom,pcie-ipq9574 > - qcom,pcie-msm8996 > - qcom,pcie-qcs404 > - qcom,pcie-sdm845 > @@ -397,6 +398,37 @@ allOf: > - const: axi_m_sticky # AXI Master Sticky reset > - const: axi_s_sticky # AXI Slave Sticky reset > Where do you constrain the reg? Best regards, Krzysztof
On 4/9/24 15:08, Krzysztof Kozlowski wrote: > On 09/04/2024 21:08, Alexandru Gagniuc wrote: >> IPQ9574 has PCIe controllers which are almost identical to IPQ6018. >> The only difference is that the "iface" clock is not required. >> Document this difference along with the compatible string. >> >> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> >> --- >> .../devicetree/bindings/pci/qcom,pcie.yaml | 34 +++++++++++++++++++ >> 1 file changed, 34 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml >> index cf9a6910b542..1915bea580d3 100644 >> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml >> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml >> @@ -26,6 +26,7 @@ properties: >> - qcom,pcie-ipq8064-v2 >> - qcom,pcie-ipq8074 >> - qcom,pcie-ipq8074-gen3 >> + - qcom,pcie-ipq9574 >> - qcom,pcie-msm8996 >> - qcom,pcie-qcs404 >> - qcom,pcie-sdm845 >> @@ -397,6 +398,37 @@ allOf: >> - const: axi_m_sticky # AXI Master Sticky reset >> - const: axi_s_sticky # AXI Slave Sticky reset >> > > Where do you constrain the reg? I didn't realize that was also required -- the make checks should have picked this up too? I might be invoking the tests incorrectly. I should add the ipq9574 in the same list as ipq8074-gen3 and ipq6018, correct? Alex
On 11/04/2024 20:00, mr.nuke.me@gmail.com wrote: > > > On 4/9/24 15:08, Krzysztof Kozlowski wrote: >> On 09/04/2024 21:08, Alexandru Gagniuc wrote: >>> IPQ9574 has PCIe controllers which are almost identical to IPQ6018. >>> The only difference is that the "iface" clock is not required. >>> Document this difference along with the compatible string. >>> >>> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> >>> --- >>> .../devicetree/bindings/pci/qcom,pcie.yaml | 34 +++++++++++++++++++ >>> 1 file changed, 34 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml >>> index cf9a6910b542..1915bea580d3 100644 >>> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml >>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml >>> @@ -26,6 +26,7 @@ properties: >>> - qcom,pcie-ipq8064-v2 >>> - qcom,pcie-ipq8074 >>> - qcom,pcie-ipq8074-gen3 >>> + - qcom,pcie-ipq9574 >>> - qcom,pcie-msm8996 >>> - qcom,pcie-qcs404 >>> - qcom,pcie-sdm845 >>> @@ -397,6 +398,37 @@ allOf: >>> - const: axi_m_sticky # AXI Master Sticky reset >>> - const: axi_s_sticky # AXI Slave Sticky reset >>> >> >> Where do you constrain the reg? > > I didn't realize that was also required -- the make checks should have > picked this up too? I might be invoking the tests incorrectly. > > I should add the ipq9574 in the same list as ipq8074-gen3 and ipq6018, > correct? If you add new variant, look at existing compatibles where they appear. If there is a if: constraining compatibles, then it's a hint you should do the same for your device. So yes, you must constrain all properties which are made flexible in top-level properties. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index cf9a6910b542..1915bea580d3 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -26,6 +26,7 @@ properties: - qcom,pcie-ipq8064-v2 - qcom,pcie-ipq8074 - qcom,pcie-ipq8074-gen3 + - qcom,pcie-ipq9574 - qcom,pcie-msm8996 - qcom,pcie-qcs404 - qcom,pcie-sdm845 @@ -397,6 +398,37 @@ allOf: - const: axi_m_sticky # AXI Master Sticky reset - const: axi_s_sticky # AXI Slave Sticky reset + - if: + properties: + compatible: + contains: + enum: + - qcom,pcie-ipq9574 + then: + properties: + clocks: + minItems: 4 + maxItems: 4 + clock-names: + items: + - const: axi_m # AXI Master clock + - const: axi_s # AXI Slave clock + - const: axi_bridge # AXI bridge clock + - const: rchng + resets: + minItems: 8 + maxItems: 8 + reset-names: + items: + - const: pipe # PIPE reset + - const: sleep # Sleep reset + - const: sticky # Core Sticky reset + - const: axi_m # AXI Master reset + - const: axi_s # AXI Slave reset + - const: ahb # AHB Reset + - const: axi_m_sticky # AXI Master Sticky reset + - const: axi_s_sticky # AXI Slave Sticky reset + - if: properties: compatible: @@ -507,6 +539,7 @@ allOf: - qcom,pcie-ipq8064v2 - qcom,pcie-ipq8074 - qcom,pcie-ipq8074-gen3 + - qcom,pcie-ipq9574 - qcom,pcie-qcs404 then: required: @@ -566,6 +599,7 @@ allOf: - qcom,pcie-ipq8064-v2 - qcom,pcie-ipq8074 - qcom,pcie-ipq8074-gen3 + - qcom,pcie-ipq9574 - qcom,pcie-qcs404 then: properties:
IPQ9574 has PCIe controllers which are almost identical to IPQ6018. The only difference is that the "iface" clock is not required. Document this difference along with the compatible string. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> --- .../devicetree/bindings/pci/qcom,pcie.yaml | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+)