| Message ID | 20240123-imx-mailbox-v3-1-ed932945e0bf@nxp.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | mailbox: imx: support i.MX95 ELE/V2X MU | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On 23/01/2024 15:38, Peng Fan (OSS) wrote: > From: Peng Fan <peng.fan@nxp.com> > > Add i.MX95 Generic, Secure Enclave and V2X Message Unit compatible string. > And some MUs has internal RAMs for SCMI shared buffer usage. > > Signed-off-by: Peng Fan <peng.fan@nxp.com> > --- > .../devicetree/bindings/mailbox/fsl,mu.yaml | 50 +++++++++++++++++++++- > 1 file changed, 48 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml > index 12e7a7d536a3..569fabc5285c 100644 > --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml > +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml > @@ -29,10 +29,14 @@ properties: > - const: fsl,imx8ulp-mu > - const: fsl,imx8-mu-scu > - const: fsl,imx8-mu-seco > - - const: fsl,imx93-mu-s4 > - const: fsl,imx8ulp-mu-s4 > + - const: fsl,imx93-mu-s4 > + - const: fsl,imx95-mu-ele > + - const: fsl,imx95-mu-v2x > - items: > - - const: fsl,imx93-mu > + - enum: > + - fsl,imx93-mu > + - fsl,imx95-mu > - const: fsl,imx8ulp-mu > - items: > - enum: > @@ -95,6 +99,17 @@ properties: > power-domains: > maxItems: 1 > > + ranges: true > + > + "#address-cells": true > + > + "#size-cells": true > + > +patternProperties: > + "^sram@[a-z0-9]+": This is a friendly reminder during the review process. It seems my or other reviewer's previous comments were not fully addressed. Maybe the feedback got lost between the quotes, maybe you just forgot to apply it. Please go back to the previous discussion and either implement all requested changes or keep discussing them. Thank you. Best regards, Krzysztof
> Subject: Re: [PATCH v3 1/4] dt-bindings: mailbox: fsl,mu: add i.MX95 > Generic/ELE/V2X MU compatible > > On 23/01/2024 15:38, Peng Fan (OSS) wrote: > > From: Peng Fan <peng.fan@nxp.com> > > > > Add i.MX95 Generic, Secure Enclave and V2X Message Unit compatible > string. > > And some MUs has internal RAMs for SCMI shared buffer usage. > > > > Signed-off-by: Peng Fan <peng.fan@nxp.com> > > --- > > .../devicetree/bindings/mailbox/fsl,mu.yaml | 50 > +++++++++++++++++++++- > > 1 file changed, 48 insertions(+), 2 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml > > b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml > > index 12e7a7d536a3..569fabc5285c 100644 > > --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml > > +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml > > @@ -29,10 +29,14 @@ properties: > > - const: fsl,imx8ulp-mu > > - const: fsl,imx8-mu-scu > > - const: fsl,imx8-mu-seco > > - - const: fsl,imx93-mu-s4 > > - const: fsl,imx8ulp-mu-s4 > > + - const: fsl,imx93-mu-s4 > > + - const: fsl,imx95-mu-ele > > + - const: fsl,imx95-mu-v2x > > - items: > > - - const: fsl,imx93-mu > > + - enum: > > + - fsl,imx93-mu > > + - fsl,imx95-mu > > - const: fsl,imx8ulp-mu > > - items: > > - enum: > > @@ -95,6 +99,17 @@ properties: > > power-domains: > > maxItems: 1 > > > > + ranges: true > > + > > + "#address-cells": true > > + > > + "#size-cells": true > > + > > +patternProperties: > > + "^sram@[a-z0-9]+": > > This is a friendly reminder during the review process. > Oh, sorry, I overlooked this. Will send out v4 later, waiting to see whether Sascha has comments on the driver part. Thanks, Peng. > It seems my or otSher reviewer's previous comments were not fully addressed. > Maybe the feedback got lost between the quotes, maybe you just forgot to > apply it. Please go back to the previous discussion and either implement all > requested changes or keep discussing them. > > Thank you. > > Best regards, > Krzysztof
diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml index 12e7a7d536a3..569fabc5285c 100644 --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml @@ -29,10 +29,14 @@ properties: - const: fsl,imx8ulp-mu - const: fsl,imx8-mu-scu - const: fsl,imx8-mu-seco - - const: fsl,imx93-mu-s4 - const: fsl,imx8ulp-mu-s4 + - const: fsl,imx93-mu-s4 + - const: fsl,imx95-mu-ele + - const: fsl,imx95-mu-v2x - items: - - const: fsl,imx93-mu + - enum: + - fsl,imx93-mu + - fsl,imx95-mu - const: fsl,imx8ulp-mu - items: - enum: @@ -95,6 +99,17 @@ properties: power-domains: maxItems: 1 + ranges: true + + "#address-cells": true + + "#size-cells": true + +patternProperties: + "^sram@[a-z0-9]+": + $ref: /schemas/sram/sram.yaml# + unevaluatedProperties: false + required: - compatible - reg @@ -134,3 +149,34 @@ examples: interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; #mbox-cells = <2>; }; + + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + mu2: mailbox@445b0000 { + compatible = "fsl,imx95-mu", "fsl,imx8ulp-mu"; + reg = <0x445b0000 0x10000>; + ranges; + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <1>; + #mbox-cells = <2>; + + sram@445b1000 { + compatible = "mmio-sram"; + reg = <0x445b1000 0x400>; + ranges = <0x0 0x445b1000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + + scmi_buf0: scmi-sram-section@0 { + compatible = "arm,scmi-shmem"; + reg = <0x0 0x80>; + }; + + scmi_buf1: scmi-sram-section@80 { + compatible = "arm,scmi-shmem"; + reg = <0x80 0x80>; + }; + }; + };