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[v3,1/6] dt-bindings: riscv: Add StarFive Dubhe compatibles

Message ID 20231201121410.95298-2-jeeheng.sia@starfivetech.com
State Not Applicable
Headers show
Series Initial device tree support for StarFive JH8100 SoC | expand

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Commit Message

JeeHeng Sia Dec. 1, 2023, 12:14 p.m. UTC 
Add new compatible strings for Dubhe-80 and Dubhe-90. These are
RISC-V cpu core from StarFive Technology and are used in StarFive
JH8100 SoC.

Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
 Documentation/devicetree/bindings/riscv/cpus.yaml | 2 ++
 1 file changed, 2 insertions(+)
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index f392e367d673..0dd2d2ce4fcd 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -45,6 +45,8 @@  properties:
               - sifive,u7
               - sifive,u74
               - sifive,u74-mc
+              - starfive,dubhe-80
+              - starfive,dubhe-90
               - thead,c906
               - thead,c910
               - thead,c920