From patchwork Sat Nov 25 14:17:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 1868435 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=fX7Sgcb2; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=139.178.88.99; helo=sv.mirrors.kernel.org; envelope-from=devicetree+bounces-18788-incoming-dt=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org [139.178.88.99]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Scv8B0gC8z1ySs for ; Sun, 26 Nov 2023 01:18:02 +1100 (AEDT) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 5A6AD281576 for ; Sat, 25 Nov 2023 14:18:00 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DD6FE14F81; Sat, 25 Nov 2023 14:17:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="fX7Sgcb2" X-Original-To: devicetree@vger.kernel.org Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [IPv6:2a00:1450:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1FEEE13E for ; Sat, 25 Nov 2023 06:17:49 -0800 (PST) Received: by mail-ej1-x635.google.com with SMTP id a640c23a62f3a-a04196fc957so408375166b.2 for ; Sat, 25 Nov 2023 06:17:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1700921867; x=1701526667; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=mLrIlTcrfNZmEHwR1vKQ7waqjNZmvK/fvwshiqcqRAo=; b=fX7Sgcb2cGwapAialxIgrETc7FqwWNI4RFvJhOCDneFOEJT2hYL/DDFns1cAWkxqr0 ZieHVA2ryV8P445WjVUjQIqrOu7JQSdNvv4EL4SGRh7iOMI/55P+Q8vLQKsSjamP4y9f kTPgNlQZS6yKnrWkMIXom5F/1GONl6CVcO+pZjDq4rz9m9X9ZefzQi/nke/JqtsvT+8A OzTAnDECOAnIhJ9UEFvMuvUVxSpR+ztxrVDTGbnaWIdXpmeFa16F7UwZzguoVn7wGzi7 jLQXoyL0/TBjIOO/D2yUgTazJoQyvLZ0kmwbJyfWKgpImdpWLt20wGwNatVTRIQI9GKK vWMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1700921867; x=1701526667; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mLrIlTcrfNZmEHwR1vKQ7waqjNZmvK/fvwshiqcqRAo=; b=ujVNnNHcIZPHrRvFFh+h7zFS62I+7Y1fiLQlOvhEfdeqGTuCR/Dcjl3ZbrgmEsUzx0 B/pqOlBRU1Hp7AvTcgq84e9tdiL4diVlqYW2X9euXryGYO9OaNuQjJGMbIFJYbjr5rz4 /bTAzdJJXAHOdn3XwhatQ8FGyqQ4KdOiSr+EinycIaHGqjpc3S0OScDsqbFaf6F8+fOW Xlkmk7Jfa2BNDcDUB0foqiRm535N00wW8iaydF8f/IAd6SwyNxuY7HrgTsFCEyCk6XWA zJGDyMTTmS5Eb0veEgXfLqd5iGzfwCfMqjhTj69X/CNkA+r0TJZ8zx20bOpH9beDqFPw pBNw== X-Gm-Message-State: AOJu0YxaW/BH7AJdVtOjcIfm6KzNhXHKneP/eP9gCcFCBnT2U/LY8HVm WZDPmSNe+Pqy4w+S40tofG1XTNv25T8Ul5oL4eg= X-Google-Smtp-Source: AGHT+IHy8KiePOZBp8lIAsCOZSPCZfjYQvCkrTWRBfU0HFRyq1+TOhdthnHNQZRG532gJ6TOTfvz5A== X-Received: by 2002:a17:907:3c23:b0:a02:3f1e:57e8 with SMTP id gh35-20020a1709073c2300b00a023f1e57e8mr3984306ejc.36.1700921867257; Sat, 25 Nov 2023 06:17:47 -0800 (PST) Received: from [10.167.154.1] (178235187180.dynamic-4-waw-k-2-3-0.vectranet.pl. [178.235.187.180]) by smtp.gmail.com with ESMTPSA id 19-20020a170906319300b00992b8d56f3asm3500345ejy.105.2023.11.25.06.17.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Nov 2023 06:17:46 -0800 (PST) From: Konrad Dybcio Date: Sat, 25 Nov 2023 15:17:30 +0100 Subject: [PATCH 02/12] dt-bindings: display: msm: Add reg bus and rotator interconnects Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231125-topic-rb1_feat-v1-2-11d71b12b058@linaro.org> References: <20231125-topic-rb1_feat-v1-0-11d71b12b058@linaro.org> In-Reply-To: <20231125-topic-rb1_feat-v1-0-11d71b12b058@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Loic Poulain , Bryan O'Donoghue , Andy Gross , Bjorn Andersson , Krzysztof Kozlowski , Georgi Djakov , Will Deacon , Robin Murphy , Joerg Roedel , Krishna Manikandan , Robert Marko , Das Srinagesh Cc: Marijn Suijten , Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1700921858; l=1875; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=AFFsjfQ/BWb6zbEE2kIE5M6+YBHmlQ+rokF2C+2Kd04=; b=Ko21H+lWGGl59y8qJsZ+LTUw0AWkhTziUlqwg4+lQP0Zq18rNp2fD1omovB6ZeBmhVmjSNMTp wKdjaAGzz5nAy1P3zo5fSusiUSJLqx/3Pre4Gi7Q7gCCuziLVKdW0lH X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there are other connection paths: - a path that connects rotator block to the DDR. - a path that needs to be handled to ensure MDSS register access functions properly, namely the "reg bus", a.k.a the CPU-MDSS CFG interconnect. Describe these paths bindings to allow using them in device trees and in the driver Signed-off-by: Dmitry Baryshkov [Konrad: rework for one vs two MDP paths] Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/display/msm/mdss-common.yaml | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml index f69196e4cc76..c6305a6e0334 100644 --- a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml +++ b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml @@ -61,17 +61,27 @@ properties: ranges: true + # This is not a perfect description, but it's impossible to discern and match + # the entries like we do with interconnect-names interconnects: minItems: 1 items: - description: Interconnect path from mdp0 (or a single mdp) port to the data bus - description: Interconnect path from mdp1 port to the data bus + - description: Interconnect path from CPU to the reg bus interconnect-names: - minItems: 1 - items: - - const: mdp0-mem - - const: mdp1-mem + oneOf: + - minItems: 1 + items: + - const: mdp0-mem + - const: cpu-cfg + + - minItems: 2 + items: + - const: mdp0-mem + - const: mdp1-mem + - const: cpu-cfg resets: items: