| Message ID | 20231106061220.21485-2-jian.yang@mediatek.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | PCI: mediatek-gen3: Support controlling power supplies | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On 06/11/2023 07:12, Jian Yang wrote: > From: "jian.yang" <jian.yang@mediatek.com> > > Add new properties to support control power supplies and reset pin of > a downstream component. > > Signed-off-by: jian.yang <jian.yang@mediatek.com> Please use scripts/get_maintainers.pl to get a list of necessary people and lists to CC (and consider --no-git-fallback argument). It might happen, that command when run on an older kernel, gives you outdated entries. Therefore please be sure you base your patches on recent Linux kernel. > --- > .../bindings/pci/mediatek-pcie-gen3.yaml | 30 +++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml > index 7e8c7a2a5f9b..a4f6b48d57fa 100644 > --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml > +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml > @@ -84,6 +84,26 @@ properties: > items: > enum: [ phy, mac ] > > + vpcie1v8-supply: > + description: > + The regulator phandle that provides 1.8V power from root port to a > + downstream component. > + > + vpcie3v3-supply: > + description: > + The regulator phandle that provides 3.3V power from root port to a > + downstream component. > + > + vpcie12v-supply: > + description: > + The regulator phandle that provides 12V power from root port to a > + downstream component. > + > + dsc-reset-gpios: > + description: > + The extra reset pin other than PERST# required by a downstream component. > + maxItems: 1 How did you implement Rob's feedback? Or did you just ignore it? This does not look like property of the controller. Aren't you now trying to implement power-sequencing of devices via properties of host controller? Best regards, Krzysztof
Il 06/11/23 07:12, Jian Yang ha scritto: > From: "jian.yang" <jian.yang@mediatek.com> > > Add new properties to support control power supplies and reset pin of > a downstream component. > > Signed-off-by: jian.yang <jian.yang@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
On 06/11/2023 07:12, Jian Yang wrote: > From: "jian.yang" <jian.yang@mediatek.com> > > Add new properties to support control power supplies and reset pin of > a downstream component. > > Signed-off-by: jian.yang <jian.yang@mediatek.com> > --- > .../bindings/pci/mediatek-pcie-gen3.yaml | 30 +++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml > index 7e8c7a2a5f9b..a4f6b48d57fa 100644 > --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml > +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml > @@ -84,6 +84,26 @@ properties: > items: > enum: [ phy, mac ] > > + vpcie1v8-supply: > + description: > + The regulator phandle that provides 1.8V power from root port to a > + downstream component. > + > + vpcie3v3-supply: > + description: > + The regulator phandle that provides 3.3V power from root port to a > + downstream component. How 3.3V supply can go from root port to downstream? Do you mean that root port is the regulator itself (regulator provider)? Sorry, all these supplies look like hacks - stuffing PCI device properties into the PCI controller node. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml index 7e8c7a2a5f9b..a4f6b48d57fa 100644 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml @@ -84,6 +84,26 @@ properties: items: enum: [ phy, mac ] + vpcie1v8-supply: + description: + The regulator phandle that provides 1.8V power from root port to a + downstream component. + + vpcie3v3-supply: + description: + The regulator phandle that provides 3.3V power from root port to a + downstream component. + + vpcie12v-supply: + description: + The regulator phandle that provides 12V power from root port to a + downstream component. + + dsc-reset-gpios: + description: + The extra reset pin other than PERST# required by a downstream component. + maxItems: 1 + clocks: minItems: 4 maxItems: 6 @@ -238,5 +258,15 @@ examples: #interrupt-cells = <1>; interrupt-controller; }; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + vpcie3v3-supply = <&pcie3v3_regulator>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; }; };